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| eight channel ac?97 2.3 audio codec datasheet rev. 1.3 11 march 2005 track id: jatr-1076-21 alc850 ( d )
alc850(d) datasheet eight channel ac?97 2.3 audio codec ii track id: jatr-1076-21 rev. 1.3 copyright ?2005 realtek semiconductor corp. a ll rights reserved. no part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of realtek semiconductor corp. disclaimer realtek provides this document ?as is?, without wa rranty of any kind, neither expressed nor implied, including, but not limited t o, the particular pu rpose. realtek may make impr ovements and/or changes in this document or in the product described in this document at any time. this document could include technical inaccuracies or typographical errors. trademarks realtek is a trademark of realtek semiconductor co rporation. other names mentioned in this document are trademarks/registered trademarks of their respective owners. using this document this document is intended for the hardware and soft ware engineer?s general information on the realtek alc850 audio codec chip. though every effort has been made to ensure that th is document is current and accurate, more information may have become available subsequent to the production of this guide. in that ev ent, please contact your realtek representative for additional information that may help in the development process. revision history revision release date summary 0.40 2003/08/03 preliminary version. 1.00 2003/11/6 second preliminary version. 1.10 2004/04/05 the lqfp-48 ?e? dimension is typical 0.0196inch. 1.11 2004/09/19 corrected typing error in s/pdif output feature. 1.2 2004/11/15 first official release. 1.3 2005/03/11 add lead (pb)-free and version package identification information on page 4 and in table 64, on page 48. alc850(d) datasheet eight channel ac?97 2.3 audio codec iii track id: jatr-1076-21 rev. 1.3 table of contents 1. general desc ription .................................................................................................... 1 2. features ....................................................................................................................... .2 3. system app lications .................................................................................................... 2 4. analog mixer diagram ............................................................................................... 3 5. pin assign ments........................................................................................................... 4 5.1. l ead (p b )-f ree p ackage and v ersion i dentification .............................................................4 6. pin descri ption ............................................................................................................ 5 6.1. d igital i/o p ins .............................................................................................................................5 6.2. a nalog i/o p ins .............................................................................................................................6 6.3. f ilter /r eference p ins ..................................................................................................................7 6.4. p ower /g round p ins ......................................................................................................................7 7. register desc riptions .................................................................................................. 8 7.1. m ixer r egisters ............................................................................................................................8 7.1.1. mx00 reset..................................................................................................................... ........................................9 7.1.2. mx02 (front) ma ster volume..................................................................................................... ............................9 7.1.3. mx06 mono-out volume ........................................................................................................... ...........................10 7.1.4. mx0a pc be ep volume ............................................................................................................ ..........................10 7.1.5. mx0c phone volume.............................................................................................................. ........................... 11 7.1.6. mx0e mic volume................................................................................................................ ............................... 11 7.1.7. mx10 line_i n volume ............................................................................................................ ............................12 7.1.8. mx12 cd volume ................................................................................................................. ................................12 7.1.9. mx16 aux input /back-su rround output volume .................................................................................... ...........13 7.1.10. mx18 pcm_ou t volume ............................................................................................................ ........................13 7.1.11. mx1a record select ............................................................................................................. ................................14 7.1.12. mx1c record gain ............................................................................................................... ...............................15 7.1.13. mx20 general purpose register.................................................................................................. ........................15 7.1.14. mx24 audio interrupt and paging ................................................................................................ .......................16 7.1.15. mx26 power down control/status ................................................................................................. .....................17 7.1.16. mx28 extended audio id......................................................................................................... ............................18 7.1.17. mx2a extended audio stat us and control register................................................................................ .............18 alc850(d) datasheet eight channel ac?97 2.3 audio codec iv track id: jatr-1076-21 rev. 1.3 7.1.18. mx2c pcm front/center output sample rate ....................................................................................... ............19 7.1.19. mx2e pcm surround ou tput sample rate........................................................................................... ...............20 7.1.20. mx30 pcm lfe outp ut sample rate................................................................................................ ..................20 7.1.21. mx32 pcm input sample rate ..................................................................................................... .......................20 7.1.22. mx36 lfe/center master volume .................................................................................................. .....................20 7.1.23. mx38 surround master volume .................................................................................................... .......................21 7.1.24. mx3a s/pdif output chan nel status and control .................................................................................. ...........21 7.2. v endor d efined r egisters (p age id-00 h ) ...............................................................................23 7.2.1. mx60 s/pdif input ch annel status [15:0] ........................................................................................ .................23 7.2.2. mx62 s/pdif input chan nel status [29:15] ....................................................................................... ................23 7.2.3. mx64 surround dac volume....................................................................................................... ........................24 7.2.4. mx66 center/l fe dac volume..................................................................................................... ......................24 7.2.5. mx6a data fl ow control ......................................................................................................... ...........................25 7.3. d iscovery d escriptor (p age id-01 h ).......................................................................................26 7.3.1. mx62 pci sub system id......................................................................................................... ............................26 7.3.2. mx64 pci sub vendor id ......................................................................................................... ...........................26 7.3.3. mx66 sense f unction se lect ..................................................................................................... ...........................26 7.3.4. mx68 sense functio n information................................................................................................ .......................27 7.3.5. mx6a sense detail.............................................................................................................. .................................27 7.4. e xtension r egisters ..................................................................................................................28 7.4.1. mx76 gpio & interrupt control .................................................................................................. .......................28 7.4.2. mx78 gpio & in terrupt status................................................................................................... .........................29 7.4.3. mx7a miscellane ous control..................................................................................................... ..........................30 7.4.4. mx7c vendor id1 ................................................................................................................ ................................31 7.4.5. mx7e vendor id2 ................................................................................................................ ................................31 8. electrical char acteristics ......................................................................................... 32 8.1. dc c haracteristics ...................................................................................................................32 8.1.1. absolute maxi mum ratings ....................................................................................................... ...........................32 8.1.2. threshold voltage .............................................................................................................. ...................................32 8.1.3. digital filter c haracteristics ................................................................................................. ..............................33 8.1.4. s/pdif output ch aracteristics .................................................................................................. ..........................33 8.2. ac t iming c haracteristics ......................................................................................................33 8.2.1. cold reset..................................................................................................................... ........................................33 8.2.2. warm reset..................................................................................................................... ......................................34 8.2.3. ac-link clocks................................................................................................................. ....................................34 alc850(d) datasheet eight channel ac?97 2.3 audio codec v track id: jatr-1076-21 rev. 1.3 8.2.4. data output and input timing................................................................................................... ...........................35 8.2.5. signal rise and fall timing .................................................................................................... .............................36 8.2.6. ac-link low power mode timing .................................................................................................. .....................37 8.2.7. ate test mode.................................................................................................................. ....................................38 8.2.8. ac-link io pin capac itance and loading ......................................................................................... .................38 8.2.9. s/pdif output.................................................................................................................. ....................................39 9. analog performance ch aracteristics ...................................................................... 40 10. design and l ayout guid e ......................................................................................... 42 10.1. c locking ............................................................................................................................... .......42 10.2. ac-l ink ............................................................................................................................... .........42 10.3. r eset ............................................................................................................................... ..............43 10.4. cd i nput ............................................................................................................................... ........43 10.5. o dd a ddressed r egister a ccess ..............................................................................................44 10.6. p ower d own m ode .....................................................................................................................44 10.7. t est m ode ............................................................................................................................... .....44 10.7.1. ate in circu it test mode....................................................................................................... ...............................44 10.7.2. vendor specific test mode...................................................................................................... ..............................44 10.8. p ower -o ff cd f unction ............................................................................................................45 11. application circuits .................................................................................................. 46 12. mechanical di mensions ............................................................................................ 47 12.1. m echanical d imensions n otes .................................................................................................48 13. ordering info rmation ............................................................................................... 48 alc850(d) datasheet eight channel ac?97 2.3 audio codec vi track id: jatr-1076-21 rev. 1.3 list of tables table 1. digital i/o pins.................................................................................................... ..........................5 table 2. analog i/o pins ..................................................................................................... ........................6 table 3. filter/reference pins ............................................................................................... ......................7 table 4. power/ground pins................................................................................................... .....................7 table 5. mixer registers..................................................................................................... .........................8 table 6. mx00 reset.......................................................................................................... .........................9 table 7. mx02 (front) master volume .......................................................................................... ............9 table 8. mx06 mono-out volume ................................................................................................ ...........10 table 9. mx0a pc beep volume ................................................................................................. ..........10 table 10. mx0c phone volume .................................................................................................... ..........11 table 11. mx0e mic volume ...................................................................................................... ..............11 table 12. mx10 line_in volume.................................................................................................. ...........12 table 13. mx12 cd volume ....................................................................................................... ...............12 table 14. mx16 aux input /back-surround output volume ...................................................................13 table 15. mx18 pcm_out volume .................................................................................................. .......13 table 16. mx1a record select................................................................................................... ................14 table 17. mx1c record gain..................................................................................................... ................15 table 18. mx20 general purpose register........................................................................................ .........15 table 19. mx24 audio interrupt and paging...................................................................................... ........16 table 20. mx26 power down control/status....................................................................................... ......17 table 21. mx28 extended audio id ............................................................................................... ...........18 table 22. mx2a extended audio status and control register..................................................................18 table 23. mx2c pcm front/center output sample rate..........................................................................19 table 24. mx2e pcm surround output sample rate................................................................................2 0 table 25. mx30 pcm lfe output sample rate...................................................................................... ..20 table 26. mx32 pcm input sample rate........................................................................................... ........20 table 27. mx36 lfe/center master volume ........................................................................................ .....20 table 28. mx38 surround master volume .......................................................................................... .......21 table 29. mx3a s/pdif output ch annel status and control....................................................................21 table 30. s/pdif channel status ................................................................................................ ................22 table 31. s/pdif validity control.............................................................................................. ................22 table 32. mx60 s/pdif input channel status [15:0] .............................................................................. ..23 table 33. mx62 s/pdif input channel status [29:15] ............................................................................. .23 alc850(d) datasheet eight channel ac?97 2.3 audio codec vii track id: jatr-1076-21 rev. 1.3 table 34. mx64 surround dac volume............................................................................................. .......24 table 35. mx66 center/lfe dac volume........................................................................................... .....24 table 36. mx6a data flow control............................................................................................... ............25 table 37. mx62 pci sub system id ............................................................................................... ...........26 table 38. mx64 pci sub vendor id ............................................................................................... ...........26 table 39. mx66 sense function select ........................................................................................... ...........26 table 40. mx68 sense function information ...................................................................................... .......27 table 41. mx6a sense detail.................................................................................................... .................27 table 42. mx76 gpio & interrupt control ........................................................................................ ........28 table 43. mx78 gpio & interrupt status......................................................................................... ..........29 table 44. mx7a miscellaneous control........................................................................................... ..........30 table 45. mx7c vendor id1...................................................................................................... ................31 table 46. mx7e vendor id2 ...................................................................................................... ................31 table 47. absolute maximum ratings............................................................................................. ...........32 table 48. threshold voltage .................................................................................................... ...................32 table 49. digital filter characteristics....................................................................................... .................33 table 50. s/pdif output characteristics ........................................................................................ ............33 table 51. cold reset........................................................................................................... .........................33 table 52. warm reset ........................................................................................................... ......................34 table 53. ac-link clocks....................................................................................................... ....................34 table 54. data output and input timing......................................................................................... ............35 table 55. signal rise and fall timing .......................................................................................... ..............36 table 56. ac-link low power mode timing ........................................................................................ ....37 table 57. ate test mode ........................................................................................................ ...................38 table 58. ac-link io pin capacitance and loading............................................................................... ...38 table 59. s/pdif output ........................................................................................................ .....................39 table 60. analog performance characteristics ................................................................................... ........40 table 61. clocking............................................................................................................. ..........................42 table 62. reset ................................................................................................................ ............................43 table 63. power-off cd function circuitry...................................................................................... .........45 table 64. ordering information................................................................................................. ..................48 alc850(d) datasheet eight channel ac?97 2.3 audio codec viii track id: jatr-1076-21 rev. 1.3 list of figures figure 1. analog mixer ....................................................................................................... ........................3 figure 2. pin assignments.................................................................................................... .......................4 figure 3. cold reset timing .................................................................................................. ...................33 figure 4. warm reset timing .................................................................................................. .................34 figure 5. data output and input timing ....................................................................................... ............35 figure 6. signal rise and fall timing........................................................................................ ...............36 figure 7. ac-link low power mode timing...................................................................................... .....37 figure 8. ate test mode timing ............................................................................................... ..............38 figure 9. s/pdif output...................................................................................................... ......................39 figure 10. example of differential cd input.................................................................................... ..........43 figure 11. power-down control .................................................................................................. ...............44 figure 12. power-off cd function circuitry..................................................................................... .........46 alc850(d) datasheet eight channel ac?97 2.3 audio codec 1 track id: jatr-1076-21 rev. 1.3 1. general description featuring four 16-bit two-channe l dacs and a stereo 16-bit adc, th e alc850 and ALC850D are ac?97 rev 2.3 compatible eight-channel audio codecs desi gned for pc multimedia systems. the alc850(d) incorporates proprietary convert er technology and fully meets perf ormance requirements for pc99/2001 systems. four pairs of stereo outputs, with 5-bit volume c ontrol and multiple stereo and mono inputs, along with flexible mixing, and gain and mute functions, provide a complete integr ated audio solution for pcs. the digital interface circuitry of the alc850(d) opera tes from a low-power-consumption 3.3v power supply. two integrated 50mw/20ohm headphone audio amplifie rs provide high-quality personal audio listening. utilizing universal audio jack? technology, line-in and mic-in can also serve as an amplified stereo headphone-out. in addition, the alc850(d) is embedded with an impedance sensing capability to detect when a device has been connected to input or output jacks. the alc850(d) integrates an on-board dual pll clock generator (14.318mhz and 24.576mhz), saving the cost of a 24.576mhz crystal. a pcbeep generator is built-in and can be pr ogrammed by the bios to generate post beeps without a buz zer. s/pdif input and output func tions are also supported, offering easy connection of pcs to consumer electronic products such as ac3 decoders/s peakers, and mini disk devices. the alc850(d) supports host/soft audio from intel ichx chipsets, as well as audio controller-based via/sis/ali/amd/nvidia/ati chipsets. bundled windows series (98/me/nt/2000/xp) and linux drivers, eax/direct sound 3d/i3dl2/a3d compa tible sound effect util ities (supporting karaoke, 26 types of environment sound emulation, 10-band e qualizer), hrtf 3d posit ional audio, and optional dolby ? digital live, providing an excellent entertainmen t package and game experience for pc users. alc850(d) datasheet eight channel ac?97 2.3 audio codec 2 track id: jatr-1076-21 rev. 1.3 2. features meets performance requirements for audio on pc99/2001 systems complies with ac'97 rev 2.3 specifications: jack sensing on front-out, surround-out, cen/lfe-out, surround-back-out, mic-in, line-in, and front-mic-in clock input support options: 14.318mhz pll (may be set to 24.576mhz) to eliminate crystal 12.288mhz bitclk input integrated pcbeep generator interrupt capability page and analog plug & play registers meets microsoft whql/wlp 2.0 audio requirements eight-channel da c onverter (48khz) stereo ad converter (48khz) three analog line-level stereo inputs with 5-bit volume control: line-in, cd, aux high-quality differential cd input two analog line-level mono inputs: pcbeep, phone-in dedicated stereo front-mic input for front panel applications line-in, aux, and mic-in can be shared with surround-out, surround-back-out, and cen/lfe-out (flexjack ? ) +20db boost preamplifier for mic input both front-out and surround-out integrate 50mw/20ohm amplifiers external amplifier power down (eapd) power management and enhanced power saving features stereo mic record for aec/bf application supports power-off cd operation adjustable vrefout control supports 48khz s/pdif output supports 32/44.1/48khz s/pdif input three universal audio jacks (uaj ? ): front-out, line-in, and mic-in six jack detect pins for automatic jack sensing power support: digital: 3.3v analog: 3.3v/5v standard 48-pin lqfp package eax ? 1.0 & 2.0 compatible direct sound 3d ? compatible a3d ? compatible i3dl2 compatible hrtf 3d positional audio 10-band software equalizer optional dolby ? digital live voice cancellation and key shifting in karaoke mode avrack ? media player configuration panel for enhanced user experience 3. system applications multimedia pcs pc games information appliances (ia) voice recognition audio conferencing alc850(d) datasheet eight channel ac?97 2.3 audio codec 3 track id: jatr-1076-21 rev. 1.3 4. analog mixer diagram cen/lfe pcm out 0 * 1 0 * 1 1 0 * 0 * 1 alc850 0 * 1 0 * 1 0 * 1 1k 0* 1 1k 0 * 1 1 0* 0 * 1 1 0* detection circuit surr dac dac dac dac back rear pcm out rear pcm out front pcm out (12) pc-beep (13) phone mic1 mic2 line-in (32) front mic2 (34) front mic1 (18, 19, 10) cd-in (14, 15) aux-in uio2 (23, 24) (35, 36) (21, 22) uio1 uio3 detection circuit detection circuit surr surr surr line-in front-out mic1/2 surr cen/lfe mx20.8 +20db +20db mx10 mx16 mx12 mx66 mx64 mx18 mx0a mx0c mx0e mx6a.0 mx36 cen/lfe volume surround volume mx38 pc-beep master volume mx02 mono volume mx06 adc mx1a mux mx20.9 record gain mx1c stereo mix mono mix phone mic l mic r line cd aux front-out surr-out (39, 41) cen/lfe-out (43, 44) 1k cen/lfe surr-amp amp yes no reset # vrefout3 mono-out (37) pcm-in mono analog stereo analog stereo digital default setting *: figure 1. analog mixer alc850(d) datasheet eight channel ac?97 2.3 audio codec 4 track id: jatr-1076-21 rev. 1.3 5. pin assignments mono-out/ vrefout3 avdd2 surr-out-l jd3 surr-out-r avss2 cen-out lfe-out jd0/gpio0 xtlsel spdifi/eapd 123456789101112 36 35 34 33 32 31 30 29 28 27 26 25 spdifo 23 22 21 20 19 18 17 16 15 14 13 37 38 39 40 41 42 43 44 45 46 47 48 24 avdd1 line-in-l mic2 cd-l aux-r aux-l phone/jd5 avss1 vrefout afilt2 vrefout2 front-out-l dvdd2 xtl-in jd 4 front-m ic2 mic1 front-m ic1 cd-r cd-gnd dvss1 sdata-o u t vref afilt1 xtl-out dvss2 sdata-in sync reset# pc-beep dvdd1 line-in-r front-out-r jd2 jd1/gpio1 bit-clk lllllll txxxv alc850(d) figure 2. pin assignments 5.1. lead (pb)-free package and version identification lead (pb)-free package is indicated by an ?l? in the location marked ?t? in figure 2. the version number is shown in the location marked ?v?. alc850(d) datasheet eight channel ac?97 2.3 audio codec 5 track id: jatr-1076-21 rev. 1.3 6. pin description 6.1. digital i/o pins table 1. digital i/o pins name pin no type description characteristic definition xtl-in i 2 crystal in put crystal input pad xtl-out o 3 crystal output crystal output pad sdata- out i 5 serial tdm ac?97 output schmitt input, v l =0.3vdd, v h =0.4vdd bit-clk io 6 bit clock output (12.288mhz) cmos input/output, vt=0.35vdd. this pin will be floating when reset# is active sdata-in o 8 serial tdm ac?97 input cmos output. internally pulled low by a 100k resistor. this pin will be floating when reset# is active. sync i 10 sample sync (48khz) schmitt input, v l =0.3vdd, v h =0.4vdd reset# i 11 ac'97 master h/w reset schmitt input, v l =0.3vdd, v h =0.4vdd xtlsel* i 46 crystal selection internally pulled high by a 100k resistor spdifi/ eapd i/o 47 s/pdif input/external amplifier power down control digital input with 0.4v schmitt trigger biased at 1.65v/output spdifo o 48 s/pdif output digital output total: 10 pins *xtlsel=floating, bypass 14.318mhz to 24.576mhz digital pll. the clock source is 24.576mhz crystal or external clock. xtlsel=pull low, select 14.318mhz to 24.576mhz digital pll alc850(d) datasheet eight channel ac?97 2.3 audio codec 6 track id: jatr-1076-21 rev. 1.3 6.2. analog i/o pins table 2. analog i/o pins pin name pin no type description characteristic definition pc-beep i 12 pc speaker input analog input (1.6vrms) phone/jd5 i 13 speaker phone input/jack detect 5 analog input (1.6vrms)/ internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 2.5v aux-l i 14 aux left channel/back surround-out-l analog input (1.6vrms)/analog output (1vrms) aux-r i 15 aux right channel/back surround-out-l analog input (1.6vrms)/analog output (1vrms) cd-l i 18 cd audio left channel analog input (1.6vrms) cd-gnd i 19 cd audio analog gnd analog input (1.6vrms) cd-r i 20 cd audio right channel analog input (1.6vrms) mic1 io 21 first mic input/cen-out/ universal jack3 left channel analog input (1.6vrms)/analog output (1vrms) mic2 io 22 second mic input/lfe-out/ universal jack3 right channel analog input (1.6vrms)/analog output (1vrms) line-l io 23 line-in left channel/s-out-l/ universal jack1 channel analog input (1.6vrms)/analog output (1vrms) line-r io 24 line-in right channel/s-out-r/ universal jack1 right channel analog input (1.6vrms)/analog output (1vrms) front-mic1 i 34 dedicated front mic input analog input (1.6vrms) front-mic2 i 32 dedicated front mic input analog input (1.6vrms) front-out-l o 35 front output left channel/ universal jack2 left channel analog output with amplifier front-out-r o 36 front output right channel/ universal jack2 right channel analog output with amplifier mono-out/ vrefout3 o 37 line-out mixed mono output/ third ref. voltage out analog output surr-out-l o 39 surround out left channel analog output surr-out-r o 41 surround out right channel analog output cen-out o 43 center out channel analog output lfe-out o 44 low frequency effect out channel analog output gpio0/jd0 io 45 general purpose io0/ jack detect 0 internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 4v gpio1/jd1 io 17 general purpose io1/ jack detect 1 internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 4v jd2 i 16 jack detect 2 internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 4v jd3 i 40 jack detect 3 internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 4v jd4 i 31 jack detect 4 internally pulled high (5v) to avdd by a 100k resistor. trigger point of high is at 4v total: 25 pins alc850(d) datasheet eight channel ac?97 2.3 audio codec 7 track id: jatr-1076-21 rev. 1.3 6.3. filter/reference pins table 3. filter/reference pins name pin no type description characteristic definition vref - 27 reference voltage +4.7uf and 0.1uf cap to avss vrefout o 28 ref. voltage out with 5ma drive analog output (2.25v ? 2.75v) afilt1 - 29 adc anti-aliasing filter capacitor 1nf cap to avss afilt2 - 30 adc anti-aliasing filter capacitor 1nf cap to avss vrefout2 o 33 secondary reference voltage out analog output (2.25v ? 2.75v) total: 5 pins 6.4. power/ground pins table 4. power/ground pins name pin no type description characteristic definition avdd1 25 i analog vdd (5.0v) minimum value is 3.0v maximum value is 5.5v avdd2 38 i analog vdd (5.0v) minimum value is 3.0v maximum value is 5.5v avss1 26 i analog gnd avss2 42 i analog gnd dvdd1 1 i digital vdd (3.3v) minimum value is 3.0v (dvdd-0.3) maximum value is 3.6v (dvdd+0.3) dvdd2 9 i digital vdd (3.3v) minimum value is 3.0v (dvdd-0.3) maximum value is 3.6v (dvdd+0.3) dvss1 4 i digital gnd dvss2 7 i digital gnd total: 8 pins alc850(d) datasheet eight channel ac?97 2.3 audio codec 8 track id: jatr-1076-21 rev. 1.3 7. register descriptions 7.1. mixer registers accessing odd numbered registers, or readi ng unimplemented registers, will return a 0. table 5. mixer registers reg. (hex) name d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 default 00h reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000h 02h master vol mute x x ml4 ml3 ml2 ml1 ml0 mute* x x mr4 mr3 mr2 mr1 mr0 8000h 06h mono vol mute x x x x x x x x x x mm4 mm3 mm2 mm1 mm0 8000h 0ah beep vol mute x x f7 f6 f5 f4 f3 f2 f1 f0 pb3 pb2 pb1 pb0 x 8000h 0ch phone vol mute x x x x x x x x x x ph4 ph3 ph2 ph1 ph0 8008h 0eh mic vol mute x x x x x x x x 20db x mi4 mi3 mi2 mi1 mi0 8008h 10h line-in vol mute x x nl4 nl3 nl2 nl1 nl0 x x x nr4 nr3 nr2 nr1 nr0 8808h 12h cd vol mute x x cl4 cl3 cl2 cl1 cl0 x x x cr4 cr3 cr2 cr1 cr0 8808h 16h aux vol mute x x al4 al3 al2 al1 al0 x x x ar4 ar3 ar2 ar1 ar0 8808h 18h pcm vol mute x x pl4 pl3 pl2 pl1 pl0 x x x pr4 pr3 pr2 pr1 pr0 8808h 1ah record sel x x x x x lrs2 lrs1 lrs0 x x x x x rrs2 rrs1 rrs0 0000h 1ch rec. gain mute x x x lrg3 lrg2 lrg1 lrg0 x x x x rrg3 rrg2 rrg1 rrg0 8000h 20h general x x x x x x mix ms lbk x x x x x x x 0000h 24h audio int. & paging i4 i3 i2 i1 i0 x x x x x x x pg3 pg2 pg1 pg0 0000h 26h power down eapd x pr5 pr4 pr3 pr2 pr1 pr0 x x x x ref anl dac adc 000fh 28h extended 0 0 x x rev1 rev0 0 ldac sdac cdac x x x spdif x vra 09c4h 2ah extended status x prl prk prj pri spcv sbda c ldac sdac cdac spsa 1 spsa 0 x spdif x vra 0040h 2ch pcm out rate 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 bb80h 2eh pcm out rate 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 bb80h 30h pcm out rate 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 bb80h 32h pcm in rate 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 bb80h 36h center/lfe vo l u m e mute x x lfe4 lfe3 lfe2 lfe1 lfe0 mute x x cnt4 cnt3 cnt2 cnt1 cnt0 8080h 38h surround vo l u m e mute x x lsr4 lsr3 lsr2 lsr1 lsr0 mute x x rsr4 rsr3 rsr2 rsr1 rsr0 8080h 3ah s/pdif ctl v 0 spsr 1 spsr 0 l cc6 cc5 cc4 cc3 cc2 cc1 cc0 pre copy /audi o pro 2000h 64h surr. dac vo l u m e mute x x lsd4 lsd3 lsd2 lsd1 lsd0 x x x rsd4 rsd3 rsd2 rsd1 rsd0 0808h 66h cen/lfe dac vo l u m e mute x x ld4 ld3 ld2 ld1 ld0 x x x cd4 cd3 cd2 cd1 cd0 0808h 6ah multi- channel ctl 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000h 7ah extension control 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60a2h 7ch vendor id1 0 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 414ch 7eh vendor id2 0 1 0 0 0 1 1 1 0 1 1 0 0 0 0 0 4760h x = reserved bit *: mx36 is the master volume control of center/lfe output. mx38 is the master volume control of surround output. alc850(d) datasheet eight channel ac?97 2.3 audio codec 9 track id: jatr-1076-21 rev. 1.3 7.1.1. mx00 reset default: 0000h writing any value to this register will start a register re set and causes all of the registers to revert to their default values. reading this register re turns the id code of the specific part. table 6. mx00 reset bit type function 15 r read as 0 14:10 r return 00000b (no 3d stereo enhancement) 9 r read as 0 (not 20-bit adc) 8 r read as 0 (not 18-bit adc) 7 r read as 0 (not 20-bit dac) 6 r read as 0 (not 18-bit dac) 5 r read as 0 (no loudness) 4 r read as 0 (no true line level output) 3 r read as 0 (no simulated stereo for analog 3d block use) 2 r read as 0 (no bass & treble control) 1 r read as 0 (no modem line support) note: writing any data into this register will reset all mixer registers to their default value. the written data is ignored. 7.1.2. mx02 (front) master volume default: 8000h these registers control the volume level of front-out. each step on the left and right channels corresponds to a 1.5db incr ease/decrease in volume. table 7. mx02 (front) master volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w master left volume (ml[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w master right volume (mr[4:0]) in 1.5db steps for mr/ml 00h 1fh 0db attenuation 46.5db attenuation alc850(d) datasheet eight channel ac?97 2.3 audio codec 10 track id: jatr-1076-21 rev. 1.3 7.1.3. mx06 mono-out volume default: 8000h these registers control the volume level of mono- out. each step on the le ft and right channels corresponds to a 1.5db incr ease/decrease in volume. table 8. mx06 mono-out volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 4:0 r/w mono master volume (mm[4:0]) in 1.5db steps for mr/ml: 00h 1fh 0db attenuation 46.5db attenuation 7.1.4. mx0a pc beep volume default: 0000h this register controls the input volume for the pc beep signal. each step in b its 4:1 corresponds to a 3db increase/decrease in volume. sixteen levels of volume are available, from 0000 to 1111. the purpose of this register is to allow the pc beep signals to pass through the alc850(d), eliminating the need for an external system speaker/b uzzer. the pc beep pin is directly r outed (internally hardwired) to the front-out. if the pc speaker/ buzzer is eliminated it is recommended to connect the external speakers at all times so that the post codes can be heard during reset. table 9. mx0a pc beep volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 reserved 12:5 r/w internal pcbeep frequency, f[7:0] the internal pcbeep frequency is the result of dividing the 48khz clock by 4 times the number specified in f[7:0]. the lowest tone is 48khz/(255*4)=47hz. the highest tone is 48khz/(1*4)=12khz. a value of 00h in f[7:0] disables internal pcbeep generator and allows external pcbeep input 4:1 r/w pc beep volume (pbv[3:0]) in 3db steps 0 reserved for pb 00h 0fh 0db attenuation 45db attenuation alc850(d) datasheet eight channel ac?97 2.3 audio codec 11 track id: jatr-1076-21 rev. 1.3 7.1.5. mx0c phone volume default: 8008h register 0ch controls the telephon e input volume for software modem applications. because software modem applications may not have a sp eaker, the codec can offer a speaker- out service. each step in bits 4:0 corresponds to a 1.5db increas e/decrease in volume, allowing 32 levels of volume, from 00000 to 11111. table 10. mx0c phone volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:5 - reserved 4:0 r/w phone volume (pv[4:0]) in 1.5db steps for pv 00h 08h 1fh +12db gain 0db attenuation -34.5db gain 7.1.6. mx0e mic volume default: 8008h register 0eh controls the microph one input volume. each step in bits 4:0 corresponds to a 1.5db increase/decrease in volume, allowing 32 levels of volume, from 00000 to 11111. each step in bit 6 corresponds to a 20db increase in volume. table 11. mx0e mic volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:7 - reserved 6 r/w 20db boost control 0: normal 1: 20db boost 5 - reserved 4:0 r/w mic volume (mv[4:0]) in 1.5db steps for mv 00h 08h 1fh +12db gain 0db attenuation -34.5db gain alc850(d) datasheet eight channel ac?97 2.3 audio codec 12 track id: jatr-1076-21 rev. 1.3 7.1.7. mx10 line_in volume default: 8808h register 10h controls the line _in input volume. each step in bits 4:0 corresponds to a 1.5db increase/decrease in volume for the right channe l, allowing 32 levels of volume, from 00000 to 11111. each step in bits 12:8 corresponds to a 1.5db increase/decrease in volum e for the left channel, allowing 32 levels of volume, from 00000 to 11111. table 12. mx10 line_in volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w line-in left volume (nl[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w line-in right volume (nr[4:0]) in 1.5db steps for nl/nr 00h 08h 1fh +12db gain 0db attenuation -34.5db gain 7.1.8. mx12 cd volume default: 8808h register 12h controls the cd input volume. each step in bits 4:0 corresponds to a 1.5db increase/decrease in volume for the right channe l, allowing 32 levels of volume, from 00000 to 11111. each step in bits 12:8 corresponds to a 1.5db increase/decrease in volum e for the left channel, allowing 32 levels of volume, from 00000 to 11111. table 13. mx12 cd volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w cd left volume (cl[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w cd right volume (cr[4:0]) in 1.5db steps for cl/cr 00h 08h 1fh +12db gain 0db attenuation -34.5db gain alc850(d) datasheet eight channel ac?97 2.3 audio codec 13 track id: jatr-1076-21 rev. 1.3 7.1.9. mx16 aux input /back-surround output volume default: 8808h register 16h controls the volume of auxiliary input and back surround output. each step in bits 4:0 corresponds to a 1.5db increase/decr ease in volume for the right channe l, allowing 32 levels of volume, from 00000 to 11111. each step in bits 12:8 corresponds to a 1.5db increase/decrease in volume for the left channel, allowing 32 leve ls of volume, from 00000 to 11111. table 14. mx16 aux input /back-surround output volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w aux left volume (al[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w aux right volume (ar[4:0]) in 1.5db steps for al/ar 00h 08h 1fh +12db gain 0db attenuation -34.5db gain 7.1.10. mx18 pcm_out volume default: 8808h register 18h controls the pcm_out output volume of front dac. each st ep in bits 4:0 corresponds to a 1.5db increase/decrease in volume for the right cha nnel, allowing 32 levels of volume, from 00000 to 11111. each step in bits 12:8 corres ponds to a 1.5db increase/decrease in volume for the left channel, allowing 32 levels of volume, from 00000 to 11111. table 15. mx18 pcm_out volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w pcm left volume (pl[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w pcm right volume (pr[4:0]) in 1.5db steps for pl/pr 00h 08h 1fh +12db gain 0db attenuation -34.5db gain alc850(d) datasheet eight channel ac?97 2.3 audio codec 14 track id: jatr-1076-21 rev. 1.3 7.1.11. mx1a record select default: 0000h register 1ah controls the reco rd input volume. each step in bits 2:0 corresponds to a 1.5db increase/decrease in volume for the right channel, allowing 7 levels of volume, from 000 to 111. each step in bits 10:8 corresponds to a 1.5db increase/decrease in volume for th e left channel, allowing 7 levels of volume, from 000 to 111. table 16. mx1a record select bit type function 15:11 - reserved 10:8 r/w left record sour ce select (lrs[2:0]) 7:3 - reserved 2:0 r/w right record source select (rrs[2:0]) for lrs 0 1 2 3 4 5 6 7 mic cd left mute aux left line left stereo mixer output left mono mixer output phone for rrs 0 1 2 3 4 5 6 7 mic cd right mute aux right line right stereo mixer output right mono mixer output phone alc850(d) datasheet eight channel ac?97 2.3 audio codec 15 track id: jatr-1076-21 rev. 1.3 7.1.12. mx1c record gain default: 8000h register 1ch controls the record gain. each step in bits 3:0 corresponds to a 1.5db increase/decrease in gain for the right channel, allowing 16 levels of gain, from 0000 to 1111. each step in bits 11:8 corresponds to a 1.5db increase/decrease in gain for th e left channel, allowing 16 levels of gain, from 0000 to 1111. table 17. mx1c record gain bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:12 - reserved 11:8 r/w left record gain select (lrg[3:0]) in 1.5db steps 7:4 - reserved 3:0 r/w right record gain select (rrg[3:0]) in 1.5db steps for lrg/rrg 0fh 00h +22.5db gain 0db(no gain) 7.1.13. mx20 general purpose register default: 0000h this register is used to control several functions. bit 13 enables or disables 3d control. bit 9 allows selection of mono output. bit 8 contro ls the mic selector. bit 7 enable s loopback of the ad output to the da input without involving the ac-link, allowi ng for full system performance measurements. table 18. mx20 general purpose register bit type function 15:12 - reserved. read as 0 11:10 r drss[1:0], double rate slot select 01: pcm(n+1) data is on slots 7/8 (default) 00, 10, 11: reserved 9 - reserved. read as 0 8 r/w mic select 0: mic1 1: mic2 7 r/w ad to da loop-back control 0: disable 1: enable 6:0 - reserved note: bit 7 enables adc to front dac loop-back. alc850(d) datasheet eight channel ac?97 2.3 audio codec 16 track id: jatr-1076-21 rev. 1.3 7.1.14. mx24 audio interrupt and paging default: 0000h table 19. mx24 audio interrupt and paging bit type function 15 interrupt status, i4 0: interrupt is clear 1: interrupt was generated interrupt event and status are clear by writing a 1 to this bit. the status will change regardless of interrupt enable (i0) 14 r interrupt cause, i3 reserved. read as 0 13 r interrupt cause, i2 i2=0: sense value in page id-01h mx6a[12:8] has not changed 1: sense cycle completed or new sense value in page id-01h mx6a[12:8] is available this bit reflects the cause of the first interrupt ev ent generated. software should read it after the interrupt status (i4) has been confirmed as inte rrupting. i2 will be zero when i4 is cleared 12 r/w sense cycle, i1 0: sense cycle not in progress 1: sense cycle start writing a ?1? to this bit causes a sense cycle start. if a sense cycle is in progress, writing a ?0? to this bit will abort the sense cycle whether the data in the sense result register (page id-01h mx6a) is valid or not is determined by the iv bit in mx6a, page id-1h 11 r/w interrupt enable, i0 0: interrupt is masked. interrupt status (i4) will not be shown in bit 0 of slot 12 in sdata-in 1: interrupt is un-masked. interrupt status (i4) will be shown in bit 0 of slot 12 in sdata-in this bit controls the interrupt of the sense cycle 10:4 na reserved. read as 0 3:0 r/w page selector, pg[3:0] 0000b: vendor specific 0001b: page id 01 (ac?97 2.3 discovery descriptor definition) others: reserved this register is used to select a descriptor of 16 word pages between registers mx60 and mx6f. a value of 0 is used to select ve ndor specific space to maintain comp atibility with the ac?97 2.2 vendor specific register. when pg[3:0] is not 0000b or 0001b, the alc850(d) will return zero data for the aclink mixer read command alc850(d) datasheet eight channel ac?97 2.3 audio codec 17 track id: jatr-1076-21 rev. 1.3 7.1.15. mx26 power down control/status default: 0000h this read/write register is used to program power-down states and monitor subsystem readiness. the lower half of this register is read -only; a ?1? indicating that the subsect ion is ?ready?. ready is defined as the subsection?s ability to perform in its nominal st ate. when the ac-link ?codec ready? indicator bit (sdata_in slot 0, bit 15) is 1, it indicates that the ac-link and ac?97 control a nd status registers are in a fully operational state. the ac?97 controller must further probe this power down control/status register to determine exactly which s ubsections, if any, are ready. table 20. mx26 power down control/status bit type function 15 r/w pr7 external amplifier power down (eapd) 0: eapd output low (enable external amplifier) 1: eapd output high (shut down external amplifier) 14 - reserved 13 r/w pr5 0: normal 1: disable internal clock usage (bclk remains output for modem codec) 12 r/w pr4 0: normal 1: power down ac-link 11 r/w pr3 0: normal 1: power down mixer (vref off) 10 r/w pr2 0: normal 1: power down mixer (vref still on) 9 r/w pr1 0: normal 1: power down pcm dac (front dac) 8 r/w pr0 0: normal 1: power down pcm adcs and input mux 7:4 - reserved. read as 0 3 r vref status 1: vref is up to normal level 0: not yet 2 r analog mixer status 1: ready 0: not yet 1 r dac status 1: ready 0: not yet 0 r adc status 1: ready 0: not yet alc850(d) datasheet eight channel ac?97 2.3 audio codec 18 track id: jatr-1076-21 rev. 1.3 7.1.16. mx28 extended audio id default: 09c4h the extended audio id register is a read-only regist er used to communicate information to the digital controller. table 21. mx28 extended audio id bit type function 15:14 r id[1:0]. always read as 0 (only primary id is supported) 13:12 - reserved. read as 0 11:10 r rev [1:0]=10 to indicate that the alc850(d) is ac?97 rev. 2.3 compliant 9 r amap. read as 0 8 r ldac. read as 1 (lfe dac is supported, in compliance with ac?97 rev. 2.3) 7 r sdac. read as 1 (surround dac is supported, in compliance with ac?97 rev. 2.3) 6 r cdac. read as 1 (center dac is supported, in compliance with ac?97 rev. 2.3) 5:3 - reserved. read as 0 2 r s/pdif. read as 1 (s/pdif output is supported) 1 r dra. read as 0 (double rate audio is not supported) 0 r vra. read as 0 (variable rate audio is not supported) 7.1.17. mx2a extended audio status and control register default: 05f0h this register contains two active bits for power-dow n and status of the surrounding dacs. bits 1 & 2 are read/write bits that are used to enable or disable dra and s/pdif respectively. bits 4 & 5 are read/write bits used to determine the ac-link slot assignment of the s/pdif. bits 6, 7, & 8 are read-only bits that tell the controller when the center, surround, and lfe dacs are ready to receive data. bit 10 is a read- only bit that tells the controller if the s/pdif co nfiguration is valid. bits 11, 12, & 13 are read/write bits that are used to power down the cent er, surround, and lfe dacs respectively. table 22. mx2a extended audio status and control register bit type function 15 r/w validity configuration of s/pdif output (vcfg) combines with mx3a.15 to decide validity control in s/pdif output signal 14 - reserved 13 r/w power down lfe dac (prk) 0: normal 1: power down lfe dac 12 r/w power down surround dac (prj) 0: normal 1: power down surround dac 11 r/w power down center dac (pri) 0: normal 1: power down center dac 10 r spcv (s/pdif configuration valid) 0: current s/pdif configuration (spsa, spsr, dac/slot rate) is not valid 1: current s/pdif configuration (spsa, spsr, dac/slot rate) is valid alc850(d) datasheet eight channel ac?97 2.3 audio codec 19 track id: jatr-1076-21 rev. 1.3 bit type function 9 - reserved 8 r lfe dac status (ldac) 0: not yet 1: ready 7 r surround dac status (sdac) 0: not yet 1: ready 6 r center dac status (cdac) 0: not yet 1: ready 5:4 r/w s/pdif-out slot assignment (spsa[1:0]) 00: s/pdif-out source is from ac-link slot 3/4 01: s/pdif-out source is from ac-link slot 7/8 10: s/pdif-out source is from ac-link slot 6/9 11: s/pdif-out source is from ac-link slot 10/11 (default) 3 - reserved 2 r/w s/pdif enable 1: enable 0: disable (hi-z) 1 r/w dra enable 1: enable 0: disable 0 r/w vra enable 1: enable 0: disable note: spcv is a read-only bit that indicates whether the current s/pdif-out configuration is supported or not. if the configuration is supported, spcv is set as 1 by h/w. the driver can check this bit to determine the status of the s/pdif transmitter system. spcv is always operating, independent of the s/pdif enable bit (mx2a.2). the s/pdif output is active if mx2a.2 is set, in spite of spcv. if s/pdif output is enabled, but spcv is invalid (spcv=0), channel status is still output, but the output data bits will be all zeros. the c ondition that allows s/pdif output is s/pdif(mx2a.2)=1 & spacv=1, otherwise s/pdif output will be all zeros when mx2a.2=1 and spacv=0 (invalid). 7.1.18. mx2c pcm front/ center output sample rate default: bb80h table 23. mx2c pcm front/center output sample rate bit type function 15:0 r front/center output sample rate (fosr) alc850(d) datasheet eight channel ac?97 2.3 audio codec 20 track id: jatr-1076-21 rev. 1.3 7.1.19. mx2e pcm surro und output sample rate default: bb80h table 24. mx2e pcm surround output sample rate bit type function 15:0 r surround output sample rate (sosr) 7.1.20. mx30 pcm lfe output sample rate default: bb80h table 25. mx30 pcm lfe output sample rate bit type function 15:0 r lfe output sample rate (losr) 7.1.21. mx32 pcm input sample rate default: bb80h table 26. mx32 pcm input sample rate bit type function 15:0 r/w adc input sample rate (aisr) 7.1.22. mx36 lfe/center master volume default: 8080h table 27. mx36 lfe/center master volume bit type function 15 r/w lfe mute control 0: normal 1: mute (- db) 14 - reserved 13:8 r/w lfe master volume (lfe[5:0]) in 1.5db steps 7 r/w center mute control 0: normal 1: mute (- db) 6 - reserved 5:0 r/w center master volume (cnt[5:0]) in 1.5db steps for lfe/cen 00h 3fh 0db 94.5db attenuation alc850(d) datasheet eight channel ac?97 2.3 audio codec 21 track id: jatr-1076-21 rev. 1.3 7.1.23. mx38 surround master volume default: 8080h table 28. mx38 surround master volume bit type function 15 r/w left mute control 0: normal 1: mute (- db) 14 - reserved 13:8 r/w surround master left volume (lsr[5:0]) in 1.5db steps 7 r/w right mute control 0: normal 1: mute (- db) 6 - reserved 5:0 r/w surround master right volume (rsr[5:0]) in 1.5db steps for lsr/rsr 00h 3fh 0db 94.5db attenuation 7.1.24. mx3a s/pdif output ch annel status and control default: 2000h table 29. mx3a s/pdif output channel status and control bit type function 15 r/w validity control (control v bit in sub-frame) 0: the v bit (valid flag) in the sub-frame depends on whether or not the s/pdif fifo has under-run 1: the v bit in the sub-frame is always sent as 1 to indicate the data is invalid 14 reserved 13:12 r s/pdif out sample rate (spsr[1:0]) 00, 01, 11: reserved 10: sample rate is 48.0khz, fs[0:3]=0100 (default) 11 r/w generation level (level) 10:4 r/w category code (cc [6:0]) 3 r/w pre-emphasis (pre) 0: none 1: filter pre-emphasis is 50/15 sec 2 r/w copyright (copy) 0: asserted 1: not asserted 1 r/w non-audio data type (/audio) 0: pcm data 1: ac3 or other digital non-audio data 0 r professional or consumer format (pro) 0: consumer format 1: professional format the alc850(d) only supports consumer cha nnel status format. this bit is always 0 alc850(d) datasheet eight channel ac?97 2.3 audio codec 22 track id: jatr-1076-21 rev. 1.3 to ensure that control and status information is sent at the beginning of s/pdif transmission (starting at bit31), mx3a.[14:0] should only be wr itten to when the s/pdif transm itter is disabled (mx2a.2=0). if validity control is set (mx3a.15=1), the data bits (bit8 ~ bit27) should be forced to 0 to get better compatibility with mini discs. table 30. s/pdif channel status 0 1 2 3 4 5 6 7 pro=0 /audio copy pre 0 0 0 0 8 9 10 11 12 13 14 15 cc0 cc1 cc2 cc3 cc4 cc5 cc6 level 16 17 18 19 20 21 22 23 0 0 0 0 0 0 0 0 24 25 26 27 28 29 30 31 fs0 fs1 fs2 fs3 0 0 0 0 the ?v? bit in the sub-frame is determined by validity control (mx3a.15) and vcfg (mx2a.15): table 31. s/pdif validity control validity vcfg operation 0 0 if s/pdif fifo is under-run, the ?v? bit in the sub-frame is set to indicate that the s/pdif data is invalid 0 1 if s/pdif fifo is under-run, the ?v? bit in the sub-frame is always 0, and pads the data with zeros 1 0 the ?v? bit is always 1, and data bits (bit 8 ~ bit 27) should be forced to 0 1 1 the ?v? bit in the sub-frame is always ?0?, and the s/pdif output data should be forced to 0 alc850(d) datasheet eight channel ac?97 2.3 audio codec 23 track id: jatr-1076-21 rev. 1.3 7.2. vendor defined registers (page id-00h) these registers are available to realtek customers for specialized functions. 7.2.1. mx60 s/pdif input channel status [15:0] default: 0000h the data in mx60 are captured from the chan nel status [15:0] of the s/pdif-in signal. table 32. mx60 s/pdif input channel status [15:0] bit type function 15 r generation level (level) 14:8 r category code (cc[6:0]) 7:6 r mode[1:0] 5:3 r pre-emphasis (pre[2:0]) 2 r copyright (copy) 0: asserted 1: not asserted 1 r non-audio data type (/audio) 0: pcm data 1: ac3 or other digital non-audio data 0 r professional or consumer format (pro) 0: consumer format 1: professional format the alc850(d) only supports consumer cha nnel status format. this bit is always 0 7.2.2. mx62 s/pdif input channel status [29:15] default: 0000h the data in mx62 are captured from the chan nel status [29:16] of the s/pdif-in signal. table 33. mx62 s/pdif input channel status [29:15] bit type function 15 r ?v? bit in sub-frame of s/pdifi, s/pdifi_v 0: data x and y are valid 1: at least one of data x and y is invalid this bit is real-time updated. it indicates that the alc850(d) is ready to receive s/pdif-in data 14 r s/pdif-in input signal locked by hardware, s/pdifi_lock 0: unlocked 1: locked 13:12 r clock accuracy (ca[1:0]) 11:8 r sample frequency in channel status (fs[3:0]) 0000: 44.1khz 0010: 48khz 0011: 32khz others: reserved 7:4 r channel number (cn[3:0]) 3:0 r source number (sn[3:0]) note: bits [13:0] are captured from the channel status [29:16 ] of s/pdifi. the data from s/pdif input is forced to 0 if the s/pdif input signal is unlocked. softw are must check this ?lock? bit before dealing with s/pdif input operations. alc850(d) datasheet eight channel ac?97 2.3 audio codec 24 track id: jatr-1076-21 rev. 1.3 7.2.3. mx64 surround dac volume default: 0808h (unmuted) table 34. mx64 surround dac volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w surround dac left volume (sdl[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w surround dac right volume (sdr[4:0]) in 1.5db steps for sdl/sdr 00h 08h 1fh +12db gain 0db gain -34.5db gain 7.2.4. mx66 center/lfe dac volume default: 0808h (unmuted) table 35. mx66 center/lfe dac volume bit type function 15 r/w mute control 0: normal 1: mute (- db) 14:13 - reserved 12:8 r/w lfe dac volume (ld[4:0]) in 1.5db steps 7:5 - reserved 4:0 r/w center dac volume (cd[4:0]) in 1.5db steps for ld/cd 00h 08h 1fh +12db gain 0db gain -34.5db gain alc850(d) datasheet eight channel ac?97 2.3 audio codec 25 track id: jatr-1076-21 rev. 1.3 7.2.5. mx6a data flow control this register is used to control various parts of the alc850(d) multi-channel functions. default: 0000h table 36. mx6a data flow control bit type function 15 rw spdif input enable 0: disable (default) 1: enable 14 r/w spdif-in monitoring control 0: disable. spdifi data is not added into pcm data to dac (default) 1: enable. msb 16-bit of spdifi data will be adde d into pcm data to dac if spdifi is locked 13:12 r/w s/pdif output source 00: s/pdif output data is from aclink (default) 01: s/pdif output data is from adc 10: directly bypass s/pdif-in signal to s/pdif-out 11: reserved 11 r/w pcm data to ac-link 0: pcm data are from adc (default) 1: pcm data are from s/pdif input 10 r/w aux in/back surround output control 0: pin 14 is aux-in-l, pin-15 is aux-in-r (default) 1: pin 14 is back-surround-out-l, pin-15 is back-surround-out-r 9 r/w analog input pass to back surround control 0: off (default) 1: on 8 r/w front-mic/mono-out control 0: pin 37 is analog input (front microphone in) (default) 1: pin 37 is duplicated output of mono-out 7:6 reserved 5 r/w analog input pass to center/lfe control 0: off (default) 1: on 4 r/w analog input pass to surround control 0: off (default) 1: on 3:1 reserved 0 r/w surround output source 0: s-out is the real surround output (default) 1: s-out is the duplicated output of line-out alc850(d) datasheet eight channel ac?97 2.3 audio codec 26 track id: jatr-1076-21 rev. 1.3 7.3. discovery descriptor (page id-01h) these registers are defined in ac?97 2.3 for sensing and analog plug and play functions. 7.3.1. mx62 pci sub system id default: ffffh table 37. mx62 pci sub system id bit type function 15:0 r/w pci sub system vendor id this register can be written once only after power on, and is not affected by an ac?97 cold reset. the system manufacture?s bios can set its own sub-system id the default value ?ffffh? means this register is implemented and data is not set by the bios 7.3.2. mx64 pci sub vendor id default: ffffh table 38. mx64 pci sub vendor id bit type function 15:0 r/w pci vendor id this register can be written once only after power on, and is not affected by an ac?97 cold reset. the system manufacture?s bios can set its own sub-vendor id the default value ?ffffh? means this register is implemented and data is not set by the bios 7.3.3. mx66 sense function select default: 0000h table 39. mx66 sense function select bit type function 15:5 reserved 4:1 r/w function code bits (fc[3:0]) these bits specify the type of audio function described in page id 01h mx66, mx68, and mx6a. 0h: front-out (pin-35/36) 1h: surr-out (pin-39/41) 2h: cen/lfe-out (pin-43/44) 5h: mic1 in (pin-21) 6h: mic2 in (pin-22) 7h: line in (pin-23/24) others: reserved 0 r/w tip or ring selection (t/r) this bit sets which jack conductor the sense value is measured from. it is combined with fc[3:0] 0: tip (left channel) 1: ring (right channel) alc850(d) datasheet eight channel ac?97 2.3 audio codec 27 track id: jatr-1076-21 rev. 1.3 7.3.4. mx68 sense function information default: 0011h table 40. mx68 sense function information bit type function 15:5 - reserved 4 r/w information valid bit, iv 0: after a sense cycle is completed, indicates that no information is provided on the sensing method 1: after a sense cycle is completed, indicates that information is provided on the sensing method clear this bit by writing ?1?. writing ?0? to this bit has no effect 3:1 na reserved 0 r function information present (fip) when this bit is set to ?0?, indicates that the g[4:0], inv, dl[4:0] and st[2:0] bits are not supported 7.3.5. mx6a sense detail default: 0000h table 41. mx6a sense detail bit type function 15:13 - reserved 12:8 r sense bits, s[4:0] (default value depends on sensed result after cold reset) for output devices: (fc[3:0]= 0h, 1h, or 2h) 02h: not specified or unknown 05h: powered speaker 06h: earphone or passive speaker other: not supported for input devices: (fc[3:0]= 5h, 6h, or 7h) 12h: not specified or unknown 13h: mono microphone 15h: stereo line-in other: not supported this field reports the type of output/input peri pheral plugged into the jack after sensing 7:0 r always read as 0 alc850(d) datasheet eight channel ac?97 2.3 audio codec 28 track id: jatr-1076-21 rev. 1.3 7.4. extension registers 7.4.1. mx76 gpio & interrupt control default: 0000h table 42. mx76 gpio & interrupt control bit type function 15 r/w mute control of front-mic1/2 0: normal 1: mute (default) 14:12 r/w pin-23/24 uio2 function selection 000: line in-l/r (default) 001: mic1/mic2 010: surr 011: detection circuit 100: nc (floating) 11 r/w vrefout3 disable 0: vrefout3 is driven by the internal reference 1: vrefout3 is in high-z mode (default) 10:8 r/w pin-35/36 uio1 function selection 000: line in-l/r 001: mic1/mic2 010: front-out (default) 011: detection circuit 100: nc (floating) 7 r/w vrefout2 disable 0: vrefout2 is driven by the internal reference 1: vrefout2 is in high-z mode (default) 6:4 r/w pin-21/22 uio3 function selection 000: line in-l/r 001: mic1/mic2 (default) 010: surr 011: detection circuit 100: nc (floating) 101: cen/lfe 3:2 r/w impedance detect for pad 23/24 (fo-control 2, 3, and 4) 01: via 100ohm path 10: via 2.2k path 11: via 47k path 00: all path floating (default) software must turn on surround amp and turn off surr-out control before detecting 1:0 r/w impedance detect for pad 21/22 (fo-control 2, 3, and 4) 01: via 100ohm path 10: via 2.2k path 11: via 47k path 00: all path floating (default) software must turn on surround amp and turn off surr-out control before detecting alc850(d) datasheet eight channel ac?97 2.3 audio codec 29 track id: jatr-1076-21 rev. 1.3 7.4.2. mx78 gpio & interrupt status default: 0000h table 43. mx78 gpio & interrupt status bit type function 15:13 reserved 12 r jd5 input status 0: jd4 is driven low by external device (input) 1: jd4 is driven high by external device (input) digital design need to tie the original control signal to low 11 r jd4 input status 0: jd4 is driven low by external device (input) 1: jd4 is driven high by external device (input) 10 r jd3 input status. 0: jd3 is driven low by external device (input) 1: jd3 is driven high by external device (input) 9 r/w gpio1 primitiveness control 0: set gpio1(jd1) as input pin 1: set gpio1(jd1) as output pin 8 r/w gpio0 primitiveness control 0: set gpio0(jd0) as input pin 1: set gpio0(jd0) as output pin 7 r/w pin 13 function selection 0: phone in 1: enable jd5 (default) if jd5 is enabled, recording from phone input is forbidden by software 6:4 reserved 3 r/w pin 47 function selection 0: eapd 1: spdif input (default) 2 r jd2 input status 0: jd2 is driven low by external device (input) 1: jd2 is driven high by external device (input) 1 r/w gpio1(jd1) input/output status 0: gpio1 is driven low by/to external device 1: gpio1 is driven high by/to external device 0 r/w gpio0(jd0) input/output status 0: gpio0 is driven low by/to external device 1: gpio0 is driven high by/to external device alc850(d) datasheet eight channel ac?97 2.3 audio codec 30 track id: jatr-1076-21 rev. 1.3 7.4.3. mx7a miscellaneous control default: 2092h table 44. mx7a miscellaneous control bit type function 15 reserved 14 r/w mix control 0: add mix and front dac output (default) 1: turn off mix, only dac output 13 r/w cen/lfe-out 1k ? control (c/lf-control) 0: 1k ? path at pin 43 and 44 are off 1: 1k ? path at pin 43 and 44 are on (default) 12 r/w vrefout disable 0: vrefout is driven by the internal reference (default) 1: vrefout is in high-z mode software must set this bit to disable vrefout output before mic1 and mic2 are shared as center and lfe output 11:8 reserved 7 r/w front-out amplifier control (fo-control) 0: amplifier at pin 35 and 36 are high impedance (off) 1: amplifier at pin 35 and 36 are turned on (default) 6 r/w front-out 1k ? control (front-control) 0: 1k ? path at pin 35 and 36 are off (default) 1: 1k ? path at pin 35 and 36 are on 5 r/w surr amplifier control (so-control) 0: amplifier at pin 39 and 41 are high impedance (off) (default) 1: amplifier at pin 39 and 41 are turned on 4 r/w surr-out 1k ? control (surr-control) 0: 1k ? path at pin 39 and 41 are off 1: 1k ? path at pin 39 and 41 are on (default) 3:2 reserved 1 r/w surr-out control 0: off 1:on (default) 0 reserved alc850(d) datasheet eight channel ac?97 2.3 audio codec 31 track id: jatr-1076-21 rev. 1.3 7.4.4. mx7c vendor id1 the two registers (mx7c vendor id1 and mx7e vendor id2) contain four 8-bit id codes. the first three codes have been assigned by mi crosoft for plug and play definition s. the fourth code is a realtek assigned code identifying the alc850(d). the mx7c vendor id1 register contains the value 414ch, which is the first and second characters of the mi crosoft id code. the mx 7c vendor id2 register contains the value 4790h, which is the thir d character of the microsoft id code. default: 414ch table 45. mx7c vendor id1 bit type function 15:0 r vendor id - ?al? 7.4.5. mx7e vendor id2 default: 4790h table 46. mx7e vendor id2 bit type function 15:8 r vendor id - ?g? 7:4 r chip id - 1001b (alc850(d)) 3:0 r version number - 0000b alc850(d) datasheet eight channel ac?97 2.3 audio codec 32 track id: jatr-1076-21 rev. 1.3 8. electrical characteristics 8.1. dc characteristics 8.1.1. absolute maximum ratings table 47. absolute maximum ratings parameter symbol minimum typical maximum units power supplies: digital analog dvdd av d d 3.0 3.0 3.3 5.0 3.6 5.5 v v ambient operating temperature ta 0 - +70 o c storage temperature ts +125 o c esd (electrostatic discharge) susceptibility voltage 3000v 8.1.2. threshold voltage dvdd= 3.3v 5%, t ambient =25 o c, with 50pf external load. table 48. threshold voltage parameter symbol minimum typical maximum units input voltage range v in -0.30 - dvdd+0.30 v low level input voltage (sync, sdata_out, reset#). v il - 0.5dvdd v low level input voltage (xtal_in,bit_clk) v il - 0.5dvdd v low level input voltage (jds, gpios) v il - 2.0 v high level input voltage (sync, sdata_out, reset#) v ih 0.5dvdd - v high level input voltage (xtal_in,bit_clk) v ih 0.5dvdd - v high level input voltage (jds, gpios) v ih 2.0 - v high level output voltage v oh 0.9dvdd - v low level output voltage v ol - - 0.1dvdd v input leakage current - -10 - 10 a output leakage current (hi-z) - -10 - 10 a output buffer drive current - - 5 - ma internal pull up resistance - 100k 130k ? alc850(d) datasheet eight channel ac?97 2.3 audio codec 33 track id: jatr-1076-21 rev. 1.3 8.1.3. digital filter characteristics table 49. digital filter characteristics filter symbol minimum typical maximum units adc lowpass filter passband 0 - 19.2 khz stopband 28.8 khz stopband rejection -76.0 db passband frequency response +- 0.20 db 8.1.4. s/pdif output characteristics dvdd= 3.3v, t ambient =25 0 c, with 75 ? external load. table 50. s/pdif output characteristics parameter symbol minimum typical maximum units high level output voltage v oh 3.0 3.3 v low level output voltage v ol - 0 0.5 v 8.2. ac timing characteristics 8.2.1. cold reset table 51. cold reset parameter symbol minimum typical maximum units reset# active low pulse width t rst_low 1.0 - - s reset# inactive to bit_clk startup delay t rst2clk 162.8 - - ns bitclk reset# trst_low trst2clk figure 3. cold reset timing alc850(d) datasheet eight channel ac?97 2.3 audio codec 34 track id: jatr-1076-21 rev. 1.3 8.2.2. warm reset table 52. warm reset parameter symbol minimum typical maximum units sync active high pulse width t sync_high 1.0 - - s sync inactive to bit_clk startup delay t sync2clk 162.8 - - ns bitclk sync tsync_high tsync2clk figure 4. warm reset timing 8.2.3. ac-link clocks table 53. ac-link clocks parameter symbol minimum typical maximum units bit_clk frequency - 12.288 - mhz bit_clk period t clk_period - 81.4 - ns bit_clk output jitter - - 750 ps bit_clk high pulse width t clk_high 40.7 ns bit_clk low pulse width t clk_low 40.7 ns sync frequency - 48.0 - khz sync period t sync_period - 20.8 - s sync high pulse width t sync_high - 1.3 - s sync low pulse width t sync_low - 19.5 - s alc850(d) datasheet eight channel ac?97 2.3 audio codec 35 track id: jatr-1076-21 rev. 1.3 8.2.4. data output and input timing table 54. data output and input timing parameter symbol minimum typical maximum units output valid delay from rising edge of bit_clk t co - - 15 ns note 1: timing is for sdata and sync outputs with respect to bit_clk at the device driving the output. note 2: 50pf external load. parameter symbol minimum typical maximum units input setup to falling edge of bit_clk t setup 10 - - ns input hold from falling edge of bit_clk t hold 10 - - ns note: timing is for sdata and sync outputs with respect to bit_clk at the device driving the output. parameter symbol minimum typical maximum units bit_clk combined rise or fall plus flight time - - 7 ns sdata combined rise or fall plus flight time - - 7 ns note: combined rise or fall plus flight times are provided for worst case scenario modeling purposes. bitclk sdata-out sdata-in sync v il tsetup thold figure 5. data output and input timing alc850(d) datasheet eight channel ac?97 2.3 audio codec 36 track id: jatr-1076-21 rev. 1.3 8.2.5. signal rise and fall timing table 55. signal rise and fall timing parameter symbol minimum typical maximum units bit_clk rise time trise clk - - 6 ns bit_clk fall time tfall clk - - 6 ns sync rise time trise sync - - 6 ns sync fall time tfall sync - - 6 ns sdata_in rise time trise din - - 6 ns sdata_in fall time tfall din - - 6 ns sdata_out rise time trise dout - - 6 ns sdata_out fall time tfall dout - - 6 ns note1: 75pf external load (50 pf in ac?97 rev2.1) note2: rise is from 10% to 90% of vdd (v ol to v oh ) note3: fall is from 90% to 10% of vdd (v oh to v ol ) bit_clk tfall clk trise clk sync tfall sync trise sync sdata_in tfall din trise din sdata_out tfall dout trise dout figure 6. signal rise and fall timing alc850(d) datasheet eight channel ac?97 2.3 audio codec 37 track id: jatr-1076-21 rev. 1.3 8.2.6. ac-link low power mode timing table 56. ac-link low power mode timing parameter symbol minimum typical maximum units end of slot 2 to bit_clk, sdata_in low t s2_pdown - - 1.0 s ts2_pdown slot-2 slot-1 write to mx26 set pr4 sync bitclk sdata-out sdata-in figure 7. ac-link low power mode timing alc850(d) datasheet eight channel ac?97 2.3 audio codec 38 track id: jatr-1076-21 rev. 1.3 8.2.7. ate test mode to meet ac?97 rev. 2.3 specifications, eapd, s/pd ifo, bit_clk and sdata_ in should be floating in test mode. table 57. ate test mode parameter symbol minimum typical maximum units setup to trailing edge of reset# (also applies to sync) t setup2rst 15.0 - - ns rising edge of reset# to hi-z delay t off - - 25.0 ns toff tsetup2rst reset# sdata-out sdata-in, bitclk hi-z figure 8. ate test mode timing 8.2.8. ac-link io pin capacitance and loading table 58. ac-link io pin capacitance and loading output pin 1 codec 2 codec 3 codec 4 codec bit_clk (must support 2 codecs) 55pf 62.5pf 75pf 85pf sdata_in 47.5pf 55pf 60pf 62.5pf alc850(d) datasheet eight channel ac?97 2.3 audio codec 39 track id: jatr-1076-21 rev. 1.3 8.2.9. s/pdif output table 59. s/pdif output s/pdif_out minimum maximum units rise time/fall time 0 10 % duty cycle 45 55 % t (h) t (l) t (r) t (f) 90% 50% 10% figure 9. s/pdif output rise time 100 * t ? / (t (l) + t (h) )% fall time 100 * t (f) / (t (l) + t (h) )% duty cycle 100 * t (h) / (t (l) + t (h) )% alc850(d) datasheet eight channel ac?97 2.3 audio codec 40 track id: jatr-1076-21 rev. 1.3 9. analog performance characteristics standard test conditions t ambient =25 o c, dvdd= 3.3v 5%, avdd=5.0v 5% 1khz input sine wave; sampli ng frequency=48khz; 0db=1vrms 10k ? /50pf load; test bench char acterization bw: 10hz~22khz 0db attenuation: tone and 3d disabled table 60. analog performance characteristics parameter minimum typical maximum units full scale input voltage: line inputs (mixers) line inputs (a/d) mic input (0db) mic input (20db boost) - - - - 1.6 1.0 1.6 0.16 - - - - vrms full scale voltage: dacs adc - - 1.10 1.10 - - vrms vrms analog to analog s/n: cd to line-out other to line-out - - 95 95 - - db analog frequency response 10 - 22,000 hz s/n (a-weighted): d/a a/d - - 86 92 - - db total harmonic distortion: d/a a/d - - -70 -86 - - db d/a & a/d frequency response 16 - 19,200 hz transition band 19,200 - 28,800 hz stop band 28,800 - hz stop band rejection - -70 - db out-of-band rejection (28.8khz~100khz) - -60 - db power supply rejection ratio - -40 - db mic boost gain - 20 - db master volume. 32 step: step size attenuation control range - 0 1.5 - - -46.5 db db pc beep volume. 16 step: step size attenuation control range - 0 3.0 - - -45 db db analog mixer volume. 32 step: step size gain control range - -34.5 1.5 - - +12 db db alc850(d) datasheet eight channel ac?97 2.3 audio codec 41 track id: jatr-1076-21 rev. 1.3 parameter minimum typical maximum units record gain. 16 step: step size gain control range - 0 1.5 - - +22.5 db db input impedance (gain=0db, mixer=off): line-in, cd-in, aux-in, mic1/mic2 pcbeep, phone - - 64 16 - - k ? k ? output impedance: amplifier outputs outputs without amplifier - - 5 200 - 1000 ? ? amplifier maximum output power: @20 ? load - - 50 mw power supply current: va = 5 . 0 v va = 3 . 3 v vd=3.3v - - - 59 43 15 - - - ma ma ma power down current: va=5.0v/3.3v vd=3.3v - - - - 7.8/5.3 9 ma ma vrefout/vrefout2/vrefout3 - 2.50 4.0 v vrefout drive current - 5 - ma alc850(d) datasheet eight channel ac?97 2.3 audio codec 42 track id: jatr-1076-21 rev. 1.3 10. design and layout guide 10.1. clocking the clock source is decided by xtlsel latched from pin-46 after power-on reset. the clock source of different configurations is listed below: table 61. clocking configuration operation & id0 pin-46 (xtlsel)* id0 bit-clk clock source nc 0 (primary) output 12.288mhz crystal or ext. 24.576mhz is attached at xtl-in low** 0 (primary) output 12.288mhz crystal or ext. 14.318mhz is attached at xtl-in nc 0 (primary) input 12.288m input at bit-clk*** *pin-46 is internally pulled high by a weak resistor. **low: pulled low by a 0 ohm resistor. nc: not connected or pulled high. ***according to ac?97 ver 2.3, in primary mode, if a clock is present at bit-clk pin for at least 5 cycles before reset# is de-asserted, the alc850(d) is a consumer of bi tclk. the alc850(d) uses ext ernal 12.288mhz bitclk as its clock source. 10.2. ac-link when the alc850(d) receives serial data from th e ac?97 controller, it samples sdata_out on the falling edge of bit_clk. when the alc850(d) sends serial data to th e ac?97 controller, it starts to drive sdata_in on the ri sing edge of bit_clk. the alc850(d) will return any unins talled bits or registers with 0 for read operations. the alc850(d) also stuffs the unimplemented slot or bit with 0? s in sdata_in. note that ac-link is msb-justified. refer to the ac?97 component spec ification, revision 2.3, for details. slot# 0 1 2 3 4 5 6 7 8 9 10 11 12 sdata-out tag cmd data pcm l pcmr cen surr l surr r lfe s/pdifl s/pdifl sdata-in tag add data pcm l pcmr default alc850(d) slot arrangement ? codec id = 00 (the alc850(d) supports primary mode only). sync alc850(d) datasheet eight channel ac?97 2.3 audio codec 43 track id: jatr-1076-21 rev. 1.3 10.3. reset there are three types of reset oper ations: cold, register, and warm. table 62. reset reset type trigger condition codec response cold assert reset# for a specified period reset all hardware logic and all registers to default values register write register indexed 00h reset all registers to default values warm driven sync high for specified period without bit_clk reactivates ac-link. no change to register values the ac?97 controller should drive sync and sdata_out low during th e period of reset# assertion to guarantee that the alc850( d) has reset successfully. 10.4. cd input for noise cancellation reasons, it is important to pa y attention to differential cd input. below is an example of differential cd input. figure 10. example of differential cd input alc850(d) datasheet eight channel ac?97 2.3 audio codec 44 track id: jatr-1076-21 rev. 1.3 10.5. odd addressed register access the alc850(d) will return ?0000h? when odd-addr essed and unimplemented registers are read. 10.6. power down mode for power saving reasons, it is important to pay atte ntion to the power-down control register (index 26h), especially pr4 (power-down ac-link). normal adcs off dacs off digital i/f off shut off ac-link default pr0=1 pr1=1 pr2=1 pr3=1 pr4=1 pr0=0 cold reset codec ready pr2=0 pr3=1 pr1=0 pri/j/k=0 pri/j/k=1 warm reset mixer off vref on/ off figure 11. power-down control 10.7. test mode to provide compatibility with ac?97 rev. 2.2, the al c850(d) will float its digi tal output pins in ate test mode. please refer to ac?97 rev. 2.2, section 9.2, for a detailed description of the test modes. 10.7.1. ate in circuit test mode sdata_out is sampled high at the trailing edge of reset#. in this mode, the alc850(d) will drive bit_clk, sdata_in, eapd, and s/pdifo to high impedance. 10.7.2. vendor specific test mode vendor specific test mode is not supported. alc850(d) datasheet eight channel ac?97 2.3 audio codec 45 track id: jatr-1076-21 rev. 1.3 10.8. power-off cd function the power-off cd function describes a state where the system has been shut down (digital power is off) when a +5v analog power is supplied the alc850( d) will turn on the cd-in op-amp and output amplifier. it is possible to design a system that can bypass op-amp circuitry and pass cd output directly to the speaker. the figure below indicates the system application ci rcuitry that supports the power-off cd function. the operating mode is determined by +3.3vcc and +5va. table 63. power-off cd function circuitry +3.3vcc +5va +5vstandby operation mode no (0) no (0) no (0) shut down no (0) yes (1) - power-off cd no (0) - yes (1) power-off cd yes (1) no (0) no (0) digital on, analog off yes (1) yes (1) - normal alc850(d) datasheet eight channel ac?97 2.3 audio codec 46 track id: jatr-1076-21 rev. 1.3 the ac?97 controller should drive sync and sdata_out low during th e period of reset# assertion to guarantee that the alc850( d) has reset successfully. +3.3vcc +5va +5vstandby d1 1n5817m/ cyl 1 2 3 4 + 10u + 10u 0.1u 0.1u 1u 1u 1u 0 0 0 alc658 1 9 25 38 4 7 26 42 2 3 5 6 8 10 11 12 13 14 15 16 17 18 20 19 21 22 23 24 27 28 29 30 31 32 33 34 35 36 37 39 40 41 43 44 45 46 47 48 gnd gnd agnd agnd xtl-in xtl-out sdout bitclk sdin sync reset# pc-beep phone aux-l aux-r jd2 jd1/gpio1 cd-l cd-r cd-gnd mic1 mic2 line-l line-r vref vrefout afilt1 afilt2 nc nc vrefout2 front-mic front-out-l mono-out/vrefout3 surr-out-l nc surr-out-r cen-out lfe-out jd0/gpio0 xtlsel spdifi/eapd spdifo d2 1n5817m/ cyl cd-in front-out-r alc850 avdd avdd vdd vdd figure 12. power-off cd function circuitry 11. application circuits application circuits are for design reference only. system designers ar e suggested to visit realtek?s web site to download the latest application circuits. to get the best compatibility in hardware design and software driver, realtek should confirm modifications of a pplication circuits. alc850(d) datasheet eight channel ac?97 2.3 audio codec 47 track id: jatr-1076-21 rev. 1.3 12. mechanical dimensions l1 l see the mechanical dimensions notes on the next page. alc850(d) datasheet eight channel ac?97 2.3 audio codec 48 track id: jatr-1076-21 rev. 1.3 12.1. mechanical dimensions notes millimeter inch symbol min. typ. max. min. typ. max a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 c 0.09 0.20 0.004 0.008 d 9.00 bsc 0.354 bsc d1 7.00 bsc 0.276 bsc d2 5.50 0.217 e 9.00 bsc 0.354 bsc e1 7.00bsc 0.276 bsc e2 5.50 0.217 b 0.17 0.20 0.27 0.007 0.008 0.011 e 0.50 bsc 0.0196 bsc th 0 o 3.5 o 7 o 0 o 3.5 o 7 o l 0.45 0.60 0.75 0.018 0.0236 0.030 l1 1.00 0.0393 title: lqfp-48 (7 .0x7.0x1.6mm) package outline drawing, footprint 2.0mm leadframe material doc. no. approve version 02 dwg no. pkgc-065 check date realtek semico nductor corp. 13. ordering information table 64. ordering information part number package status alc850 48-pin lqfp. standard product ALC850D 48-pin lqfp. alc850 + dolby digital live (software feature) alc850-lf 48-pin lqfp. alc850 + lead (pb)-free package ALC850D-lf 48-pin lqfp. alc880 d + lead (pb)-free package note: see page 4 for lead (pb)-free package and version identification. realtek semiconductor corp. headquarters no. 2, industry east road ix, science-based industrial park, hsinchu, 300, taiwan, r.o.c. tel: 886-3-5780211 fax: 886-3-5776047 www.realtek.com.tw |
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