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1/25 XC9223/xc9224 series 1a driver transistor built-in step-down dc/dc converters ? greeno p eration-com p atible typical application circuit typical performance characteristics ? efficiency vs. output current vin=5v, fosc=1m hz, l=4.7uh(cdrh4d28c), cin=10uf(ceramic), cl=10uf(ceramic) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current: iout (ma) efficiency: effi (%) pwm/pfm pwm vout=1.5v vout=3.3v XC9223b081ax (*1) a capacitor of 2200pf 0.1f is recommended to place at the c dd between the agnd pin and the v in pin. please refer to the page showing instruction on pattern layout for more detail. general description the XC9223/xc9224 series are synchronous step-down dc/dc converters with a 0.21 (typ.) p-channel driver transistor and a synchronous 0.23 (typ.) n-channel switching transistor bui lt-in. a highly efficient and stable cu rrent can be supplied up to 1.0a by reducing on resistance of the built-in transistor. with a high sw itching frequency of 1.0mhz or 2.0mhz, a small inductor is sel ectable; therefore, the XC9223/xc9224 series are ideally suited to applic ations with height limitation su ch as hdd or space-saving applications. current limit value can be chos en either 1.2a (min.) when the lim pin is high level, or 0.6a (min.) when the lim pin is low level for using the power supply which current limit value diff ers such as usb or ac adapter. with the mode/sync pin, the XC9223/xc9224 series provide mode selection of the fixed pwm c ontrol or automatically switchi ng current limit pfm/pwm control. ? as for preventing unwanted switching noise, the XC9223/xc9224 series can be synchronized with an external clock signal within t he range of 25% toward an internal clock signal via the mode /sync pin. for protection agai nst heat damage of the ics, the XC9223/xc9224 series build in three protection functions: int egral latch protection, thermal shutdown, and short-circuit protec tion. with the built-in u.v.l.o. (under voltage lock out) function, the internal p-channel driver transistor is forced off when input voltage becomes 1.8v or lower. ? the XC9223b/xc9224b series? detector function monito rs the discretional voltage by external resistors. features input voltage range : 2.5v ~ 6.0v output voltage range : 0.9v ~ v in (set by fb pin) oscillation frequency : 1mhz, 2mhz (+ 15% accuracy) output current : 1.0a maximum current limit : 0.6a (min.) ~ 0.9a (max) with lim pin=?l? : 1.2a (min.) ~ 2.0a (max.) with lim pin=?h? controls : pwm/pfm or pwm by mode pin protection circuits : thermal shutdown integral latch method short-circuit protection soft-start time : 1ms (typ.) internally set voltage detector : b type (with vd function) d type (without vd function) built-in p-channel mosfet : 0.21
built-in synchronous n-channel mosfet : 0.23
(no schottky barrier diode required) high efficiency : 95% (v in =5.0v, v out =3.3v) synchronized with an external clock signal ceramic capacitor compatible packages : msop-10, usp-10b, sop-8 * sop-8 package is available for the XC9223d type only. etr0509_007 applications ? hdd ? notebook computers ? cd-r / rw, dvd ? pdas, portable communication modems ? digital cameras, video recorders ? various general-purpose power supplies vin=5v, fosc=1mhz, l=4.7 h (cdrh4d28c), cin=10 f (ceramic), cl=10 f (ceramic) XC9223b081ax
2/25 XC9223 / xc9224 series msop-10 (top view) usp-10b (bottom view) function chart 1 2 3 4 8 7 6 5 vin agnd fb lim pgnd lx ce mode/sync ????? ?? ???????????????????? ce pin operational state h on l off *1 *1: except for a voltage detector block in the xc9224 series. mode pin function h pwm control l pwm/pfm automatic control lim pin function h maximum output current: 1.0a l maximum output current: 0.4a pin number msop-10 * usp-10b * sop-8 ** pin name function 1 1 1 v in input 2 2 - v din voltage detector input 3 3 2 a gnd analog ground 4 4 - v dout vd output 5 5 3 fb output voltage monitor 6 6 4 lim over current limit setting 7 7 5 mode/sync mode switch / external clock input 8 8 6 ce chip enable 9 9 7 lx output of internal power switch 10 10 8 p gnd power ground 5 4 3 6 7 8 2 9 110 fb agnd vdout vdin vin lim mode/sync ce lx pgnd pin configuration pin assignment vin 1 vdin 2 agnd 3 vdout 4 fb 5 10 pgnd 9 lx 8 ce 7 mode/sync 6 lim 1. ce pin function 2. mode pin function 3. lim pin function sop-8 (top view) * for msop-10 and usp-10b packages, pleas e short the gnd pins (pin #3 and 10) ** for sop-8 package, please short the gnd pins (pin# 2 and 8)
3/25 XC9223/xc9224 series XC9223 ??????? ? xc9224b ????? designator description symbol description b : with vd function ? transistor built-in, output voltage freely set (fb voltage), current limit: 0.6a/1.2a d : without vd function 0 ?? reference voltage 8 : fixed reference voltage ?? =0, ? =8 1 : 1.0mhz ? dc/dc oscillation frequency 2 : 2.0mhz a : msop-10 d : usp-10b ? package s : sop-8 (for the XC9223d type) r : embossed tape, standard feed ? device orientation l : embossed tape, reverse feed ? ordering information product classification ? selection guide
4/25 XC9223 / xc9224 series lx pgnd ce fb agnd current feedback vin mode/ sync lim current limit pfm buffer driver comparator pwm error amp. vref with soft-start, ce pmw/pfm ramp wave generator, osc thermal shutdown logic lx pgnd ce fb vd vdout agnd current feedback vin mode/ sync vdin lim current limit pfm buffer driver comparator pwm error amp. vref with soft-start, ce pmw/pfm ramp wave generator, osc thermal shutdown logic ? XC9223d series block diagram ? XC9223b/xc9224b series
5/25 XC9223/xc9224 series *1: when implemented on a pcb. parameter symbol ratings units v in pin voltage v in - 0.3 ~ 6.5 v v din pin voltage v din - 0.3 ~ 6.5 v v dout pin voltage v dout - 0.3 ~ 6.5 v v dout pin current i dout 10 ma fb pin voltage v fb - 0.3 ~ 6.5 v lim pin voltage v lim - 0.3 ~ 6.5 v mode/sync pin voltage v mode/sync - 0.3 ~ 6.5 v ce pin voltage v ce - 0.3 ~ 6.5 v lx pin voltage v lx - 0.3 ~ v dd + 0.3 v lx pin current i lx 2000 ma msop-10 350 (*1) usp-10b 150 power dissipation sop-8 pd 300 mw operating temperature range topr - 40 ~ + 85 ? storage temperature range tstg - 55 ~ +125 ? ta = 2 5 o c absolute maximum ratings
6/25 XC9223 / xc9224 series parameter symbol conditions min. typ. max. unit circuit input voltage v in 2.5 - 6.0 v - fb voltage v fb 0.784 0.800 0.816 v ? output voltage setting range v outset 0.9 - vin v ? maximum output current 1 (*1) i outmax1 0.4 - - a ? maximum output current 2 (*1) i outmax2 1.0 - - a ? u.v.l.o. voltage v uvlo fb=v fb x 0.9, v in voltage which lx pin voltage holding ?l? level (*8) 1.55 1.80 2.00 v ? supply current 1 i dd1 fb=v fb x 0.9, mode/sync=0v d1-1 (*2) a ? supply current 2 i dd2 fb=v fb x 1.1 (oscillation stops), mode/sync=0v d1-2 (*2) a ? stand-by current i stb ce=0v d1-6 (*2) a ? oscillation frequency fosc connected to external components, i out =10ma d1-3 (*2) mhz ? external clock signal synchronized frequency syncosc connected to external components, i out =10ma, apply an external clock signal to the mode/sync d1-4 (*2) mhz ? external clock signal cycle syncdty 25 - 75 % ? maximum duty cycle maxdty fb=v fb x 0.9 100 - - % ? minimum duty cycle mindty fb=v fb x 1.1 - - 0 % ? pfm switch current i pfm connected to external components, mode/sync=0v, i out =10ma - 200 250 ma ? efficiency (*3) effi connected to external components, v in =5.0v, v out =3.3v, i out =200ma - 95 - % ? lx sw ?h? on resistance (*4) r lxh fb=v fb x 0.9, i lx =v in -0.05v - 0.21 0.3 (*7) ? lx sw ?l? on resistance r lxl - 0.23 0.3 (*7) - current limit 1 i lim1 lim=0v 0.6 - 0.9 a ? current limit 2 i lim2 lim=v in 1.2 - 2.0 a ? integral latch time (*5) t lat fb=v fb x 0.9, short lx by 1 resistance d1-5 (*2) ms ? short detect voltage v short fb voltage which lx becomes ?l? (*8) 0.3 0.4 0.5 v ? soft-start time t ss ce=0v v in , i out =1ma 0.5 1.0 2.0 ms ? thermal shutdown temperature t tsd - 150 - o c - hysteresis width t hys - 20 - o c - ce ?h? voltage v ceh fb=v fb x 0.9, voltage which lx becomes ?h? after ce voltage changed from 0.4v to 1.2v (*8) 1.2 - - v ? ce ?l? voltage v cel fb=v fb x 0.9, voltage which lx becomes ?l? after ce voltage changed from 1.2v to 0.4v (*8) - - 0.4 v ? mode/sync ?h? voltage v mode/synch 1.2 - - v ? mode/sync ?l? voltage v mode/syncl - - 0.4 v ? lim ?h? voltage v limh 1.2 - - v ? lim ?l? voltage v liml i out =i lim1 x 1.1, check lim voltage which lx oscillated after ce voltage changed from 1.2v to 0.4v - - 0.4 v ? ce ?h? current i ceh v in =ce=6.0v - - 0.1 a ? ce ?l? current i cel v in =6.0v, ce=0v - 0.1 - - a ? mode/sync ?h? current i mode/synch v in =6.0v - - 0.1 a ? mode/sync ?l? current i mode/syncl v in =6.0v, mode/sync=0v - 0.1 - - a ? lim ?h? current i limh v in =lim=6.0v - - 0.1 a ? lim ?l? current i liml v in =6.0v, lim=0v - 0.1 - - a ? fb ?h? current i fbh v in =fb=6.0v - - 0.1 a ? fb ?l? current i fbl v in =6.0v, fb=0v - 0.1 - - a ? lx sw ?h? leak current i leakh v in =lx=6.0v, ce=0v - - 1.0 a ? lx sw ?l? leak current (*6) i leakl v in =6.0v, lx=ce=0v - 3.0 - - a ? XC9223/xc9224 series topr=25 ? electrical characteristics
7/25 XC9223/xc9224 series 1mhz 2mhz no. parameter symbol min. typ. max. min. typ. max. d1-1 supply current 1 i dd1 - 380 700 - 440 800 d1-2 supply current 2 i dd2 - 30 60 - 45 80 d1-3 oscillation frequency f osc 0.85 1.00 1.15 1.7 2.0 2.3 d1-4 external clock synchronous oscillation syncosc 0.75 - 1.25 1.5 - 2.5 d1-5 integral latch time t lat - 6.0 15.0 - 3.0 15.0 XC9223 series xc9224 series no. parameter symbol min. typ. max. min. typ. max. d1-6 stand-by current i stb - 0.1 2.0 - 7.0 15.0 parameter symbol conditions min. typ. max. unit circuit detect voltage v df v din voltage which v dout becomes ?h? to ?l?, pull-up resistor 200k 0.676 0.712 0.744 v ? release voltage v dr v din voltage which v dout becomes ?l? to ?h?, pull-up resistor 200k 0.716 0.752 0.784 v ? hysteresis width v hys v hys =(v dr -v df ) / v df x 100 - 5 - % - output current i dout v din =v df x 0.9, apply 0.25v to v dout 2.5 4.0 - ma ? delay time t dly time until v dout becomes ?l? to ?h? after v din changed from 0v to 1.0v 0.5 2.0 8.0 ms ? v din ?h? current i vdinh v in =v din =6.0v - - 0.1 a ? v din ?l? current i vdinl v in =6.0v, v din =0v - 0.1 - - a ? v dout ?h? current i vdouth v in =v din =v dout =6.0v - - 1.0 a ? v dout ?l? current i vdoutl v in =v din =6.0v, v dout =0v - 1.0 - - a ? XC9223/xc9224 series (continued), voltage detector block (*9) topr=25 ? electrical characteristics (continued) test condition: unless otherwise stated, v in =3.6v, ce=v in , mode/sync=v in note: *1: when the difference between the input and the output is sm all, some cycles may be skipped completely before current maxi mizes. if current is further pulled from this state, output vo ltage will decrease because of p-ch driver on resistance. *2: refer to the chart below. *3: effi = { ( output voltage x output current ) / ( input voltage x input current) } x 100 *4: on resistance ( )= (v in - lx pin measurement voltage) / 100ma *5: time until it short-circuits lx with gnd through 1 of resistance from a state of operation and is set to lx=low from current limit pulse generating. *6: when temperature is high, a current of approximately 100 a may leak. *7: designed value. *8: whether the lx pin is high level or low level is judged at the condition of ?h?>v in -0.1v and ?l?<0.05v. *9: there is no voltage detector f unction available in the XC9223d series. ? electrical characteristics standard values
8/25 XC9223 / xc9224 series (*1) a capacitor of 2200pf 0.1f is recommended to place at the c dd between the agnd pin and the v in pin. please refer to the page showing instruction on pattern layout for more detail. v out (v) r fb1 (k ) r fb2 (k ) c fb (pf) v out (v) r fb1 (k ) r fb2 (k ) c fb (pf) 1.0 75 300 110 2.5 510 240 15 1.2 150 300 51 3.0 330 120 24 1.5 130 150 62 3.3 470 150 18 1.8 300 240 27 5.0 430 82 18 typical application circuit output voltage can be set by adding external split resistor s. output voltage is determined by the following equation, based on the values of r fb1 and r fb2 . the sum of r fb1 and r fb2 should normally be 1m or less. v out = 0.8 x (r fb1 + r fb2 ) / r fb2 the value of cfb, speed-up capacitor for phase compensation, should be fzfb = 1 / (2 x x c fb1 x r fb1 ) which is equal to 20khz. adjustments are required from 1khz to 50khz depend ing on the application, value of inductance (l), and value of load capacity (cl). [example of calculation] when r fb1 =470k , r fb2 =150k , v out1 = 0.8 x (470k + 150k) / 150k =3.3v [typical example] [external components] 1mhz: l: 4.7 h (cdrh4d28c, sumida) c l : 10 f (ceramic) c in : 10 f (ceramic) 2mhz: l: 2.2 h (cdrh4d28, sumida) 2.2 h (vlcf4020t-2r2n1r7, tdk) c l : 10 f (ceramic) c in : 10 f (ceramic) * as for c in and c l, use output capacitors of 10 f or more. (ceramic capacitor compatible) * high esr (equivalent series resistance) t hat comes by using a tantalum or an electr olytic capacitor causes high ripple voltag e. furthermore, it can cause an unstable operation. use the ic after you fully confirm with an actual device. * when fzfb = 20khz
9/25 XC9223/xc9224 series operational explanation each unit of the XC9223/xc9224 series c onsists of a reference voltage source, a ramp wave circuit, error amplifier, pwm comparator, phase compensation circuit, output voltage adjustment resistors, p-channel mos driver transistor, n-channel mos synchronous rectification switching transistor, current limiter circuit, u.v.l.o. circuit and others. the series compares, using the error amplifier, the internal reference voltage to the v out pin with the voltage feedback via resistors r fb1 and r fb2 . phase compensation is performed on the resulting error amplifier output, to input a signal to the pwm comparator to determine the turn-on time during pwm operatio n. the pwm comparator compares, in terms of voltage level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause the lx pin to output a switching duty cycle. th is process is continuously performed to ensure stable output voltage. the current feedback circuit monitors the p-channel mos driver transistor current for each switching operation, and modulates the error amplifier output si gnal to provide multiple feedback signals. this enables a stable feedback loop even when a low esr capacitor, such as a ce ramic capacitor, is used, ensuring stable output voltage. the reference voltage source provides the reference voltage to ensure stable output volt age of the dc/dc converter. the ramp wave circuit determines switching frequency. the frequency is fixed internally and can be selected from 1.0mhz and 2.0mhz. clock pulses generated in this circuit are used to produce ramp waveforms needed for pwm operation, and to synchronize all the internal circuits. the error amplifier is designed to monitor output voltage. the amplifier compares the reference voltage with the feedback voltage divided by the internal resistors (r fb 1 and r fb2 ). when a voltage lower than the reference voltage is fed back, the output voltage of the error amplifier incr eases. the gain and frequency characteri stics of the error amplifier output are fixed internally to deliver an optimized signal to the mixer. the current limiter circuit of the xc 9223/xc9224 series monitors the current flowing through the p-channel mos driver transistor connected to the lx pin, and features a combination of the constant-current type current limit mode and the operation suspension mode. for the current limit values, please select the values either from 1.2a (min.) when the lim pin is high level or 0.6a (min.) when the lim pin is low level. 1 when the driver current is greater than a specific level, the constant-current type current limit function operates to turn off the pulses from the lx pin at any given time. 2 when the driver transistor is turned off, the limiter circuit is then released from the cu rrent limit detection state. 3 at the next pulse, t he driver transistor is turned on. ho wever, the transistor is immediately turned off in the case of an over current state. 4 when the over current state is eliminat ed, the ic resumes its normal operation. the ic waits for the over current state to end by repeating the steps 1 through 3 . if an over current state continues for several msec and the above three steps ar e repeatedly performed, the ic performs t he function of latching the off state of the driver transistor, and goes into operati on suspension mode. after being put into suspension mode, the ic can resume operation by turning itself off once and then starting it up using the ce pin, or by restoring power to the v in pin. integral latch time may be released from a current limit detection state because of the noise. depending on the stat e of a substrate, it may result in the case where the latch time may become longer or the operation may not be latched. please locate an input capacitor as close as possible. vin ce lx current limit level limit < # ms restart vss 0ma limit > # ms iout vout ms ms
10/25 XC9223 / xc9224 series operational explanation ( continued ) for protection against heat damage of the ics, thermal shutdown function moni tors chip temperature. the thermal shutdown circuit starts operating and the driver transistor will be turned off w hen the chip?s temperature reaches 150 o c. when the temperature drops to 130 o c or less after shutting of the current flow, the ic performs the soft start function to initiate output startup operation. ? the short-circuit protection circuit monitors fb voltage. in case where output is accidentally shorted to the ground and when the fb voltage decreases less than half of the fb voltag e, the short-circuit protection operates to turn off and to latch the driver transistor. in latch mode, the operation can be resumed by either turning the ic off and on via the ce pin, or by restoring power supply to the v in pin. the detector block of the XC9223/9224 seri es detects a signal inputted from the v din pin by the v dout pin (n-ch open-drain). when the v in pin voltage becomes 1.8v (typ.) or lower, the driver transistor is forced off to prevent false pulse output caused by unstable operation of the internal circuitry. when the v in pin voltage becomes 2.0v (typ.) or higher, switching operation takes place. by releas ing the u.v.l.o. function, the ic performs the soft-start functi on to initiate output startup operation. the u.v.l.o. functi on operates even when the v in pin voltage falls below the u.v.l.o. operating voltage for tens of ns. ? a mode/sync pin has two functions, a mo de switch and an input of external clock signal. the mode/sync pin operates as the pwm mode when applying high level of dire ct current and the pfm/pwm aut omatic switching mode by applying low level of direct current, which is the same functi on as the normal mode pin. by applying the external clock signal (25% of the internal clock signal, on duty 25% to 75%), the mode/sync pin switches to the internal clock signal. also the circuit will synchronize with the falling edge of external clock signal. while synchronizing with the external clock signal, the mode/sync pin becomes the pwm mode automatically. if the mode/sync pin holds high or low level of the external clock signal for several s, the mode/sync pin stops synchronizing with the external clock and switches to the internal clock operation. (refer to the chart below.) ~ external clock synchronization function * when an input of mode/sync is changed from ?l? volt age into a clock signal of 1.2mhz and 50% duty. mode/sync vout 50mv/div 2v/div lx 2v/div 1.0
11/25 XC9223/xc9224 series operational explanation ( continued ) in pfm control operation, until coil cu rrent reaches to a specified level (i pfm ), the ic keeps the p-ch mo sfet on. in this case, time that the p-ch mosfet is kept on (t on) can be given by the following formula. ton= l i pfm (v in v out ) i pfm ? in pfm control operation, the maximum duty cycle (maxpfm) is se t to 50% (typ.). therefore, under the condition that the duty increases (e.g. the condition that the step-down ratio is small), it?s possible for p-ch mosfet to be turned off even when coil current doesn?t reach to i pfm . ? i pfm ? ipfm ? ton lx i l x ipfm 0ma ipfm ? ipfm 0ma lx i l x fosc maxumum ipfm current
12/25 XC9223 / xc9224 series 1. the XC9223/xc9224 series is designed for use with ce ramic output capacitors. if, howe ver, the potential difference between dropout voltage, a ceramic capacitor may fail to absorb the resulting high switching energy and oscillation could occur on the output. in this case, use a larger capac itor etc. to compensate for insufficient capacitance. 2. spike noise and ripple voltage arise in a switching regulato r as with a dc/dc converter. these are greatly influenced by external component selection, such as the coil inductance, capacitance values, and board lay out of external components. once the design has been completed, verification with actual components should be done. 3. in pwm control, very narrow pulses will be outputted, and there is the possibi lity that some cycles may be skipped completely. this may happens while synchronizing with an external clock. 4. when the difference between v in and v out is small, and the load curr ent is heavy, very wide pulses will be outputted and there is the possibility that some cycles may be skipped completely. 5. with the ic, the peak current of the coil is controlled by the current limit circ uit. since the peak current increases whe n dropout voltage or load current is high, current limit starts operating, and this can lead to instability. when peak current becomes high, please adjust the coil inductance value and fu lly check the circuit operation. in addition, please calculate the peak current according to the following formula: ipk = (v in - v out ) x onduty / (2 x l x fosc) + i dout l: coil inductance value fosc: oscillation frequency 6. when the peak current, which exceeds limit current, flows with in the specified time, the built -in p-ch driver transistor is turned off (an integral latch circuit). during the time until it detects limit current and before the built-in transistor can b e turned off, the current for limit current flows; therefore, care must be taken when selecting the rating for the coil. 7. the voltage drops because of on resist ance of a driver transistor or in-series re sistance of a coil. for this, the current limit may not be attained to the limit cu rrent value, when input voltage is low. 8. malfunction may occur in the u.v.l.o. circuit because of the noise when pulling current at the minimum operation voltage. 9. this ic and the external components should be used within the stated absolute maximum ratings in order to prevent damage to the device. 10. depending on the state of the pc board, latch time may become longer and latch operation may not work. the board should be laid out so that capacitors ar e placed as close to the chip as possible. 11. in heavy load, the noise of dc/dc may influence and the delay time of the voltage detector may be prolonged. 12. output voltage may become unstable when synchronizi ng high internal frequency with the external clock. in such a case, please use a larger output capacitor etc. to compen sate for insuffici ent capacitance. 13. when a voltage lower than minimum operating voltage is applied, the output voltage may fall before reaching the over current limit. 14. when the ic is used in high temperat ure, output voltage may increase up to inpu t voltage level at light load (less than 10 0 a) because of the leak current of the driver transistor. 15. the current limit is set to lim=h: 2000ma (max.). however, the current of 2000ma or more may flow. in case that the current limit functions while the v out pin is shorted to the gnd pin, when p- ch mosfet is on, the potential difference for input voltage will occur at both ends of a coil. for this, the time rate of coil current becomes large. by contrast, when n-ch mosfet is on, there is almost no potenti al difference at both ends of the coil since the v out pin is shorted to the gnd pin. consequently, the time rate of coil current becomes quite small. according to the repetition of this operation, and the delay time of the ci rcuit, coil current will be converged on a certain current value, exceeding the amount of current, which is supposed to be limited originally . the short protection does not operate during the soft-start time. the short protection starts to operate and the circuit will be disabled after the soft-start time. current larger than over current limit may flow because of a delay time of the ic when step-down ratio is large. a coil should be used within the stated absolute maximum rating in or der to prevent damage to the device. ?? current flows into p- ch mosfet to reach the current limit (i lim ). ? the current of i lim (2000ma, max.) or more flows since the delay time of the circuit occurs during from the detection of the current limit to off of p-ch mosfet. ? because of no potential difference at both ends of the coil, the time rate of coil current becomes quite small. ? lx oscillates very narrow pulses by the current limit for several msec. ? the short protection operat es, stopping its operation. vlx ilx coil current overcurrent limit value #ms delay notes on use
13/25 XC9223/xc9224 series ~ bottom view 1. in order to stabilize v in ?s voltage level, we recommend that a by-pass capacitor (c in ) be connected as close as possible to the v in & v ss pins. 2. please mount each external component, especially ci n , as close to the ic as possible. 3. wire external components as close to the ic as possible a nd use thick, short connecting traces to reduce the circuit impedance. 4. make sure that the pcb gnd traces are as thick as possible, as variati ons in ground potential caused by high ground currents at the time of switchin g may result in instability of the ic. 5. unstable operation may occur at the heavy load because of a spike noise. 2200pf ~0.1 f of a capacitor, c dd , is recommended to use between the agnd pin and the vin pin for reducing noise. ~ top view inductor jumper chip resistor ceramic capaticor r c l 0 instruction on pattern layout
14/25 XC9223 / xc9224 series iout cin vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim v cl cfb rfb1 rfb2 l v v a a * external components l (1mhz) : 4.7 h (cdrh4d28c, sumida) l (2mhz) : 2.2 h (vlcf4020t-2r2n1r7, tdk) cin : 10 f (ceramic) cl : 10 f (ceramic) rfb1 : 130k rfb2 : 150k cfb : 62pf (ceramic) waveform measurement point iout cin vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim cl cfb rfb1 rfb2 pulse l waveform measurement point * external components l (1mhz) : 4.7 h (cdrh4d28c, sumida) l (2mhz) : 2.2 h (vlcf4020t-2r2n1r7, tdk) cin : 10 f (ceramic) cl : 10 f (ceramic) rfb1 : 130k rfb2 : 150k cfb : 62pf (ceramic) test circuits circuit ? circuit ? circuit ? circuit ? vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim a 1uf ilx waveform measurement point 1uf vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim a v
15/25 XC9223/xc9224 series circuit ? 1 f vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim a a a a a a a 1 f vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim a 1 f vin pgnd agnd lx fb mode/ sync ce vdin vdout ilim 200k waveform measurement point a test circuits (continued) circuit ? circuit ?
16/25 XC9223 / xc9224 series typical performance characteristics vin=3.3v,fosc=2mhz l=2.2uh(cdrh4d28),cin=10uf(ceramic),cl=10uf(ceramic) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current : iout (ma) efficiency[% } pwm/pfm pwm vout=1.5v vout=2.5v vin=3.3v,fosc=1mhz l=4.7uh(cdrh4d28c),cin=10uf(ceramic),cl=10uf(ceramic) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current : iout (ma) efficiency[% } pwm/pfm pwm vout=1.5v vout=2.5v (2) output voltage vs. output current vin=5.0v, topr=25 o c, l:4.7uh(cdrh4d28c), cin=10uf(ceramic),cl=10uf(ceramic) 3 3.1 3.2 3.3 3.4 3.5 3.6 1 10 100 1000 output current: iout (ma) output voltage: vout (v) pw m control pwm/pfm automatic switching control vin=5.0v,topr=25 o c, l:4.7uh(cdrh4d28c), cin=10uf(ceramic),cl=10uf(ceramic) 1.4 1.45 1.5 1.55 1.6 1 10 100 1000 output current: iout (ma) output voltage: vout (v) pw m control pwm/pfm automatic switching control XC9223b081ax XC9223b082ax vin=5v, fosc=1m hz, l=4.7uh(cdrh4d28c), cin=10uf(ceramic), cl=10uf(ceramic) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current: iout (ma) efficiency: effi (%) pwm/pfm pwm vout=1.5v vout=3.3v vin=5v, fosc=2m hz, l=2.2uh(cdrh4d28), cin=10uf(ceramic), cl=10uf(ceramic) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current: iout (ma) efficiency: effi (%) pwm/pfm pwm vout=1.5v vout=3.3v XC9223b081ax XC9223b082ax (1) efficiency vs. output current v in =5v, f osc =1mhz, l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic) v in =5v, f osc =2mhz, l=2.2 h (cdrh4d28), c in =10 f (ceramic), cl=10 f (ceramic) v in =3.3v, f osc =1mhz, l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic) v in =3.3v, f osc =2mhz, l=2.2 h (cdrh4d28), c in =10 f (ceramic), cl=10 f (ceramic) XC9223b081ax XC9223b081ax XC9223b082ax efficiency: effi (%) efficiency: effi (%) output current: iout (ma) output current: iout (ma) v in =5.0v, topr=25 ? , l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic) v in =5.0v, topr=25 ? , l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic)
17/25 XC9223/xc9224 series typical performance characteristics (continued) (2) output voltage vs. out put current (continued) (4) u.v.l.o. voltage vs. ambient temperature (3) oscillation frequency vs. ambient temperature (5) supply current 2 vs. input voltage vin=3.3v,topr=25 o c, l:4.7uh(cdrh4d28c), cin=10uf(ceramic), cl=10uf(ceramic) 2.2 2.3 2.4 2.5 2.6 2.7 2.8 1 10 100 1000 output current: iout (ma) output voltage: vout (v) pw m control pwm/pfm automatic switching control vin=3.3v,topr=25 o c, l:4.7uh(cdrh4d28c), cin=10uf(ceramic),cl=10uf(ceramic) 1.4 1.45 1.5 1.55 1.6 1 10 100 1000 output current: iout (ma) output voltage: vout (v) pw m control pwm/pfm automatic switching control XC9223b081ax XC9223b082ax 0 20 40 60 80 100 234567 input voltage: vin (v) supply current 2: idd2 (ua) XC9223/9424 series (1mhz) ce=fb=vin, m ode=0v 0 20 40 60 80 100 234567 input voltage: vin (v) supply current 2: idd2 (ua) XC9223/24 series (2mhz) ce=fb=vin, m ode=0v 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 -50 -25 0 25 50 75 100 ambient temperature : ta ( o c) uvlo voltage : uvlo1,uvlo2 (v) uvlo uvlo2 0.60 0.80 1.00 1.20 1.40 -50 -25 0 25 50 75 100 ambient temperature : ta ( o c) oscillation frequency: fosc (mhz) 1.2 1.6 2 2.4 2.8 2mhz 1mhz XC9223/24 series XC9223/24 series v in =3.3v, topr=25 ? , l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic) v in =3.3v, topr=25 ? , l=4.7 h (cdrh4d28c), c in =10 f (ceramic), cl=10 f (ceramic) XC9223/xc9224 series XC9223/xc9224 series XC9223/xc9224 series (1mhz) XC9223/xc9224 series (2mhz)
18/25 XC9223 / xc9224 series typical performance characteristics (continued) (6) soft start time (7) fb voltage vs. supply voltage 500usec/div vin=5.0v,vout=1.5v,ce=0 5v iout=1ma,mode=0v XC9223/24 series vout : 1v/div ce : 5v/div 500usec/div vin=5.0v,vout=3.3v,ce=0 5v iout=1ma,mode=vin XC9223/24 series ce : 5v/div vout : 1v/div iout=0.1ma,topr=25 o c 0.784 0.792 0.800 0.808 0.816 2.0 3.0 4.0 5.0 6.0 7.0 input voltage: vin (v) fb voltage: vfb (v) XC9223/9424 series 500 s / div 500 s / div XC9223/xc9224 series XC9223/xc9224 series XC9223/xc9224 series
19/25 XC9223/xc9224 series typical performance characteristics (continued) (8) load transient response XC9223b081ax <1mhz> v in =5.0v, v out =3.3v, mode/sync=0v (pwm/pfm automatic switching control) l=4.7 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c v in =5.0v, v out =3.3v, mode/sync=v in (pwm control) l=4.7 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 500usec/div vout:200mv/div iout=200ma iout=800ma 50usec/div vout:200mv/div iout=200ma iout=800ma 500usec/div vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 500usec/div 50 s / div 500 s / div 50 s / div 500 s / div 50 s / div 500 s / div
20/25 XC9223 / xc9224 series typical performance characteristics (continued) (8) load transient response (continued) XC9223b081ax <1mhz> (continued) v in =5.0v, v out =1.5v, mode/sync=v in (pwm control) l=4.7 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c v in =5.0v, v out =1.5v, mode/sync=0v (pwm/pfm automatic switching control) l=4.7 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 200usec/div vout:200mv/div iout=200ma iout=800ma 50usec/div vout:200mv/div iout=200ma iout=800ma 200usec/div vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 200usec/div 50 s / div 200 s / div 50 s / div 200 s / div 50 s / div 200 s / div
21/25 XC9223/xc9224 series typical performance characteristics (continued) (8) load transient response (continued) XC9223b082ax <2mhz> v in =5.0v, v out =3.3v, mode/sync=v in (pwm control) l=2.2 h (cdrh4d28), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c v in =5.0v, v out =3.3v, mode/sync=0v (pwm/pfm automatic switching control) l=2.2 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 500usec/div vout:200mv/div iout=200ma iout=800ma 50usec/div vout:200mv/div iout=200ma iout=800ma 500usec/div vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 500usec/div 50 s / div 500 s / div 50 s / div 500 s / div 50 s / div 500 s / div
22/25 XC9223 / xc9224 series (8) load transient response (continued) XC9223b082ax <2mhz> (continued) v in =5.0v, v out =1.5v, mode/sync=v in (pwm control) l=2.2 h (cdrh4d28), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c v in =5.0v, v out =1.5v, mode/sync=0v (pwm/pfm automatic switching control) l=2.2 h (cdrh4d28c), c in =10 f (ceramic), c l =10 f (ceramic), topr=25 o c vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 200usec/div vout:200mv/div iout=200ma iout=800ma 50usec/div vout:200mv/div iout=200ma iout=800ma 200usec/div vout:200mv/div iout= 1m a iout=200ma 50usec/div vout:200mv/div iout= 1m a iout=200ma 200usec/div typical performance characteristics (continued) 50 s / div 200 s / div 50 s / div 200 s / div 50 s / div 200 s / div
23/25 XC9223/xc9224 series 5.0 +0.50 -0.20 4.20.4 6.1 +0.40 -0.30 0.2 +0.01 -0.1 0.40.04 0 1 0 1.270.03 0.40.1 1.50.1 1.58 +0.15 -0.18 00.25 ? msop-10 ? usp-10b 0.15+0.08 0.53+0.13 3.00+0.10 3.00+0.10 4.90+0.20 0 ~ 6 o 0.20 +0.1 -0.05 (0.5) 0.86+0.15 0~0.15 1 1 1 1 1 1 1 package information a aa a aa a 2.9+0.15 2.6+0.15 max.0.6 1.6+0.1 0.4+0.03 0.1+0.03 0.1+0.03 2.5+0.1 0.65 0.65 0.5 0.5 0.125 0.45+0.05 0.45+0.05 0.2+0.05 0.2+0.05 0.2+0.05 0.25+0.1 0.15 0.2 0.325 0.3 0.3 ? sop-8
24/25 XC9223 / xc9224 series mark product series 0 XC9223xxxxax a xc9224xxxxax mark product series b XC9223/9224bxxxax mark ? ? product series 0 8 XC9223/9224x08xax mark oscillation frequency product series 1 1.0mhz XC9223/9224xxx1ax 2 2.0mhz XC9223/9224xxx2ax ex.) marking ? ? production lot number 0 3 03 1 a 1a packaging information (continued) ? usp-10b recommended pattern layout 1.50 1.50 1.05 1.05 0.80 0.80 0.20 0.20 0.025 0.025 0.25 0.20 0.20 0.45 0.45 0.475 0.475 0.025 0.025 0.25 1.25 1.25 1.35 1.35 0.225 0.225 0.25 0.125 0.125 0.125 0.125 0.125 0.125 0.40 0.15 0.15 0.70 0.70 1.10 1.10 1.45 1.45 0.35 0.35 0.30 0.25 0.075 0.10 0.55 0.55 1.05 1.05 0.30 0.075 0.10 marking rule ? msop-10 ? represents products series ? represents type of dc/dc converters ?? represents reference voltage ? represents oscillation frequency ? represents production lot number 01 to 09, 0a to 0z, 10 to 19, 1a~ in order. (g, i, j, o, q, w excepted) note: no character inversion used. 34 5 6 7 8 9 10 2 1 ?? ??? msop-10 ( top view ) ? usp-10b recommended metal mask design
25/25 XC9223/xc9224 series 1. the products and product specifications cont ained herein are subject to change without notice to improve performance characteristic s. consult us, or our representatives before use, to confirm that the inform ation in this catalog is up to date. 2. we assume no responsibility for any infri ngement of patents, pat ent rights, or other rights arising from the use of any info rmation and circuitry in this catalog. 3. please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. the products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction ca n be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. atomic energy; aerospace; transpor t; combustion and associated safety equipment thereof.) 5. please use the products listed in this catalog within the specified ranges. should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. we assume no responsibility for damage or loss due to abnormal use. 7. all rights reserved. no part of this ca talog may be copied or reproduced without the prior permission of torex semiconductor ltd.

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