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________________________________________________________________ _ maxim integrated products _ _ 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 general description the MAX16974 is a 2a, current-mode, step-down con - verter with an integrated high-side switch. it is designed to operate with 3.5v to 28v input voltages, while using only 35 f a quiescent current at no load. the switching frequency is adjustable from 220khz to 2.2mhz by an external resistor and can be synchronized to an external clock. the output voltage is pin selectable to be 5v fixed or 1v to 10v adjustable. the wide input voltage range makes the device ideal for automotive and industrial applications. the device operates in skip mode for reduced current consumption in light-load applications. an adjustable reset threshold helps keep microcontrollers alive down to their lowest specified input voltage. protection features include cycle-by-cycle current limit, overvoltage, and thermal shutdown with automatic recovery. the device also features a power-good monitor to ease power- supply sequencing. the device operates over the -40 c to +125 c auto - motive temperature range and is available in a 16-pin tssop-ep package. applications automotive industrial features s wide_ 3.5v_ to_ 28v_ input_ voltage_ range s 42v_ input_ transient_ tolerance s 5v_ fixed_ or_ 1v_ to_ 10v_ adjustable_ output_ voltage s integrated_ 2a_ internal_ high-side_ switch s adjustable_ switching_ frequency_ (220khz_ to_ 2.2mhz) s operates_ through_ cold_ crank_ with_ high_ duty_ cycle s frequency_ synchronization_ input s internal_ boost_ diode s 35a_ skip-mode_ operating_ current s 5a_ typical_ shutdown_ current s adjustable_ power-good_ output_ level_ and_ timing s 3.3v_ logic_ level_ to_ 42v_ compatible_ enable_ input s current-limit,_ thermal-shutdown,_ and_ overvoltage_ protections s automotive_ temperature_ range:_ -40c_ to_ +125c s aec-q100_ qualified 19-5630; rev 1; 7/11 ordering information /v denotes an automotive qualified part. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. evaluation_kit available part temp_ range pin-package MAX16974aue/v+ -40 n c to +125 n c 16 tssop-ep* MAX16974 d1 c out 22f c in2 4.7f c in1 47f c cres 100pf r comp 20ki r res 10ki r fosc 12.1ki l1 4.7h v out = 5v at 2a c bst 0.1f lx bst v out place c in2 (4.7f) and c in3 (0.1f) next to sup. place c in4 (0.1f) and c in5 (4.7f) next to supsw. out v bias v bat fb reseti v bias res fosc cres c bias 1f c comp2 open bias c comp1 5600pf comp fsync en supsw sup c in3 0.1f c in4 0.1f c in5 4.7f gnd typical application circuit
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 2 _ _ _______________________________________________________________________________________ stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. sup, supsw, en to gnd ..................................... -0.3v to +45v sup to supsw, lx ............................................... -0.3v to +0.3v bst to gnd .......................................................... -0.3v to +47v bst to lx ............................................................... -0.3v to +6v out to gnd .......................................................... -0.3v to +12v reseti, fosc, comp, bias, fsync, cres, res , fb to gnd .................................................. -0.3v to +6v output short-circuit duration .................................... continuous continuous power dissipation (t a = +70 n c) tssop (derate 26.1mw/ n c above +70 n c) ........... 2088.8mw* operating temperature range ........................ -40 n c to +125 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c electrical_ characteristics (v sup = v supsw = 14v, l1 = 4.7 f h, v en = 14v, c in = 10 f f, c out = 22 f f, c bias = 1 f f, c bst = 0.1 f f, c cres = 1nf, r fosc = 12.1k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) absolute_ maximum_ ratings * as per jedec 51 standard (multilayer board). note_ 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . package_ thermal_ characteristics _ (note_ 1) tssop junction-to-ambient thermal resistance ( q ja ) ........ 38.3c/w parameter symbol conditions min typ max units supply voltage v sup normal operation 3.5 28 v supply current i sup normal operation, i load = 1.5a 2 3 ma skip mode, no load, v out = 5v 35 50 f a shutdown supply current v en = 0v 5 10 f a bias regulator voltage v bias v sup = v supsw = 6v to 42v, v out > 6v 4.9 5.1 5.4 v bias undervoltage lockout v uvbias v bias rising 2.85 3.05 3.25 v bias undervoltage lockout hysteresis v uvbias_ hys 350 mv thermal-shutdown threshold 175 n c output_voltage_(out) output voltage v out normal operation, v fb = v bias , i load = 2a, t a = +25c 4.95 5 5.05 v normal operation, v fb = v bias , i load = 2a, -40c < t a <+125c 4.9 5 5.1 skip-mode output voltage v out_skip no load, v fb = v bias (note 2) 4.95 5.05 5.2 v load regulation v out = 5v, v fb = v bias ; 400ma < i load < 2a 1 % line regulation 6v < v sup < 28v 0.02 %/v bst input current i bst 100% duty cycle, v bst - v lx = 5v 1.5 3 ma lx current limit i lx 2.5 3 3.5 a skip-mode current threshold i skip_th 240 ma
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 _______________________________________________________________________________________ _ _ 3 electrical_ characteristics_ (continued) (v sup = v supsw = 14v, l1 = 4.7 f h, v en = 14v, c in = 10 f f, c out = 22 f f, c bias = 1 f f, c bst = 0.1 f f, c cres = 1nf, r fosc = 12.1k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units power-switch on-resistance r on r on measured between supsw and lx, i lx = 500ma 185 400 m i lx leakage current i lx,leak v sup = 28v, v lx = 0v, t a = +25c 1 f a v sup = 28v, v lx = 0v, t a = +125c 0.04 transconductance_amplifier_(comp) fb input current i fb 20 na fb regulation voltage v fb fb connected to an external resistive divider, t a = +25c 0.99 1.0 1.01 v fb connected to an external resistive divider, -40c < t a < +125c 0.985 1.0 1.015 fb line regulation d v line 6v < v sup < 28v 0.02 %/v transconductance (from fb to comp) g m,ea v fb = 1v, v bias = 5v 1000 f s minimum on-time t min,on 120 ns cold-crank event duty cycle dc cc 92 % oscillator_frequency oscillator frequency r fosc = 120k i 190 260 310 khz r fosc = 12.1k i 2.00 2.20 2.48 mhz external_clock_input_(fsync) external input clock acquisition time t fsync 4 cycles external input clock high threshold v fsync_hi v fsync rising 1.5 v external input clock low threshold v fsync_lo v fsync falling 0.5 v fsync pulldown resistance i fsync 510 k i soft-start time t ss f sw = 220khz 9.3 ms f sw = 2.2mhz 0.93 enable_input_(en) enable-on threshold voltage low v en_lo 0.7 v enable-on threshold voltage high v en_hi 2.2 v enable threshold voltage hysteresis v en,hys 0.35 v enable input current i en 0.5 f a reset reset internal switching level v th_rising v fb rising, v reseti = 0v 0.88 0.90 0.92 v v th_falling v fb falling, v reseti = 0v 0.83 0.85 0.87 reseti threshold voltage v reseti_lo v reseti falling 1.13 1.2 1.27 v cres threshold voltage v cres_hi v cres rising 1.1 1.25 1.45 v cres threshold hysteresis v cres_hys 0.04 v reseti input current i reset v reseti = 0v 0.02 f a
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 4 _ _ _______________________________________________________________________________________ typical operating characteristics (v sup = v supsw = 14v, v out = 5v, fsync = gnd, f osc = 400khz, t a = +25 n c, unless otherwise noted. see figure 1.) note_ 2: guaranteed by design; not production tested. electrical_ characteristics_ (continued) (v sup = v supsw = 14v, l1 = 4.7 f h, v en = 14v, c in = 10 f f, c out = 22 f f, c bias = 1 f f, c bst = 0.1 f f, c cres = 1nf, r fosc = 12.1k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units cres source current i cres v out in regulation 9.5 10 10.5 f a cres pulldown current i cres_pd v out out of regulation 1 ma res sink current v res pulls low, v res > 0.4v 1 ma res leakage current (open- drain output) v out in regulation, t a = +25 n c 1 f a reset debounce time t res_deb v reseti falling 25 f s efficiency vs. i load (skip mode) MAX16974 toc01 i load (c) efficiency (%) 0.01 0.001 0.0001 10 20 30 40 50 60 70 80 90 100 0 0.00001 0.1 v sup = 14v 5v/400khz 5v/2.2mhz efficiency vs. i load MAX16974 toc02 i load (a) efficiency (%) 1 0.1 10 20 30 40 50 60 70 80 90 100 0 0.01 10 v sup = 14v 5v/400khz 5v/2.2mhz supply current vs. supply voltage MAX16974 toc03 supply voltage (v) supply current (a) 26 24 20 22 10 12 14 16 18 8 10 20 30 40 50 60 70 80 90 100 0 6 28 5v/400khz 5v/2.2mhz shutdown current vs. input voltage MAX16974 toc04 input voltage (v) shutdown current (a) 26 24 20 22 8 10 12 14 16 18 6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 4 28 t a = -40c t a = +25c t a = +125c startup into heavy load MAX16974 toc05 0v 2a/div sf = 400khz 5v/div 5v/div 0a 0v v sup v out i load 10ms/div
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 _______________________________________________________________________________________ _ _ 5 typical operating characteristics (continued) (v sup = v supsw = 14v, v out = 5v, fsync = gnd, f osc = 400khz, t a = +25 n c, unless otherwise noted. see figure 1.) load transient MAX16974 toc06 0v 1a/div 200mv/div 0a v out i load sf = 400khz v out ac- coupled undervoltage pulse MAX16974 toc07 0v 0v 5v/div 5v/div 5v/div 0v v sup v out 20ms/div v res sf = 2.2mhz reset timeout period vs. c res MAX16974 toc08 c res (f) reset timeout period (ms) 0.9 0.8 0.6 0.7 0.2 0.3 0.4 0.5 0.1 10 20 30 40 50 60 70 80 90 100 0 0 1.0 switching frequency vs. temperature MAX16974 toc09 temperature (c) switching frequency (khz) 110 95 65 80 -10 5 20 35 50 -25 410 420 430 440 450 460 470 480 490 500 400 -40 125 v out = 5v load dump test (5v/2.2mhz) MAX16974 toc10 0 0 20v/div 5v/div 5v/div 0 v sup v out 100ms/div v res short-circuit response MAX16974 toc11 0a 0v 5a/div 5v/div 5v/div 0v i lx v out 2ms/div 2.2mhz v res
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 6 _ _ _______________________________________________________________________________________ typical operating characteristics (continued) (v sup = v supsw = 14v, v out = 5v, fsync = gnd, f osc = 400khz, t a = +25 n c, unless otherwise noted. see figure 1.) switching frequency vs. r fosc MAX16974 toc12 r fosc (k i ) switching frequency (mhz) 122 112 22 32 42 62 72 82 92 52 102 0.4 0.8 1.2 1.6 2.0 2.4 2.8 0 12 switching frequency vs. supply voltage MAX16974 toc13 supply voltage (v) switching frequency (khz) 26 24 20 22 10 12 14 16 18 8 402 404 406 408 410 412 414 416 418 420 400 6 28 i load = 1a fsync transition from internal to external frequency (5v/2.2mhz configuration) MAX16974 toc14 0 0 5v/div 2v/div 10v/div 0 external clock at sync v out v lx 1s/div v out vs. i load MAX16974 toc15 i load (a) v out (v) 1.8 1.6 1.2 1.4 0.4 0.6 0.8 1.0 0.2 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 4.90 0 2.0 v sup = 14v 5v/400khz 5v/2.2mhz switching frequency vs. i load MAX16974 toc16 i load (a) switching frequency (khz) 1.8 1.6 1.2 1.4 0.4 0.6 0.8 1.0 0.2 402 404 406 408 410 412 414 416 418 420 400 0 2.0 v sup = 14v startup into heavy load (5v/2.2mhz) MAX16974 toc17 0 0 0v 5v/div 2v/div 5v/div 2a/div 0v v sup v out i load 400s/div v res
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 _______________________________________________________________________________________ _ _ 7 typical operating characteristics (continued) (v sup = v supsw = 14v, v out = 5v, fsync = gnd, f osc = 400khz, t a = +25 n c, unless otherwise noted. see figure 1.) output response to slow input ramp up (5v/400khz) MAX16974 toc18 0 0 0 10v/div 5v/div 10v/div 5v/div 0 v sup v out v lx 10s/div i load = 2a v res output response to slow input ramp down (5v/2.2mhz) MAX16974 toc19 0 0 0 2v/div 2v/div 2v/div v sup v out v lx 10s/div dips and drop test (5v/2.2mhz) MAX16974 toc20 0 0 0 0 10v/div 5v/div 10v/div 2a/div v sup v out v lx i load 10ms/div
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 8 _ _ _______________________________________________________________________________________ figure 1. 3.3v fixed output voltage configuration pin configuration MAX16974 d1 c out 47f c out1 47f c in2 4.7f c in1 47f c cres 1nf r comp 20ki r res 10ki r fb1 124ki r fb2 56ki r fosc 82ki l1 15h v out = 3.3v at 2a at 300khz c bst 0.1f lx bst v out place c in2 (4.7f) and c in3 (0.1f) next to sup. place c in4 (0.1f) and c in5 (4.7f) next to supsw. out v bat fb reseti v bias res fosc cres c bias 1f c comp2 open bias c comp1 5600pf comp fsync en supsw sup c in3 0.1f c in4 0.1f c in5 4.7f gnd + top view MAX16974 tssop 13 4 supsw i.c. 14 3 en fsync 15 2 res fosc 16 1 reseti cres 10 7 bst out 11 6 sup fb 9 8 bias gnd 12 5 lx comp ep
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 _______________________________________________________________________________________ _ _ 9 pin description pin name function 1 cres analog reset timer. cres sources 10 f a (typ) of current into an external capacitor to set the reset timeout period. reset timeout period is defined as the time between the start of output regulation and res going high impedance. leave unconnected for minimum delay time. 2 fosc resistor-programmable switching-frequency setting control input. connect a resistor from fosc to gnd to set the switching frequency. 3 fsync synchronization input. the device synchronizes to an external signal applied to fsync. the external signal period must be 10% shorter than the internal clock period for proper operation. 4 i.c. internally connected. connect to gnd. 5 comp error amplifier output. connect an rc network from comp to gnd for stable operation. see the compensation network section for more details. 6 fb feedback input. connect an external resistive divider from out to fb and gnd to set the output voltage. connect to bias to set the output voltage to 5v. 7 out supply input. out provides power to the internal circuitry when the output voltage of the converter is set between 3v and 5v. 8 gnd ground 9 bias linear regulator output. bias powers up the internal circuitry. bypass with a 1 f f capacitor to ground. 10 bst high-side driver supply. connect a 0.1 f f capacitor between lx and bst for proper operation. 11 sup voltage supply input. sup powers up the internal linear regulator. connect a minimum of 1 f f capacitor from sup to gnd close to the ic. connect sup to supsw. 12 lx inductor switching node. connect a schottky diode between lx and gnd. 13 supsw internal high-side switch supply input. supsw provides power to the internal switch. for most applications, connect 4.7 f f and 0.1 f f capacitors between supsw and gnd close to the ic. see the input capacitor section for more details. 14 en battery-compatible enable input. drive en low to disable the device. drive en high to enable the device. 15 res open-drain active-low reset output. res asserts when v out is below the reset threshold set by reseti. 16 reseti reset threshold level input. connect to a resistive divider to set the reset threshold for res . connect to gnd to enable the internal reset threshold. ep exposed pad. connect ep to a large-area contiguous copper ground plane for effective power dissipation. do not use as the only ic ground connection. ep must be connected to gnd.
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 10 _ _ ______________________________________________________________________________________ detailed description the MAX16974 is a constant-frequency, current-mode, automotive buck converter with an integrated high-side switch. the device operates with 3.5v to 28v input volt - ages and tolerates input transients up to 42v. during undervoltage events, such as cold-crank conditions, the internal pass device maintains up to 92% duty cycle. an open-drain, active-low reset output helps monitor the output voltage. the device offers an adjustable reset threshold that helps keep microcontrollers alive down to their lowest specified input voltage. a capacitor pro - grammable reset timeout ensures proper startup. the switching frequency is resistor programmable from 220khz to 2.2mhz to allow optimization for efficiency, noise, and board space. a clock input, fsync, allows the device to synchronize to an external clock. during light-load conditions, the device enters skip mode that reduces the quiescent current down to 35 f a. the 5v fixed output voltage option eliminates the need for external resistors and reduces the supply current by up to 50 f a. see figure 2 for the internal block diagram. supply voltage range (sup) the devices supply voltage range (v sup ) is compatible with the typical 3.5v to 28v automotive battery voltage range and can tolerate transients up to 42v. figure 2. internal block diagram 10a comp comp gnd b.g. ref soft- start uvlo mux ldo standby supply ref ea logic for dropout res v bias fb reseti cres pwm comp level shift i lim logic en osc sum i sense fsync fosc bias sup out comp drv lx bst supsw MAX16974
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 ______________________________________________________________________________________ _ _ 11 linear regulator output (bias) the device includes a 5v linear regulator, v bias, that provides power to the internal circuitry. connect a 1 f f ceramic capacitor from bias to gnd. if the output voltage is set between 3.0v and 5.6v, the internal lin - ear regulator only provides power until the output is in regulation. the internal linear regulator turns off once the output is in regulation and load current is below 50ma, allowing the output to provide power to the device. external clock input (fsync) the device synchronizes to an external clock signal applied at fsync. the signal at fsync must have a 10% shorter period than the internal clock period for proper synchronization. the internal clock signal takes over if the externally applied signal has a frequency lower than the internal clock frequency. adjustable reset level the device features a programmable reset threshold using a resistive divider between out, reseti, and gnd. connect reseti to gnd for the internal threshold. res asserts low when the output voltage falls to 85% of its programmed level. res deasserts when the output voltage goes above 90% of its set voltage. some microprocessors have a wide input voltage range (5v to 3.3v) and can operate during device dropout. use a resistive divider at reseti to adjust the reset activation level ( res goes low) to lower levels. the reference volt - age at reseti is 1.2v (typ). the device also offers a capacitor-programmable reset timeout period. connect a capacitor from cres to gnd to adjust the reset timeout period. when the output volt - age goes out of regulation, res asserts low, and the reset timing capacitor discharges with a 1ma pulldown current. once the output is back in regulation, the reset timing capacitor recharges with 10 f a (typ) current. res stays low until the voltage at cres reaches 1.25v (typ). dropout operation the device has an effective maximum duty cycle to help refresh the bst capacitor when continuously operated in dropout. when the high-side switch is on for three consecutive clock cycles, the device forces the high- side switch off during the final 35% of the fourth clock cycle. when the high-side switch is off, the lx node is pulled low by current flowing through the external schottky diode. this increases the voltage across the bst capacitor. to ensure that the inductor has enough current to pull lx to ground, an internal load sinks cur - rent from v out when the device is close to dropout and when the external load is small. once the input voltage is increased above the dropout region, the device con - tinues to regulate without restarting. if the device has neither external clock nor external load, the effective maximum duty cycle is 92% when operating deep into dropout. this effective maximum duty cycle is influenced by the external load and by the external syn - chronized clock, if any. system enable (en) an enable-control input (en) activates the device from its low-power shutdown mode. en is compatible with inputs from automotive battery level down to 3.3v. the high- voltage compatibility allows en to be connected to sup, key/kl30, or the inh pin of a can transceiver. en turns on the internal regulator. once v bias is above the internal lockout level, v uvl = 3.05v (typ), the con - troller activates and the output voltage ramps up within 2048 cycles of the switching frequency. a logic-low at en shuts down the device. during shut - down, the internal linear regulator and gate drivers turn off. shutdown is the lowest power state and reduces the quiescent current to 5 f a (typ). drive en high to bring the device out of shutdown. overvoltage protection the device includes an overvoltage protection circuit that protects the device when there is an over - voltage condition at the output. if the output voltage increases by more than 10% of its set voltage, the device stops switching. the device resumes regulation once the overvoltage condition is removed. overload protection the overload protection circuitry is activated when the device is in current limit and v out is below the reset threshold. under these conditions the device enters a soft-start mode. if the overcurrent condition is removed before the soft-start mode is over, the device regulates the output voltage to its set value. otherwise, the soft- start cycle repeats until the overcurrent condition is removed.
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 12 _ _ ______________________________________________________________________________________ skip mode during light-load operation, i inductor p 240ma, the device enters skip-mode operation. skip mode turns off the internal switch and allows the output to drop below regulation voltage before the switch is turned on again. the lower the load current, the longer it takes for the regulator to initiate a new cycle. because the con - verter skips unnecessary cycles, the converter efficiency increases. during skip mode the quiescent current drops to 35 f a. overtemperature protection thermal-overload protection limits the total power dissipa - tion in the device. when the junction temperature exceeds +175c (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down controller, allow - ing the ic to cool. the thermal sensor turns on the device again after the junction temperature cools by +15c. applications information output voltage/reset threshold resistive divider network although the devices output voltage and reset thresh - old can be set individually, figure 3 shows a combined resistive divider network to set the desired output voltage and the reset threshold using three resistors. use the following formula to determine the r fb3 of the resistive divider network: total ref fb3 out r v r v = where v ref = 1v, r total = selected total resistance of r fb1 , r fb2 , and r fb3 in ohms, and v out is the desired output voltage in volts. total ref_res fb2 fb3 res r v r - r v = where v ref_res is 1.2v (see the electrical characteristics table), and v res is the desired reset threshold in volts. the precision of the reset threshold function is dependent on the tolerance of the resistors used for the divider. care must be taken to choose the values of the resistors. too small a resistor value adds to the devices quiescent cur - rent, whereas if the resistors are too large, there is some noise susceptibility to the fb pin. boost capacitor for dropout operation the device has an internal boost capacitor refresh algo - rithm for dropout operation. this is required to ensure proper boost capacitor voltage, which delivers power to the gate drive circuitry. if the high-side mosfet is on consecutively for 3.65 clock cycles, the internal counter detects this and turns off the high-side mosfet for 0.35 clock cycles. this is of particular concern when v in is falling and approaching v out and a minimum switching frequency of 220khz is used. the worst-case condition for boost capacitor refresh time is with no load on the output. for the boost capacitor to recharge completely, the lx node must be pulled to ground. if there is no current in the inductor, the lx node does not go to ground. to solve this issue, an internal load of approximately 100ma is turned on at the 6th clock cycle, which is determined by a separate counter. in the worst-case condition with no load, the lx node does not go below ground during the first detect of the 3.65 clock cycles. it must wait for the next 3.65 clock cycles to finish. this means the soonest the lx node can go below ground is 4 + 3.65 = 7.65 clock cycles. this time does not factor in the size of the inductor and the time it takes for the inductor current to build up to 100ma (internal load). so no-load minimum time before refresh is: dt (no load) = 7.65 clock cycles = 7.65 x 5s (at 220khz) = 34.77s figure 3. output voltage/reset threshold resistive divider network MAX16974 r fb3 r fb2 r fb1 v out reseti fb
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 ______________________________________________________________________________________ _ _ 13 assume a full 100ma is needed to refresh the bst capacitor. depending on the size of the inductor, the time it takes to build up a full 100ma in the inductor is given by: dt (inductor) = l x di/dv (current buildup starts from the 6th clock cycle) l = inductor value chosen in the design guide di is the required current = 100ma dv = voltage across the inductor (assume this to be 0.5v), which means v in is greater than v out by 0.5v if dt (inductor) < 7.65 - 6 (clock cycles), the bst capaci - tor should be sized as follows: bst_cap i bst(dropout) x dt (no load)/dv (bst capacitor) dt (no load) = 7.65 clock cycles = 34.77s dv (bst capacitor) for (3.3v to 5v) output = v out - 2.7v (2.7v is the minimum voltage allowed on the bst capacitor) if dt (inductor) > 7.65 - 6 clock cycles, then wait for the next count of 3.65 clock cycles making dt (no load) = 11.65 clock cycles. considering the typical inductor values used for 220khz operation, the safe way to design the bst capacitor is to assume: dt (no load) as 16 clock cycles so the final bst_capacitor equation is: bst_cap = i bst(dropout) x dt (no load)/dv (bst capacitor) where i bst(dropout) = 3ma (worst case) dt (no load) = 16 clock cycles dv (bst capacitor) = v out - 2.7v. reset timeout period the device offers a capacitor-adjustable reset timeout period. connect up to 0.1 f f capacitor from cres to gnd to set the timeout period. cres can source 10 f a of current. use the following formula to set the timeout period: -6 1.25v c reset_timeout (s), 10 10 a = where c is the capacitor from cres to gnd in farads. internal oscillator the switching frequency, f sw , is set by a resistor (r fosc ) connected from fosc to gnd. see figure 4 to select the correct r fosc value for the desired switching frequency. for example, a 2.2mhz switching frequency is set with r fosc = 12.1k i . higher frequencies allow designs with lower inductor values and less output capacitance. consequently, peak currents and i 2 r losses are lower at higher switching frequencies, but core losses, gate- charge currents, and switching losses increase. inductor selection three key inductor parameters must be specified for operation with the device: inductance value (l), inductor saturation current (i sat ), and dc resistance (r dcr ). to select inductance value, the ratio of inductor peak-to- peak ac current to dc average current (lir) must be selected first. a good compromise between size and loss is a 30% peak-to-peak ripple current to average current ratio (lir = 0.3). the switching frequency, input voltage, output voltage, and selected lir determine the inductor value as follows: out sup out sup sw out v (v v ) l v f i lir ? = where v sup , v out , and i out are typical values so that efficiency is optimum for typical conditions. the switch - ing frequency is set by r fosc (see the internal oscillator section). the exact inductor value is not critical and can be adjusted to make trade-offs among size, cost, effi - ciency, and transient response requirements. figure 4. switching frequency vs. r fosc switching frequency vs. r fosc MAX16974 toc12 r fosc (k i ) switching frequency (mhz) 122 112 22 32 42 62 72 82 92 52 102 0.4 0.8 1.2 1.6 2.0 2.4 2.8 0 12
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 14 _ _ ______________________________________________________________________________________ table 1 shows a comparison between small and large inductor sizes. the inductor value must be chosen so the maximum induc - tor current does not reach the minimum current limit of the device. the optimum operating point is usually found between 10% and 30% ripple current. when pulse skip - ping (light loads), the inductor value also determines the load-current value at which pfm/pwm switchover occurs. find a low-loss inductor having the lowest possible dc resistance that fits in the allotted dimensions. most inductor manufacturers provide inductors in standard values, such as 1.0 f h, 1.5 f h, 2.2 f h, 3.3 f h, etc. also look for nonstandard values, which can provide a bet - ter compromise in lir across the input voltage range. if using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the lir with properly scaled inductance values. for the selected inductance value, the actual peak-to-peak inductor ripple current ( d i inductor ) is defined by: out sup out inductor sup sw v (v v ) i v f l ? ? = where d i inductor is in a, l is in h, and f sw is in hz. ferrite cores are often the best choices, although pow - dered iron is inexpensive and can work well at 220khz. the core must be large enough not to saturate at the peak inductor current (i peak ): inductor peak load(max) i i i 2 ? = + input capacitor the input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuits switching. the input capacitor rms current requirement (i rms ) is defined by the following equation: out sup out rms load(max) sup v (v v ) i i v ? = i rms has a maximum value when the input voltage equals twice the output voltage (v sup = 2v out ), so i rms(max) = i load(max) /2. choose an input capacitor that exhibits less than +10 n c self-heating temperature rise at the rms input current for optimal long-term reliability. the input-voltage ripple is comprised of d v q (caused by the capacitor discharge) and d v esr (caused by the equivalent series resistance (esr) of the capacitor). use low-esr ceramic capacitors with high ripple-current capability at the input. assume the contribution from the esr and capacitor discharge equal to 50%. calculate the input capacitance and esr required for a specified input-voltage ripple using the following equations: esr in l out v esr i i 2 ? = ? + where sup out out l sup sw (v v ) v i v f l ? ? = and out out in q sw supsw i d(1 d) v c and d v f v ? = = ? where i out is the maximum output current, and d is the duty cycle. output capacitor the output filter capacitor must have low enough esr to meet output ripple and load-transient requirements, yet have high enough esr to satisfy stability requirements. the output capacitance must be high enough to absorb the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage fault protection. when using high-capacitance, low-esr capacitors, the filter capacitors esr dominates the output voltage ripple. so the size of the output capaci - tor depends on the maximum esr required to meet the output voltage ripple (v ripple(p-p) ) specifications: ripple(p p) load(max) v esr i lir ? = the actual capacitance value required relates to the physical size needed to achieve low esr, as well as to the chemistry of the capacitor technology. thus, the capacitor is usually selected by esr and voltage rating rather than by capacitance value. table_ 1._ inductor_ size_ comparison inductor_ size smaller larger lower price smaller ripple smaller form factor higher efficiency faster load response larger fixed-frequency range in skip mode
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 ______________________________________________________________________________________ _ _ 15 when using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent v sag and v soar from caus - ing problems during load transients. generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising-load edge is no longer a problem (see the v sag and v soar equations in the transient response section). however, low- capacity filter capacitors typically have high-esr zeros that can affect the overall stability. other important crite - ria in the choice of the total output capacitance are the devices soft-start time and maximum current capability (see the soft-start time and maximum allowed output capacitance section). soft-start time and maximum allowed output capacitance the devices soft-start time depends on the selected switching frequency. the soft-start time is fixed to 2048 cycles, regardless of the switching frequency. this means at 2.2mhz the soft-start time is ~0.93ms, and at 220khz the soft-start time is ~9.3ms. the device is a 2a-capable switching regulator and the amount of load present at startup determines the total output capacitance allowed for a particular application. out(max) sw out lx(min) load(max) c 2048/f 1/ v i - i ? ? ? ? ? keeping the above equation in mind, see the following table to ensure that c out is less than maximum allowed values. transient response the inductor ripple current also impacts transient response performance, especially at low v sup - v out differentials. low inductor values allow the inductor cur - rent to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. the total output-voltage sag is the sum of the voltage sag while the inductor is ramping up and the voltage sag before the next pulse can occur: ( ) ( ) ( ) ( ) 2 load(max) load(max) sag out out sup max out l i i t t v c 2c v d v ? ? ? ? = + ? where d max is the maximum duty factor (see the electrical characteristics table), l is the inductor value in f h, c out is the output capacitor value in f f, t is the switching period (1/f sw ) in f s, and t equals (v out / v sup x t when in fixed-frequency pwm mode, or l x 0.2 x i max /(v sup - v out ) when in skip mode. the amount of overshoot (v soar ) during a full-load to a no-load tran - sient due to stored inductor energy can be calculated as: ( ) ( ) 2 soar load(max) out out v i l/ 2 x c v ? rectifier selection the device requires an external schottky diode rectifier as a freewheeling diode. connect this rectifier close to the device using short leads and short pcb traces. choose a rectifier with a continuous current rating greater than the highest output current-limit threshold (3.5a), and with a voltage rating greater than the maximum expected input voltage, v supsw . use a low forward-voltage-drop schottky rectifier to limit the negative voltage at lx. avoid higher than necessary reverse-voltage schottky rectifiers that have higher forward-voltage drops. compensation network the device uses an internal transconductance error amplifier with its inverting input and output available to the user for external frequency compensation. the output capacitor and compensation network determine the loop stability. the inductor and the output capaci - tor are chosen based on performance, size, and cost. additionally, the compensation network optimizes the control-loop stability. the controller uses a current-mode control scheme that regulates the output voltage by forcing the required cur - rent through the external inductor, so the device uses frequency_=_400khz v out _ (v) i load _ (startup)_(a) c out (max_allowed) 3.3 2 775 f f 5 2 512 f f 3.3 0 3.9mf 5 0 2.6mf frequency_=_2.2mhz v out _(v) i load _ (startup)_(a) c out (max_allowed) 3.3 2 140 f f 5 2 93 f f 3.3 0 705 f f 5 0 465 f f
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 16 _ _ ______________________________________________________________________________________ the voltage drop across the high-side mosfet. current- mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor result - ing in a smaller phase shift and requiring less elaborate error-amplifier compensation than voltage-mode control. a simple single-series resistor (r c ) and capacitor (c c ) are all that is required to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering (figure 5). for other types of capacitors, due to the higher capacitance and esr, the frequency of the zero created by the capacitance and esr is lower than the desired closed-loop crossover fre - quency. to stabilize a nonceramic output capacitor loop, add another compensation capacitor (c f ) from comp to gnd to cancel this esr zero. the basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. the power modulator has a dc gain set by g mc o r load , with a pole and zero pair set by r load , the output capacitor (c out ), and its esr. the following equations approximate the value for the gain of the power modulator (gain mod(dc) ), neglecting the effect of the ramp stabilization. ramp stabi - lization is necessary when the duty cycle is above 50% and is internally done for the device. mod(dc) mc load gain g r = where r load = v out /i lout(max) in i and g mc = 3s. in a current-mode step-down converter, the output capacitor, its esr, and the load resistance introduce a pole at the following frequency: pmod out load 1 f 2 c r = the output capacitor and its esr also introduce a zero at: zmod out 1 f 2 esr c = when c out is composed of n identical capacitors in parallel, the resulting c out = n o c out(each) and esr = esr (each) /n. note that the capacitor zero for a paral - lel combination of alike capacitors is the same as for an individual capacitor. the feedback voltage-divider has a gain of gain fb = v fb /v out , where v fb is 1v (typ). the transconductance error amplifier has a dc gain of gain ea(dc) = g m,ea o r out,ea , where g m,ea is the error amplifier transconductance, which is 1000 f s (typ), and r out,ea is the output resistance of the error amplifier 50m i . a dominant pole (f dpea ) is set by the compensation capacitor (c c ) and the amplifier output resistance (r out,ea ). a zero (f zea ) is set by the compensation resistor (r c ) and the compensation capacitor (c c ). there is an optional pole (f pea ) set by c f and r c to cancel the output capacitor esr zero if it occurs near the crossover frequency (f c , where the loop gain equals 1 (0db)). thus: pdea c out,ea c 1 f 2 c (r r ) = + zea c c 1 f 2 c r = pea f c 1 f 2 c r = the loop-gain crossover frequency (f c ) should be set below 1/5th of the switching frequency and much higher than the power-modulator pole (f pmod ): sw pmod c f f f 5 << figure 5. compensation network r 1 r 2 c c c f v ref v out r c comp g m
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 ______________________________________________________________________________________ _ _ 17 the total loop gain as the product of the modulator gain, the feedback voltage-divider gain, and the error amplifier gain at f c should be equal to 1. so: fb mod(fc) ea(fc) out v gain gain 1 v = for_ the_ case_ where_ f zmod _ is_ greater_ than_ f c : ea(fc) m,ea c gain g r = pmod mod(fc) mod(dc) c f gain gain f = therefore: fb mod(fc) m,ea c out v gain g r 1 v = solving for r c : out c m,ea fb mod(fc) v r g v gain = set the error-amplifier compensation zero formed by r c and c c (f zea ) at the f pmod . calculate the value of c c as follows: c pmod c 1 c 2 f r = if f zmod is less than 5 x f c , add a second capacitor, c f , from comp to gnd and set the compensation pole formed by r c and c f (f pea ) at the f zmod . calculate the value of c f as follows: f zmod c 1 c 2 f r = as the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. for_ the_ case_ where_ f zmod _ is_ less_ than_ f c : the power-modulator gain at f c is: pmod mod(fc) mod(dc) zmod f gain gain f = the error-amplifier gain at f c is: zmod ea(fc) m,ea c c f gain g r f = therefore: zmod fb mod(fc) m,ea c out c f v gain g r 1 v f = solving for r c : out c c m,ea fb mod(fc) zmod v f r g v gain f = set the error-amplifier compensation zero formed by r c and c c at the f pmod (f zea = f pmod ): c pmod c 1 c 2 f r = if f zmod is less than 5 o f c , add a second capacitor, c f , from comp to gnd. set f pea = f zmod and calculate c f as follows: f zmod c 1 c 2 f r = pcb layout guidelines careful pcb layout is critical to achieve low switching losses and clean, stable operation. use a multilayer board whenever possible for better noise immunity and power dissipation. follow these guidelines for good pcb layout: 1) use a large contiguous copper plane under the ic package. ensure that all heat-dissipating compo - nents have adequate cooling. the bottom pad of the device must be soldered down to this copper plane for effective heat dissipation and getting the full power out of the ic. use multiple vias or a single large via in this plane for heat dissipation. 2) isolate the power components and high-current path from the sensitive analog circuitry. this is essential to prevent any noise coupling into the analog signals. 3) keep the high-current paths short, especially at the ground terminals. this practice is essential for stable, jitter-free operation. the high-current path composed of input capacitor, high-side fet, inductor, and the output capacitor should be as short as possible.
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 18 _ _ ______________________________________________________________________________________ 4) keep the power traces and load connections short. this practice is essential for high efficiency. use thick cop - per pcbs (2oz vs. 1oz) to enhance full-load efficiency. 5) the analog signal lines should be routed away from the high-frequency planes. this ensures integrity of sensitive signals feeding back into the ic. 6) the ground connection for the analog and power sec - tion should be close to the ic. this keeps the ground current loops to a minimum. in cases where only one ground is used, enough isolation between analog return signals and high power signals must be maintained. 7) ensure a high-frequency decoupling capacitor of 0.1f is placed next to the sup pin of the ic. this capacitor prevents high-frequency noise from entering the sup pin. adding a resistor between the supsw and sup pins along with the decoupling capacitor at the sup pin is recommended to reduce noise sensitivity. chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern_ no. 16 tssop-ep u16e+3 21-0108 90-0120
high-voltage, 2.2mhz, 2a automotive step- down converter with low operating current MAX16974 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 19 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 11/10 initial release 1 7/11 corrected the gain mod(dc) and f pmod equations in the compensation network section 16

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