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data sheet ?2010 greenliant systems, ltd. s71355-04-000 05/10 www.greenliant.com features: ? industry standard ata/ide bus interface ? host interface: 16-bit access ? supports up to pio mode-6 ? supports up to multi-word dma mode-4 ? supports up to ultra dma mode-4 ? interface for standard nand flash media ? flash media interface: single or dual 8-bit access - supports up to 4 flash media devices per channel - supports up to 8 flash media devices directly - supports up to 64 flash media devices with external decoding logic ? supports single-level cell (slc) or multi-level cell (mlc) flash media - 2 kbyte and 4 kbyte program page size ? 3.0v power supply ? 5.0v or 3.0v host interface through v ddq pins ? low current operation: ? active mode: 25 ma/35 ma (3.0v/5.0v) (typical) ? sleep mode: 80 a/100 a (3.0v/5.0v) (typical) ? power management unit ? immediate disabling of unus ed circuitry without host intervention ? zero wake-up latency ? write protection ? wp#/pd# pin configurable by host for prevention of data overwrites ? 20-byte unique id for enhanced security ? factory pre-programmed 10-byte unique id ? user-programmable 10-byte id ? programmable, multitasking nand interface ? firmware storage in embedded superflash ? ? pre-programmed embedded firmware ? performs self-initializati on on first system power-on ? executes industry standard ata/ide commands ? implements dynamic wear-leveling algorithms to substantially increase the longevity of flash media ? embedded flash file system ? built-in hardware ecc ? corrects up to 8 random single-bit errors per 512-byte sector ? built-in internal system clock ? multi-tasking technology enables fast sustained write performance (host to flash) ? supports up to 30 mb/sec ? fast sustained read performance (flash to host) ? up to 30 mb/sec ? automatic recognition and initialization of flash media devices ? seamless integration into a standard smt manufacturing process ? 5 sec. (typical) for flash drive recognition and setup ? commercial and industrial temperature ranges ? 0c to 70c for commercial operation ? -40c to +85c for industrial operation ? packages available ? 100-lead tqfp ? 14mm x 14mm ? 85-ball vfbga ? 6mm x 6mm ? all non-pb (lead-free) devices are rohs compliant product description the gls55vd020 is the heart of a high-performance, flash media-based data storage system. the nand con- troller recognizes the control, address, and data signals on the ata/ide bus and translates them into memory accesses for standard nand-type flash media. utilizing both single-level cell (s lc) and multi-level cell (mlc) flash media, this technology supports solid state mass storage applications by offering new, expanded functionality while enabling sm aller, lighter designs with lower power consumption. the nand controller supports standard ata/ide protocol with up to pio mode-6, multi-word dma mode-4, and ultra dma mode-4 interface. the ata/ide interface is widely used in such products as portable and desktop com- puters, portable media player, music players, handheld data collection scanners, pd as, handy terminals, personal communicators, audio recorders, monitoring devices, and set-top boxes. the nand controller uses superflash ? memory technol- ogy and is factory pre-programmed with an embedded flash file system. upon initia l power-on, the gls55vd020 recognizes attached flash media devices, sets up a bad block table, executes all necessary handshaking routines for flash media support, and, finally, performs the low-level format. this process typically takes about 3 second plus 0.5 seconds per gigabyte of drive capacity, allowing a 4 nand controller gls55vd020 gls55lc100mcompact flash card controller
2 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 gbyte flash drive to be fully initialized in about 5 seconds. for added manu facturing flexibility, system debug, re-ini- tialization, and user customization can be accomplished through the ata/ide interface. the gls55vd020 high-performance nand controller offers sustained read and write performance up to 30.0 mb/sec. the gls55vd020 directly supports up to 8 flash media devices or, through simple decoding logic, can support up to 64 flash media devices. the controller also provides a wp#/pd# pin to protect criti- cal information stored in the flash media from unauthorized overwrites. the nand controller comes pre-programmed with a 10- byte unique serial id. for even greater system security, the user has the option of progr amming an additional 10 bytes of id space to create a unique, 20-byte id. the nand controller comes packaged in an industry-stan- dard, 100-lead tqfp package or a 85-ball vfbga pack- age for easy integration into an smt manufacturing process.
data sheet nand controller gls55vd020 3 ?2010 greenliant systems, ltd. s71355-04-000 05/10 general description the nand controller contains a microcontroller and embedded flash file system integrated in tqfp and vfbga packages. refer to figure 1 for the nand control- ler block diagram. the controlle r interfaces with the host system allowing data to be written to and read from the flash media. performance-optimi zed nand controller the nand controller translates standard ata signals into flash media data and control signals. the following compo- nents contribute to the nand controller?s operation. microcontroller unit (mcu) the mcu coordinates all related components to complete requested operations. internal direct me mory access (dma) the nand controller uses internal dma which allows instant data transfer from buffer to flash media. this increases the data transfer rate by eliminating the micro- controller overhead associated with the traditional, firm- ware-based approach. power management unit (pmu) the power management unit co ntrols the power consump- tion of the nand controller. it reduces the power con- sumption of the nand controlle r by putting circuitry not in operation into sleep mode. the pmu has zero wake-up latency. sram buffer the nand controller performs as an sram buffer to opti- mize the host?s data transfer to and from the flash media. embedded flash file system the embedded flash file system is an integral part of the nand controller. it contains mcu firmware that performs the following tasks: 1. translates host side signals into flash media writes and reads. 2. provides dynamic flash media wear-leveling to spread the flash writes across all unused memory address space to increase the longevity of flash media. 3. keeps track of data file structures. error correction code (ecc) the nand controller uses bch error detection code (edc) and error correction code (ecc) algorithms which correct up to eight random single-bit errors for each 512-byte block of data. high performance is achieved through hardware-based error detection and correction. serial communication interface (sci) the serial communication inte rface (sci) is designed to provide trace information during debugging process. to aid in validation, always prov ide the sci access to pcb design. programmable, multi-t asking nand interface the multi-tasking interface enables fast, sustained write and read performance by allowing multiple read, program, and erase operations to multiple flash media devices. the programmable nand interface enables timely support of fast changing nand technology.
4 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 functional blocks figure 1: nand c ontroller b lock d iagram 1355 b1.1 host ata/ide bus nand controller multi-tasking interface sci embedded flash file system mcu ecc internal dma sram buffer pmu nand flash media nand flash media dual channel
data sheet nand controller gls55vd020 5 ?2010 greenliant systems, ltd. s71355-04-000 05/10 pin assignments the signal/pin assignments are listed in table 2. low active signals have a ?#? suffix. pi n types are input, output, or input/output. signal s whose source is the host are desig- nated as inputs while signa ls that the nand controller sources are outputs. the nand controller functions in ata mode, which is compatible with ide hard disk drives. figure 2: p in a ssignments for 100- lead tqfp (tqw) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 reset# v ss (io) d7 d6 d5 d4 v ddq (io) d3 d2 d1 d0 v ss (io) tie_dn dmarq dnu dnu dnu dnu iord# dmack intrq a1 a0 cs1fx# v ss (core) tie_dn dnu v ss (io) wp#/pd# fwe# fce5# fale fce4# fcle fce6# v ss (io) fce3# fce2# v dd (io) fce0# dnu fre# dnu v reg dnu fce1# scid out scid in sciclk v dd (cor e) fce7# v ss (io) fad0 fad8 fad1 fad9 fad2 fad10 fad3 fad11 v ss (io) dnu v dd (io) fad4 fad12 fad5 fad13 fad6 fad14 fad7 fad15 dnu dnu dnu por# 1355 100-tqfp p1.0 dasp# v ss (io) d8 d9 d10 d11 v ddq (io) d12 d13 d14 d15 v ss (io) dnu iordy dnu dnu dnu dnu iowr# csel iocs16# pdiag# a2 cs3fx# v ss (core) n ote: dnu means do not use, must be left unconnected. 100-lead tqfp top view
6 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 figure 3: p in a ssignments for 85- ball vfbga (mvw) 1355 85-vfbga mw p1 .0 a b c d e f g h j k vss fad0 fad1 fad10 vss fad12 fad6 fad15 vss vss vss fad8 fad9 fad3 vdd fad5 fad14 por# a2 cs3fx# cs1fx# fce7# fad2 fad11 fad4 fad13 fad7 csel iocs16# pdiag# intrq a1 a0 vss d15 iordy iowr# vss iord# dmack# d13 d14 vss reset# dnu vss fce5# fcle vss vdd fce1# scidin sciclk vss d7 tie_dn fwe# fce4# fce3# fce0# v reg scidout vdd d6 d5 d4 wp#/pd# fale fce6# fce2# fre# dasp# vss vddq d3 d2 d8 d9 d10 d1 d0 dmarq d11 d12 vddq top view (balls facing down) 1 0 9 8 7 6 5 4 3 2 1
data sheet nand controller gls55vd020 7 ?2010 greenliant systems, ltd. s71355-04-000 05/10 table 1: p in a ssignments (1 of 4) symbol pin no. pin type i/o type 1 name and functions 100- tqfp 85- vfbga host side interface a2 53 b2 i i1z a[2:0] are used to select one of eight registers in the task file. a1 22 d9 a0 23 d8 d15 65 d3 i/o i1z/o2 d[15:0] data bus d14 66 e2 d13 67 e3 d12 68 f2 d11 70 f3 d10 71 g1 d9 72 g2 d8 73 g3 d7 3 j9 d6 4 h10 d5 5 h9 d4 6 h8 d3 8 g9 d2 9 g8 d1 10 f10 d0 11 f9 dmack 20 e8 i i2u dma acknowledge - input from host dmarq 14 f8 o o1 dma request to host iordy 62 d2 o o1 iordy: when ultra dma mode dm a write is not active and the device is not ready to respond to a data transfer request, this sig- nal is negated to extend the host transfer cycle. however, it is never negated by this controller. ddmardy# ddmardy#: when ultra dma mode dma write is active, this sig- nal is asserted by the host to indicate that the device is read to receive ultra dma data-in bursts. the device may negate ddmardy# to pause an ultra dma transfer. dstrobe dstrobe: when ultra dma mode dma write is active, this sig- nal is the data-out strobe generated by the device. both the rising and falling edges of dstrobe cause data to be latched by the host. the device may stop generating dstrobe edges to pause an ultra dma data-out burst. cs1fx# 24 c10 ii2z cs1fx# is the chip select for the task file registers cs3fx# 52 b1 cs3fx# is used to select the alternate status register and the device control register. csel 56 c3 i i1u this internally pulled-up signal is used to configure this device as a master or a slave. when this pin is grounded, this device is config- ured as a master. when the pin is open, or tied to v ddq , this device is configured as a slave. the pin setting should remain the same from power-on to power-down.
8 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 iord# 19 e9 i i2z iord#: this is an i/o read strobe generated by the host. when ultra dma mode is not active, this signal gates i/o data from the device. hdmardy# hdmardy#: in ultra dma mode when dma read is active, this signal is asserted by the host to indicate that the host is ready to receive ultra dma data-in bursts. the host may negate hdmardy# to pause an ultra dma transfer. hstrobe hstrobe: when dma write is active, this signal is the data-out strobe generated by the host. both the rising and falling edges of hstrobe cause data to be latched by the device. the host may stop generating hstrobe edges to pause an ultra dma data-out burst. iowr# 57 d1 i i2z this is an i/o write strobe generated by the host. when ultra dma mode is not active, this signal is used to clock i/o data into the device. stop when ultra dma mode protocol is active, the assertion of this sig- nal causes the terminatio n of the ultra dma burst iocs16# 55 c2 o o2 this output signal is asserted low when the device is indicating a word data transfer cycle. intrq 21 d10 o o1 this signal is the active high interrupt request to the host. pdiag# 54 c1 i/o i1u/o1 the pass diagnostic signal in the master/slave handshake proto- col. dasp# 75 h2 i/o i1u/o6 the drive active/slave present signal in the master/slave hand- shake protocol. reset# 1 k10 i i2u this input pin is the active low hardware reset from the host. wp#/pd# 97 h7 i i3u the wp#/pd# pin can be used for either the write protect mode or power-down mode, but only one mode is active at any time. the write protect or power-down modes can be selected through the host command. the write protect m ode is the factory default set- ting. this pin accepts only in the 3.3v v dd signal level. flash media interface fre# 84 h3 oo5 active low flash media chip read fwe# 96 j7 active low flash media chip write fcle 92 k6 active high flash media chip command latch enable fale 94 h6 active high flash media chip address latch enable fad15 46 a3 i/o i3u/o5 flash media chip high byte address/data bus pins fad14 44 b4 fad13 42 c5 fad12 40 a5 fad11 35 c7 fad10 33 a7 fad9 31 b8 fad8 29 b9 table 1: p in a ssignments (c ontinued ) (2 of 4) symbol pin no. pin type i/o type 1 name and functions 100- tqfp 85- vfbga
data sheet nand controller gls55vd020 9 ?2010 greenliant systems, ltd. s71355-04-000 05/10 fad7 45 c4 i/o i3u/o5 flash media chip low byte address/data bus pins fad6 43 a4 fad5 41 b5 fad4 39 c6 fad3 34 b7 fad2 32 c8 fad1 30 a8 fad0 28 a9 fce7# 26 c9 o o4 active low flash media chip enable pin fce6# 91 h5 fce5# 95 k7 fce4# 93 j6 fce3# 89 j5 fce2# 88 h4 fce1# 80 k3 fce0# 86 j4 serial communication interface (sci) scid out 79 j2 o o4 sci interface data output scid in 78 k2 i i3u sci interface data input sciclk 77 k1 i i3u sci interface clock miscellaneous v ss (io) 2 12 27 36 64 74 90 98 a2 a6 a10 d4 e1 e10 h1 j10 k5 k8 pwr ground for i/o v ss (core) 25 51 a1 b10 pwr ground for core v dd (io) 38 87 b6 k4 pwr v dd (3.3v) v dd (core) 76 j1 pwr v dd (3.3v) v ddq (io) 7 69 f1 g10 pwr v ddq (5v/3.3v) for host interface v reg 82 j3 o external capacitor pin por# 50 b3 i analog input 2 power-on reset (por). active low t ie _dn 13 100 j8 pin needs to be connected to v ss. table 1: p in a ssignments (c ontinued ) (3 of 4) symbol pin no. pin type i/o type 1 name and functions 100- tqfp 85- vfbga
10 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 dnu 3 15 16 17 18 37 47 48 49 58 59 60 61 63 81 83 85 99 k9 do not use, must be left unconnected. t0-0.3 1355 1. ixu = input with on-chip pull-up. ixz = input without on-chip pull-up. 2. analog input is connected to v dd for supply voltage detection 3. all dnu pins should not be connected. table 1: p in a ssignments (c ontinued ) (4 of 4) symbol pin no. pin type i/o type 1 name and functions 100- tqfp 85- vfbga
data sheet nand controller gls55vd020 11 ?2010 greenliant systems, ltd. s71355-04-000 05/10 capacity specification table 2 shows the default capacity and specific settings fo r heads, sectors, and cylinders. users can change the default settings in the drive id table, table 8, for customization. if the total number of bytes is less than the default, the remainin g space could be used as spares to increase the flash drive e ndurance. it should also be noted that if the total flash drive capacity exceeds the total def ault number of bytes, the flash drive endurance will be reduced. functional specifications table 3 shows the performance and the maxi mum capacity supported by gls55vd020. table 2: default ata flash drive settings capacity 1 1. these flash drive capacities can only be manufactured by using the specified version of the nand controller. total bytes cylinders 2 2. cylinders, heads, and sectors can be re-configured from the default settings during the manufacturing process. heads 2 sectors 2 max lba 128 mb 128,450,560 490 16 32 250,880 256 mb 256,901,120 980 16 32 501,760 512 mb 512,483,328 993 16 63 1,000,944 1 gb 1,024,966,656 1986 16 63 2,001,888 2 gb 2,048,385,024 3969 16 63 4,000,752 4 gb 4,096,253,952 7937 16 63 8,000,496 6 gb 6,001,164,288 11628 16 63 11,721,024 8 gb 8,001,552,384 15504 16 63 15,628,032 16 gb 16,001,040,384 16383 3 3. cylinders, heads, and sectors are not applicable fo r these capacities. only lba addressing applies. 16 63 31,252,032 32 gb 32,001,048,576 16383 3 16 63 62,502,048 48 gb 48,002,088,960 16383 3 16 63 93,754,080 64 gb 64,002,097,152 16383 3 16 63 125,004,096 96 gb 96,004,177,920 16383 3 16 63 187,508,160 128 gb 128,004,194,304 16383 3 16 63 250,008,192 t0-0.5 1355 table 3: functional specification of gls55vd020 functions gls55vd020 ata controller supported capacity up to 128 gb ata controller performance-sustained write speed up to 30.0 mb/sec ata controller performance-sustained read speed up to 30.0 mb/sec t0-0.3 1355
12 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 manufacturing support the nand controller firmware contains a list of supported st andard nand flash media devices. upon initial power-on, the controller scans all connected flash media devices and reads their device id. if t he device id matches the listed flash media devices in the nand controller, the controller performs drive recognition based on the algorithm provided by the flash media suppliers, including setting up the bad bl ock table, executing all the necessary handshaking routines fo r flash media support, and, finally, performing the low-le vel format. for power-up timing spec ifications, please refer to table 13. please contact greenliant for t he most current list of suppor ted nand flash media devices. in the event that the nand fl ash media device id is not rec ognized by the nand controller, the user has an option of adding this device to the controller device table through the manufacturing interface provi ded by greenliant. please contact green- liant for the nand controller manufacturing interface software. if the drive initialization fails, and a visual inspection is u nable to determine the problem, the gls55vd020 nand controller pr ovides a comprehensive interface for manufacturing flow debug. this interface not only allows debug of the failure and man ual reset of the initialization process, but also allows cus- tomization of user definable options. ata/ide interface the nand controller interface can be us ed for manufacturing support. greenliant provides an example of a dos-based solution (an executable routine available from greenliant) for manufacturing debug and rework. serial communication interface (sci) for additional manufactur ing flexibility, the sci bus can be used to report manufactu ring errors. the sci consists of 3 active signals: scid out , scid in , and sciclk. security features the gls55vd020 nand controller offers the standard ata securi ty mode feature set, a pass word system t hat restricts the access of user data stored in the device. for additional da ta security features, pl ease contact greenliant.
data sheet nand controller gls55vd020 13 ?2010 greenliant systems, ltd. s71355-04-000 05/10 configurable write prot ect/power-down modes the wp#/pd# pin can be used for either write protect mode or power-down mode, but only one mo de is active at any time. either mode can be selected through the host co mmand, set-wp#/pd#-mode, explained in section . once the mode is set with this command, t he pin will stay in the configured mode unt il the next time th is command is issued. power-off or reset will not change the configured mode. write protect mode when the wp#/pd# pin is configur ed in the write protect mode, the pin offers extended data protection. this feature can be either selected through a jumper or host logic to protect th e stored data from inadvertent system writes or erases, and viruses. the write protect feature protects the full address space of the data stored on the flash media. in the write protect mode, the wp#/pd# pin should be asserted prior to issu ing the destructive co mmands: erase-sector, format-track, write-dma, write-long-sector, write-multiple, write-multiple-without-erase, write-sector(s), write-sector- without-erase, or write-verify. this will force the nand cont roller to reject any destructive commands from the ata inter- face. all destructive commands will return 51 h in the status register and 04h in the error regist er signifying an invalid com- mand. all non-destructive comm ands will be executed normally. power-down mode when the wp#/pd# is configured in the po wer-down mode, if the pin is asserted during a command, the ata disk controller completes the current command and returns to the standby m ode immediately to save power. afterwards, the device will not accept any other commands. only a power- on reset (por) or hardware reset will br ing the device to normal operation with the wp#/pd# pin de-asserted.
14 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 power-on and bro wn-out reset characteristics power-on and brown-out reset circuitry reset the device to a known state. power-on reset asserts when the device is turned on. brown-out reset asserts when the detected voltage falls below an acceptable level. for more information about the power-on and brown-out reset timing, see figure 4 and table 4. figure 4: power-on and brown-out reset timing table 4: power-on and brown-out reset timing item symbol min max units v dd /por# rise time 1 1. v dd rise time should be faster than or equal to por# rise time. t r 250 ms v dd /por# fall time 2 2. v dd fall time should be slower t han or equal to por# fall time. t f 250 ms t0-0.0 1355 1355 f23 .0 v dd / por# t r 90% 10% t f 90% 10%
data sheet nand controller gls55vd020 15 ?2010 greenliant systems, ltd. s71355-04-000 05/10 i/o transfer function the default operation for the nand controller is 16-bit. ho wever, if the host issues a set-feature command to enable 8-bit mode, the nand controller permits 8-bit data access. the following table defines the function of various operations. table 5: i/o function function code cs3fx# cs1fx# a0-a2 iord# iowr# d15-d8 d7-d0 invalid mode v il v il x x x undefined undefined standby mode v ih v ih x x x high z high z task file write v ih v il 1-7h v ih v il x data in task file read v ih v il 1-7h v il v ih high z data out data register write v ih v il 0v ih v il in 1 1. if 8-bit data transfer mode is enabled. in 8-bit data transfer mode, high byte is undefined for data out. for data in, x can be v ih or v il , but no other value. in data register read v ih v il 0v il v ih out 1 out control register write v il v ih 6h v ih v il x control in alt status read v il v ih 6h v il v ih high z status out t0-0.0 1355
16 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 software interface nand controller dri ve register set definitions and protocol this section defines the drive registers for the nand controller and the protocol used to address them. nand controller addressing the i/o decoding for an nand cont roller is shown in table 6. nand controller registers the following section describes the hardware registers used by the host software to issue commands to the nand control- ler. these registers are often collectively referred to as the task file registers. the registers are only selectable through cs3fx#, cs1fx#, and a 2 -a 0 signals. data register (read/write) this 16-bit register is used to transfer data blocks between the devic e data buffer and the host. data transfer can be performed in pio mode or dma mode. error register (read only) this register contains addition al information about the source of an error when an error is indicated in bit 0 of t he status register. the bi ts are defined as follows: symbol function icrc / bbk this bit is set when a bad block is detect ed. during an ultra-dma transfer, this bit is set on detection of a crc error. unc this bit is set when an uncorrectable error is encountered. idnf the requested sector id is in error or cannot be found. abrt this bit is set if the command has been aborted because of an nand controller status condition: (not ready, write fault, etc.) or when an invalid command has been issued. it is required that the host retry any media access command (such as read-sectors and write-sectors) that ends with an error condition. amnf this bit is set in case of a general error. table 6: task file registers cs3fx# cs1fx# a2 a1 a0 registers iord# = 0 (iowr#=1) iowr# = 0 (iord#=1) 1 0 0 0 0 data (read) data (write) 1 0 0 0 1 error feature 1 0 0 1 0 sector count sector count 1 0 0 1 1 sector number (lba 7-0) sector number (lba 7-0) 1 0 1 0 0 cylinder low (lba 15-8) cylinder low (lba 15-8) 1 0 1 0 1 cylinder high (lba 23-16) cylinder high (lba 23-16) 1 0 1 1 0 drive/head drive/head 1 0 1 1 1 status command 0 1 1 1 0 alternate status device control t0-0.0 1355 d7 d6 d5 d4 d3 d2 d1 d0 reset value icrc/bbk unc 0 idnf 0 abrt 0 amnf 0000 0000b
data sheet nand controller gls55vd020 17 ?2010 greenliant systems, ltd. s71355-04-000 05/10 feature register (write only) this register provides additional command-spec ific parameters to the nand controller. sector count register this register contains the nu mbers of sectors of data request ed to be transferred on a read or write operation between the host and the nand controller. if the value in this r egister is zero, a count of 256 sectors is spec - ified. if the command was succes sful, this register is zero at command completi on. if not successfully completed, the register contains the number of sectors that need to be transferred in order to complete the request. sector number (lba 7-0) register this register contains the st arting sector number or bi ts 7-0 of the logical block address (lba) for any nand controller data access for the subsequent command. cylinder low (lba 15-8) register this register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the logical block address. cylinder high (lba 23-16) register this register contains the hi gh order bits of the starting cylinder address or bits 23- 16 of the logical block address. drive/head (lba 27-24) register the drive/head register is used to select the drive and head. it is also used to select lba addressing instead of cylinder/head/sector addr essing. the bits are defined as follows: symbol function lba lba is a flag to select either cylinder/head/ sector (chs) or logical block address mode (lba). when lba=0, cylinder/head/ sector mode is selected. when lba=1, logical block address is selected. in logical block mode, the logical block address is interpreted as follows: lba7-lba0: sector number register d7-d0. lba15-lba8: cylinder low register d7-d0. lba23-lba16: cylinder high register d7-d0. lba27-lba24: drive/head register bits hs3-hs0. drv drv is the drive number. when dr v=0 (master), master is selected. when drv=1 (slave), slave is selected. hs3 when operating in the cylinder, head, sect or mode, this is bit 3 of the head number. it is bit 27 in the logical block address mode. hs2 when operating in the cylinder, head, sect or mode, this is bit 2 of the head number. it is bit 26 in the logical block address mode. hs1 when operating in the cylinder, head, sect or mode, this is bit 1 of the head number. it is bit 25 in the logical block address mode. hs0 when operating in the cylinder, head, sect or mode, this is bit 0 of the head number. it is bit 24 in the logical block address mode. status & alternate status registers (read only) these registers return the nand controller status when read by the host. reading the stat us register does clear a pending interrupt while reading the alternate status register does not. the meaning of the status bits are described as follows: d7 d6 d5 d4 d3 d2 d1 d0 reset value 1lba1 drv hs3 hs2 hs1 hs0 1010 0000b d7 d6 d5 d4 d3 d2 d1 d0 reset value busy rdy dwf dsc drq corr 0 err 1000 0000b
18 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 symbol function busy the busy bit is set when the nand controller has access to the command buffer and registers and the host is locked out from ac cessing the command register and buffer. no other bits in this register are va lid when this bit is set to a 1. rdy rdy indicates whethe r the device is capable of perf orming nand controller operations. this bit is cleared at power up and remains cleared until the nand controller is ready to accept a command. dwf this bit, if set, indicates a write fault has occurred. dsc this bit is set when th e nand controller is ready. drq the data-request bit is set when the nand controller requires that information be transferred either to or from the host through the data register. corr this bit is set when a correctable data error has been encountered and the data has been corrected. this condition does no t terminate a multi-sector read operation. err this bit is set when the previous command has ended in some type of error. the bits in the error register contain additional informati on describing the error. it is required that the host retry any media access command (such as read-sectors and write-sectors) that end with an error condition. device control register (write only) this register is used to control the nand controller interrupt request and to issue a software reset. this register can be written to even if the device is busy. the bits are defined as follows: symbol function sw rst this bit is set to 1 in order to force the nand controller to perform a software reset operation. the chip re mains in reset until this bit is reset to ?0.? -ien 0: the interrupt enable bit enables interrupts 1: interrupts from the nand controller are disabled this bit is set to 0 at power-on and reset. command register (write only) this register contains the command code being sent to the drive. command execution begins immediately after this register is wr itten. the executable commands, the command codes, and the necessary parameters for each command are listed in table 7. nand controller co mmand description this section defines the software requirements and the forma t of the commands the host sends to the nand controller. commands are issued to the nand controller by loading t he required registers in the command block with the supplied parameters, and then writing the command code to the command register. with the exception of commands listed in sections -, nand controller complies with ata-6 specifications. nand controller command set table 7 summarizes the nand controller command set. d7 d6 d5 d4 d3 d2 d1 d0 reset value xxx x 1 sw rst -ien 0 0000 1000b table 7: nand controller command set (1 of 2) command code fr 1 sc 2 sn 3 cy 4 dh 5 lba 6 check-power-mode e5h or 98h - - - - d 8 -
data sheet nand controller gls55vd020 19 ?2010 greenliant systems, ltd. s71355-04-000 05/10 execute-drive-diagnostic 90h - - - - d - erase-sector(s) c0h -yyyy y flush-cache e7h - - - - d - format-track 50h - y 7 -yy 8 y identify-drive ech - - - - d - idle e3h or 97h - y - - d - idle-immediate e1h or 95h - - - - d - initialize-drive-parameters 91h - y - - y - nop 00h - - - - d - read-buffer e4h - - - - d - read-dma c8h or c9h - yyyy y read-multiple c4h -yyyy y read-sector(s) 20h or 21h - yyyy y read-verify-sector(s) 40h or 41h - yyyy y recalibrate 1xh - - - - d - request-sense 03h - - - - d - security-disable-password f6h - - - - d - security-erase-prepare f3h - - - - d - security-erase-unit f4h - - - - d - security-freeze-lock f5h - - - - d - security-set-password f1h - - - - d - security-unlock f2h - - - - d - seek 7xh - - y y y y set-features efh y - - - d - smart b0h yyyyd - set-multiple-mode c6h - y - - d - set-sleep-mode e6h or 99h - - - - d - set-wp#/pd#-mode 8bh y - - - d - standby e2h or 96h - - - - d - standby-immediate e0h or 94h - - - - d - translate-sector 87h -yyyy y write-buffer e8h - - - - d - write-dma cah or cbh -yyyy y write-multiple c5h -yyyy y write-multiple-without-erase cdh - yyyy y write-sector(s) 30h or 31h -yyyy y write-sector(s)-without-erase 38h - yyyy y write-verify 3ch -yyyy y t0-0.1 1355 1.fr - features register 2.sc - sector count register 3.sn - sector number register 4.cy - cylinder registers 5.dh - drive/head register table 7: nand controller command set (continued) (2 of 2) command code fr 1 sc 2 sn 3 cy 4 dh 5 lba 6
20 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 identify-drive - ech the identify-drive command enables the host to receive parameter info rmation from the nand controller. this command has the same protocol as the read-sector(s) command. the parameter words in the buffer have the arrangement and meanings defined in table 8. all reserved bits or words are zero. table 8 gives the definition for each field in the identify-drive information. 6.lba - logical block address mode suppor ted (see command descriptions for use) 7.y - the register contains a valid parameter for this command. 8.for the drive/head register:y means both the nand controller and head parameters are used; d means only the nand controller parameter is valid and not the head parameter. bit -> 76543210 command (7) ech c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x table 8: identify-drive information (1 of 2) word address default value 1 total bytes data field type information 0 044ah 2 general configuration bit 1 bbbbh 2 2 default number of cylinders 2 0000h 2 reserved 3 bbbbh 2 2 default number of heads 4 0000h 2 reserved 5 xxxxh 2 vendor unique 6 bbbbh 2 2 default number of sectors per track 7-8 bbbbh 3 4 number of sectors per device (word 7 = msw, word 8 = lsw) 9 xxxxh 2 vendor unique 10-14 eeeeh 4 10 user-programmable serial number in ascii 15-19 ddddh 5 10 greenliant preset, unique id in ascii 20 0002h 2 buffer type 21 xxxxh 2 vendor unique 22 xxxxh 2 vendor unique 23-26 aaaah 6 8 firmware revision in ascii. big endian byte order in word 27-46 cccch 7 40 user definable model number 47 8001h 2 maximum number of sectors on read/write-multiple command 48 0000h 2 reserved 49 0b00h 2 capabilities 50 0000h 2 reserved 51 0200h 2 pio data transfer cycle timing mode 52 0000h 2 reserved 53 0007h 2 translation parameters are valid 54 nnnnh 2 current numbers of cylinders 55 nnnnh 2 current numbers of heads
data sheet nand controller gls55vd020 21 ?2010 greenliant systems, ltd. s71355-04-000 05/10 word 0: general configuration this field informs the host that this is a non-magnetic, hard sectored, removable storage device with a transfer rate greater than 10 mbyte/sec and is not mfm encoded. word 1: default nu mber of cylinders this field contains the number of translated cylinders in the default translation mode. this value will be the same as the number of cylinders. word 3: default number of heads this field contains the number of tr anslated heads in the default translation mode. 56 nnnnh 2 current sectors per track 57-58 nnnnh 4 current capacity in sectors (lbas) (word 57 = lsw, word 58 = msw) 59 010x 2 multiple sector setting 60-61 nnnnh 4 total number of sectors addressable in lba mode 62 0000h 2 reserved 63 0x07h 2 dma data transfer is supported in nand controller 64 0003h 2 advanced pio transfer mode supported 65 0078h 2 120 ns cycle time support for multi-word dma mode-2 66 0078h 2 120 ns cycle time support for multi-word dma mode-2 67 0078h 2 pio mode-4 supported 68 0078h 2 pio mode-4 supported 69-79 0000h 22 reserved 80 007eh 2 ata/atapi major version number 81 0019h 2 ata/atapi minor version number 82 706bh 2 features/command sets supported 83 400ch 2 features/command sets supported 84 4000h 2 features/command sets supported 85-87 xxxxh 6 features/command sets enabled 88 xx1fh 2 udma modes 89 xxxxh 2 time required for securi ty erase unit completion 90 xxxxh 2 time required fo r enhanced security erase unit completion 91-127 0000h 74 reserved 128 xxxxh 2 security status 129-159 0000h 62 vendor unique bytes 160-162 0000h 6 reserved 163 xx2h 2 cf advanced true ide timing mode capabilities and settings 164-255 0000h 184 reserved t0-0.4 1355 1. xxxx = this field is subject to change by the host or the device. 2. bbbb - default value set by controller. t he selections could be user programmable. 3. n - calculated data based on product configuration 4. eeee - the default value is ?0000000000? 5. dddd - unique number of each device 6. aaaa - any unique greenliant firmware revision 7. cccc - default value is ?xxxmb nand? or ?xxxgb nand? where xxx is the flash drive capacity. the user has an option to change the model number during manufacturing. table 8: identify-drive information (continued) (2 of 2) word address default value 1 total bytes data field type information
22 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 word 6: default number of sectors per track this field contains the number of sectors per track in the default translation mode. word 7-8: number of sectors this field contains the number of sect ors per nand controller. this double word value is also the first invalid addres s in lba translation mode. this field is only required by cf feature set support. word 10-19: serial number the contents of this field are right justif ied and padded with spaces (20h). the right- most ten bytes are a greenliant preset, unique id. the left-most ten bytes are a user-programmable value with a default value of spaces. word 20: buffer type this field defines th e buffer capability: 0002h: a dual ported multi-sector bu ffer capable of simultaneous data transfers to or from the host and the nand controller. word 23-26: firmware revision this field contains the revision of the firmware for this product. word 27-46: model number this field is reserved for the model number for this product. word 47: read-/write-multiple sector count this field contains the maximum number of sectors that can be read or written per interrupt using the read-multiple or write-multiple commands. only a value of ?1? is supported. word 49: capabilities bitfunction 13 standby timer 0: forces sleep mode when host is inactive. 11 iordy support 1: nand controller supports pio mode-4. 9 lba support 1: nand controller supports lba mode addressing. 8 dma support 1: dma mode is supported. word 51: pio data transfer cycle timing mode this field defines the mode for pio data transfer. nand controller supports up to pio mode-4. word 53: translation parameters valid bitfunction 0 1: words 54-58 are valid and reflect the cu rrent number of cylinders, heads and sectors. 1 1: words 64-70 are valid to support pio mode-3 and 4. 2 1: words 88 are valid to support ultra dma data transfer. word 54-56: current number of cylinders, heads, sectors/track these fields contains the current number of user addressable cylinders, heads, and sect ors/track in the current translation mode. word 57-58: cu rrent capacity this field contains the pr oduct of the current cylinders times heads times sectors. word 59: multiple sector setting this field contains a validity flag in the od d byte and the current number of sectors that can be transferred per interrupt for read/write multiple in the even byte. the odd byte is always 01h which indicates that the even byte is always valid.
data sheet nand controller gls55vd020 23 ?2010 greenliant systems, ltd. s71355-04-000 05/10 the even byte value depends on the value set by the se t multiple command. the even byte of this word by default contains a 00h which indicates that read/write mu ltiple commands are not valid. word 60-61: total sectors addressable in lba mode this field contains the number of sectors addressable for the nand controller in lba mode only. word 63: multi-word dma transfer mode this field identifies the multi-word dma transfer modes supported by the nand controller and indicates the mode that is curr ently selected. only one dm a mode can be selected at any given time. bit function 15-11 reserved 10 multi-word dma mode 2 selected 1: multi-word dma mode 2 is selected and bits 8 and 9 are cleared to 0 0: multi-word dma mode 2 is not selected. 9 multi-word dma mode 1 selected 1: multi-word dma mode 1 is selected and 8 and 10 should be cleared to 0. 0: multi-word dma mode 1 is not selected. 8 multi-word dma mode 0 selected 1: multi-word dma mode 0 is selected and bits 9 and 10 are cleared to 0. 0: multi-word dma mode 0 is not selected. 7-3 reserved 2 multi-word dma mode 2 supported 1: multi-word dma mode 2 and below are supported and bits 0 and 1 are set to 1. 1 multi-word dma mode 1 supported 1: multi-word dma mode 1 and below are supported. 0 multi-word dma mode 0 supported 1: multi-word dma mode 0 is supported. word 64: advanced pio data transfer mode bits (7:0) is defined as the pio data and register transfer supported field. if this field is suppor ted, bit 1 of word 53 shall be set to one. this field is bit signific ant. any number of bits may be set to one in this field by the device to indi cate the pio modes the device is capable of supporting. of these bits, bits (7:2) are reserved for future pio modes. bit function 0 1: nand controller supports pio mode-3. 1 1: nand controller supports pio mode-4. word 65: minimum multi-word dm a transfer cycle time per word this field defines the minimum multi-word dma transfer cycle time per word. this field defines, in nanoseconds, the minimum cycle time that the nand controller supports when performi ng multi-word dma transfers on a per word basis. greenliant?s nand controller supports up to multi-word dma mode-2, so this field is set to 120ns. word 66: device recommende d multi-word dma cycle time this field defines the nand controller recommended multi-word dma transfer cycle time. this field defines, in nanoseconds , the minimum cycle time per word during a single sector host transfer while pe rforming a multiple sector read dma or write dma command for any location on the media under nominal condi tions. if a host runs at a faster cycle rate by operating at a cycle time of less t han this value, the nand controller may negate dmarq for flow control. the rate at which dmarq is negated could result in reduced throughput despite the faster cycle rate. transfer at
24 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 this rate does not ensure that flow control will not be used, but implies that higher performance may result. greenliant?s nand controller supports up to multi-wo rd dma mode-2, so this field is set to 120 ns. word 67: minimum pio transfer cycle time without flow control this field defines, in nanoseconds, the minimum cycle time that, if used by the host, the device guarantees data integrity during the transfer without utilization of iordy flow cont rol. if this field is s upported, bit 1 of word 53 shall be set to one.the nand controller?s minimum cycle time is 1 20 ns. a value of 0078h is reported. word 68: minimum pio transfer cycle time with iordy this field defines, in na noseconds, the minimum cycle time that the devi ce supports while performi ng data transfers while utilizing iord y flow control. if this field is supported, bit 1 of word 53 shall be set to one. the nand controller?s minimum cycle time is 120 ns, e.g., pio mode-4. a value of 0078h is reported. word 80: major version number if not 0000h or ffffh, the dev ice claims compliance with the major version(s) as indicated by bits (6:1) being set to one. since ata standards maintain do wnward compatibility, a device may set more than one bit. gls55vd020 supports ata-1 to ata-6. word 81: minor version number if an implementer claims that the revision of the standard they used to guide their implementation does not need to be reported or if the implementation was based upon a standard prior to the ata-3 standard, word 81 should be 0000h or ffffh. a value of 0019h reported in word 81 indica tes ata/atapi-6 t13 1410d revision 3a guided the implementation. words 82-84: features/command sets supported words 82, 83, and 84 indicate the features and command sets supported. a value of 706bh is reported. word 82 bit function 15 0: obsolete 14 1: nop command is supported 13 1: read buffer command is supported 12 1: write buffer command is supported 11 0: obsolete 10 0: host protected area feature set is not supported 9 0: device reset command is not supported 8 0: service interrupt is not supported 7 0: release interrupt is not supported 6 1: look-ahead is supported 5 1: write cache is supported 4 0: packet command feature set is not supported 3 1: power management feature set is supported 2 0: removable media feat ure set is not supported 1 1: security mode feature set is supported 0 1: smart feature set is supported word 83 the values in this word should not be depended on by host implementers.
data sheet nand controller gls55vd020 25 ?2010 greenliant systems, ltd. s71355-04-000 05/10 bit function 15 0: provides indication th at the features/command sets supported words are not valid 14 1: provides indication that the feat ures/command sets supported words are valid 13-9 0: reserved 8 0: set-max security extension is not supported 7-5 0: reserved 4 0: removable media status feature set is not supported 3 1: advanced power management feature set is supported 2 1: cfa feature set is supported 1 0: read dma queued and write dma queued commands are not supported 0 0: download microcode command is not supported word 84 the values in this word should not be depended on by host implementers. bit function 15 0: provides indication that the feat ures/command sets supported words are valid 14 1: provides indication that the feat ures/command sets supported words are valid 13-0 0: reserved words 85-87: features/command sets enabled words 85, 86, and 87 indicate features/command sets enabled. the host can enable/disable the feat ures or command set only if they are supported in words 82-84. word 85 bit function 15 0: obsolete 14 0: nop command is not enabled 1: nop command is enabled 13 0: read buffer command is not enabled 1: read buffer command is enabled 12 0:write buffer command is not enabled 1: write buffer command is enabled 11 0: obsolete 10 1: host protected area feature set is enabled 9 0: device reset command is not enabled 8 0: service interrupt is not enabled 7 0: release interrupt is not enabled 6 0: look-ahead is not enabled 1: look-ahead is enabled 5 0: write cache is not enabled 1: write cache is enabled 4 0: packet command feature set is not enabled 3 0: power management feature set is not enabled 1: power management feature set is enabled 2 0: removable media feat ure set is not enabled
26 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 1 0: security mode feature set has not been ena bled via the security set password command 1: security mode feature set has been enabl ed via the security set password command 0 0: smart feature set is not enabled word 86 bit function 15-9 0: reserved 8 1: set-max security extension supported 7-5 0: reserved 4 0: removable media status feature set is not enabled 3 0: advanced power management feature set is not enabled 2 0: cfa feature set is disabled 1 0: read dma queued and write dma queued commands are not enabled 0 0: download microcode command is not enabled word 87 the values in this word should not be depended on by host implementers. bit function 15 0: provides indication that the feat ures/command sets supported words are valid 14 1: provides indication that the feat ures/command sets supported words are valid 13-0 0: reserved word 88 bit function 15-13 reserved 12 1: ultra dma mode 4 is selected 0: ultra dma mode 4 is not selected 11 1: ultra dma mode 3 is selected 0: ultra dma mode 3 is not selected 10 1: ultra dma mode 2 is selected 0: ultra dma mode 2 is not selected 9 1: ultra dma mode 1 is selected 0: ultra dma mode 1 is not selected 8 1: ultra dma mode 0 is selected 0: ultra dma mode 0 is not selected 7-5 reserved 4 1: ultra dma mode 4 and below are supported 3 1: ultra dma mode 3 and below are supported 2 1: ultra dma mode 2 and below are supported 1 1: ultra dma mode 1 and below are supported 0 1: ultra dma mode 0 is supported
data sheet nand controller gls55vd020 27 ?2010 greenliant systems, ltd. s71355-04-000 05/10 word 89: time required for se curity erase unit completion word 89 specifies the time required for the security erase unit command to complete. word 90: time required for enhanced security erase unit completion word 90 specifies the time required for the enhanced security erase unit command to complete. word 128: security status bitfunction 8 security level 1: security mode is enabled and the security level is maximum 0: and security mode is enabled, indi cates that the security level is high 5 enhanced security erase unit feature supported 1: enhanced security erase unit feature set is supported 4expire 1: security count has expired and security unlock and security erase unit are command aborted until a power-on reset or hard reset 3 freeze 1: security is frozen 2lock 1: security is locked 1 enable/disable 1: security is enabled 0: security is disabled 0 capability 1: nand controller supports security mode feature set 0: nand controller does not s upport security mode feature set word 163: cf advanced true ide timing mode capabilities and settings this word describes the capabilities and current settings for cf modes utilizing the true ide interface. four separate fields determine support and selection options in the advanced pi o and advanced multiword dma timing modes. for information on the older modes, see ?word 63: multi-word dma transfer mode? on page 23. and ?word 64: advanced pio data transfer mode? on page 23.. when the identity drive command executes, the device returns 0492h. bit function value time 0 value not specified 1-254 (value * 2) minutes 255 >508 minutes value time 0 value not specified 1-254 (value * 2) minutes 255 >508 minutes
28 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 2-0 advanced true ide pio mode support indicates the maximum true ide pio mode supported by the card 5-3 advanced true ide multiword dma mode support indicates the maximum true ide mult iword dma mode supported by the card value time 0 specified in word 64 1 pio mode 5 2 pio mode 6 3-7 reserved value time 0 specified in word 63 1 multiword dma mode 3 2 multiword dma mode 4 3-7 reserved
data sheet nand controller gls55vd020 29 ?2010 greenliant systems, ltd. s71355-04-000 05/10 8-6 advanced true ide pio mode selected indicates the current true id e pio mode selected on the card 11-9 advanced true ide multiword dma mode selected indicates the current true ide multiword dma mode selected on the card 15-12 reserved set-features - efh this command is used by the host to establish or select certain features. table 9 defines all features that are supported. value time 0 specified in word 64 1 pio mode 5 2 pio mode 6 3-7 reserved value time 0 specified in word 63 1 multiword dma mode 3 2 multiword dma mode 4 3-7 reserved bit -> 76543210 command (7) efh c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) config feature (1) feature table 9: features supported feature operation 01h enable 8-bit data transfers. 02h enable write cache 03h set transfer mode based on value in sector count register. table 10 defines the values. 09h enable extended power operations 55h disable read look ahead. 66h disable power-on reset (por) establishment of defaults at software reset. 69h nop - accepted for backward compatibility. 81h disable 8-bit data transfer. 82h disable write cache 89h disable extended power operations 96h nop - accepted for backward compatibility. 97h accepted for backward compatibility. use of this feature is not recommended.
30 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 features 01h and 81h are used to enable and clear 8-bi t data transfer mode. if the 01h feature command is issued all data transfers will occur on the low order d 7 -d 0 data bus and the iocs16# signa l will not be asserted for data register accesses. features 02h and 82h allow the host to enable or disable write cache in the nand controllers that implement write cache. when the subcommand disable-write-cache is issued, the nand contro ller should initiate the sequence to flush cache to non-volat ile memory before command completion. feature 03h allows the host to select the transfer mode by specifying a value in the sector count register. the upper 5 bits define the type of transfer and the low orde r 3 bits encode the mode val ue. one pio mode is selected at all times. the host may change the selected modes by the set-features command. feature 55h is the default feature for the nand controller. therefore, the host does not have to issue set-fea- tures command with this feature unless it is necessary for compatibility reasons. features 66h and cch can be used to enable and disable whether the power- on reset (por) defaults will be set when a software reset occurs. aah enable read-look-ahead cch enable power-on reset (por) establishment of defaults at software reset. t0-0.0 1355 table 9: features supported feature operation
data sheet nand controller gls55vd020 31 ?2010 greenliant systems, ltd. s71355-04-000 05/10 idle - 97h or e3h this command causes the nand controller to set bsy, enter the idle mode, clear bsy and generate an interrupt. if the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic power- down mode is enabled. if the sect or count is zero, the automatic power-down mode is also enabled, the timer count is set to 3, with each count being 5 ms. note that this time base (5 msec) is different from the ata specification. set-sleep-mode - 99h or e6h this command caus es the nand controller to set bsy, enter the sleep mode, cl ear bsy and generate an interrupt. recovery from sleep mode is accomplished by simply issuing another command (a reset is permitted but not required). sleep mode is also ente red when internal timers expire so the host does not need to issue this command except when it wishes to enter sleep mode immediately. the default value for the timer is 15 milliseconds. set-wp#/pd#-mode - 8bh table 10: transfer mode values mode bits [7:3] bits [2:0] pio default mode 00000b 000b pio default mode, disable iordy 00000b 001b pio flow control transfer mode 00001b mode 1 multi-word dma mode 00100b mode 1 ultra-dma mode 01000b mode 1 reserved other n/a t0-0.1 1355 1. mode = transfer mode number, all other values are not valid bit ->76543210 command (7) 97h or e3h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) timer count (5 msec increments) feature (1) x bit ->76543210 command (7) 99h or e6h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit -> 76543210 command (7) 8bh
32 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 this command configures the wp#/pd# pin for ei ther the write protect mode or the power-down mode. when the host sends this command to the devi ce with the value aah in the feature register, the wp#/pd# pin is configured for the write protect mode described in section . the write protect mode is the factory default setting. when the host sends this command to the device with the value 55h in the feature register, wp#/pd# is configured for the power-down mode. all values in the c/d/h register, the cylinder lo w register, the cylinder high register, the sector number register, the sector count register, and the feature register need to match the values shown above, otherwise, the command will be treated as an invalid command. once the mode is set with this co mmand, the device will stay in the configured mode until the next time this command is issued. power-off or re set will not change th e configured mode. error posting the following table summarizes the valid status and error values for the nand controller command set. c/d/h (6) xdrive x cyl high (5) 6eh cyl low (4) 44h sec num (3) 72h sec cnt (2) 50h feature (1) 55h or aah bit -> 76543210 table 11: error and status register 1 (1 of 2) command error register status register bbk unc idnf abrt amnf rdy dwf dsc corr err check-power-mode v v v v v execute-drive-diagnostic v v v erase-sector(s) v vvvvvv v flush-cache v v v v v format-track vvvvvv v identify-drive v v v v v idle v vvv v idle-immediate v v v v v initialize-drive-parameters v v v nop v v v v read-buffer v v v v v read-dma vvvvvvvvvv read-multiple vvvvvvvvvv read-sector(s) vvvvvvvvvv read-verify-sector(s) vvvvvvvvvv recalibrate v v v v v request-sense vvvv security-disable-password v v v v v
data sheet nand controller gls55vd020 33 ?2010 greenliant systems, ltd. s71355-04-000 05/10 security-erase-prepare v v v v v security-erase-unit v v v v v security-freeze-lock v v v v v security-set-password v v v v v security-unlock v v v v v seek vv vvv v set-features v v v v v set-multiple-mode v v v v v set-sleep-mode v v v v v set-wp#/pd#-mode vvvv smart vv vvv v standby v v v v v standby-immediate v v v v v translate-sector v vvvvvv v write-buffer v v v v v write-dma v vvvvvv v write-multiple v vvvvvv v write-multiple-without-erase v vvvvvv v write-sector(s) v vvvvvv v write-sector(s)-without-erase v vvvvvv v write-verify v vvvvvv v invalid-command-code v v v v v t0-0.3 1355 1.the host is required to reissue any media access command (such as read-sector and write sector) that ends with an error condi tion. table 11: error and status register 1 (continued) (2 of 2) command error register status register bbk unc idnf abrt amnf rdy dwf dsc corr err
34 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 electrical specifications absolute maximum stress ratings (applied conditions greater than t hose listed under ?absolute maximum stress ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these conditions or conditions greater th an those defined in the operational sections of this data sheet is not implied. exposure to absolute maximum stress ra ting conditions may affe ct device reliability.) temperature under bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55c to +125c storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65c to +150c d.c. voltage on pins 1 i3, i4, o4, and o5 to ground potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to v dd +0.5v 1. please refer to table 1 for pin assignment information. transient voltage (<20 ns) on pins 1 i3, i4, o4, and o5 to ground potential . . . . . . . . . . . . . . . . . -2.0v to v dd +2.0v d.c. voltage on pins 1 i1, i2, o1, o2, and o6 to ground potential . . . . . . . . . . . . . . . . . . . . . . . -0.5v to v ddq +0.5v transient voltage (<20 ns) on pins 1 i1, i2, o1, o2, and o6 to ground potential . . . . . . . . . . . . -2.0v to v ddq +2.0v package power dissipa tion capability (t a = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0w through hole lead soldering temperature (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300c surface mount solder reflow temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260c for 10 seconds output short circuit current 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ma 2. outputs shorted for no more than one second. no more than one output shorted at a time. table 12: absolute maximum power pin stress ratings parameter symbol conditions input power v ddq v dd -0.3v min to 6.5v max -0.3v min to 4.0v max voltage on any flash media interface pin with respect to v ss -0.5v min to v dd + 0.5v max voltage on all other pins with respect to v ss -0.5v min to v ddq + 0.5v max t0-0.0 1355 o perating r ange range ambient temperature v ddq v dd 5v 3v 3.3v minmaxminmaxminmax commercial 0c to +70c 2.7v 3.465v 3.135v 3.465v 4.5v 5.5v industrial -40c to +85c 2.7 v 3.465v 3.135v 3.465v 4.5v 5.5v ac c onditions of t est input rise/fall time . . . . . . . . . . . . . . 10 ns output load media. . . . . . . . . . . . . . . . c l = 100 pf for 3.3v / 80 pf for 3v output load host . . . . . . . . . . . . . . . . . c l = 100 pf for 3.3v and 5.0v / 80 pf for 3v see figure 5 note: all ac specifications are guaranteed by design.
data sheet nand controller gls55vd020 35 ?2010 greenliant systems, ltd. s71355-04-000 05/10 dc characteristics table 13: recommended system power-on timing symbol parameter typical maximum units t pu-initial drive initialization to ready 3 sec + (0.5 sec/ gbyte) 100 sec t pu-ready1 1 host power-on/reset to ready operation 200 1000 ms t pu-write1 1 host power-on/reset to write operation 200 1000 ms t0-0.3 1355 1. this parameter is measured only for in itial qualification and after a design or proc ess change that could affect this paramet er. table 14: capacitance (ta = 25c, f=1 mhz, other pins open) parameter description test condition maximum c i/o 1 i/o pin capacitance v i/o = 0v 10 pf c in 1 input capacitance v in = 0v 10 pf t0-0.0 1355 1. this parameter is measured only for in itial qualification and after a design or proc ess change that could affect this paramet er. table 15: reliability characteristics symbol parameter minimum sp ecification units test method i lth 1 1. this parameter is measured only for in itial qualification and after a design or proc ess change that could affect this paramet er. latch up 100 + i dd ma jedec standard 78 t0-0.0 1355 table 16: dc characteristics for media interface v dd = 3.3v symbol type parameter min max units conditions v ih3 i3 input voltage 2.0 v v dd =v dd max v il3 0.8 v dd =v dd min i il3 i3z input leakage current -10 10 ua v in = gnd to v dd , v dd = v dd max i u3 i3u input pull-up current -160 -10 ua v in = gnd, v dd = v dd max v t+4 i4 input voltage schmitt trigger 2.0 v v dd = v dd max v t-4 0.8 v dd = v dd min i il4 i4z input leakage current -10 10 ua v in = gnd to v dd , v dd = v dd max v oh4 o4 output voltage 2.4 v i oh4 =i oh4 min v ol4 0.4 i ol4 =i ol4 max i oh4 output current -2 ma v dd =v dd min i ol4 output current 2 ma v dd =v dd min v oh5 o5 output voltage 2.4 v i oh5 =i oh5 min v ol5 0.4 i ol5 =i ol5 max i oh5 output current -4 ma v dd =v dd min i ol5 output current 4 ma v dd =v dd min t0-0.0 1355
36 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 table 17: dc characteristics for media interface v dd = 3.0v symbol type parameter min max units conditions v ih3 i3 input voltage 2.0 v v dd =v dd max v il3 0.8 v dd =v dd min i il3 i3z input leakage current -10 10 ua v in = gnd to v dd , v dd = v dd max i u3 i3u input pull-up current -160 -10 ua v in = gnd, v dd = v dd max v t+4 i4 input voltage schmitt trigger 2.0 v v dd = v dd max v t-4 0.8 v dd = v dd min i il4 i4z input leakage current -10 10 ua v in = gnd to v dd , v dd = v dd max v oh4 o4 output voltage 2.2 v i oh4 =i oh4 min v ol4 0.4 i ol4 =i ol4 max i oh4 output current -1.2 ma v dd =v dd min i ol4 output current 1.2 ma v dd =v dd min v oh5 o5 output voltage 2.2 v i oh5 =i oh5 min v ol5 0.4 i ol5 =i ol5 max i oh5 output current -2 ma v dd =v dd min i ol5 output current 2 ma v dd =v dd min t0-0.0 1355
data sheet nand controller gls55vd020 37 ?2010 greenliant systems, ltd. s71355-04-000 05/10 table 18: dc characteristics for host interface v ddq = 3.3v or v ddq = 5v symbol type parameter min max units conditions v ih1 i1 input voltage 2.0 v v ddq =v ddq max v il1 0.8 v ddq =v ddq min i il1 i1z input leakage current -10 10 ua v in = gnd to v ddq , v ddq = v ddq max i u1 i1u input pull-up current -150 -6 ua v out = gnd, v ddq = v ddq max v t+2 i2 input voltage schmitt trigger 2.0 v v ddq =v ddq max v t-2 0.8 v ddq =v ddq min i il2 i2z input leakage current -10 10 ua v in = gnd to v ddq , v ddq = v ddq max i u2 i2u input pull-up current -150 -6 ua v out = gnd, v ddq = v ddq max v oh1 o1 output voltage 2.4 v i oh1 =i oh1 min v ol1 0.4 i ol1 =i ol1 max i oh1 output current -4 ma v ddq =v ddq min i ol1 output current 4 ma v ddq =v ddq min v oh2 o2 output voltage 2.4 v i oh2 =i oh2 min v ol2 0.4 i ol2 =i ol2 max i oh2 output current -8 ma v ddq =2.7v i ol2 output current 8 ma v ddq min v oh6 o6 output voltage for dasp# pin 2.4 v i oh6 =i oh6 min v ol6 0.4 i ol6 =i ol6 max i oh6 output current for dasp# pin -4 ma v ddq =2.7-3.465v i ol6 output current for dasp# pin 12 ma v ddq =2.7-3.465v i oh6 output current for dasp# pin -4 ma v ddq =4.5v-5.5v i ol6 output current for dasp# pin 12 ma v ddq =4.5v-5.5v t0-0.1 1355
38 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 table 19: dc characteristics for host interface v ddq = 3.0v symbol type parameter min max units conditions v ih1 i1 input voltage 2.0 v v ddq =v ddq max v il1 0.8 v ddq =v ddq min i il1 i1z input leakage current -10 10 ua v in = gnd to v ddq , v ddq = v ddq max i u1 i1u input pull-up current -150 -6 ua v out = gnd, v ddq = v ddq max v t+2 i2 input voltage schmitt trigger 2.0 v v ddq =v ddq max v t-2 0.8 v ddq =v ddq min i il2 i2z input leakage current -10 10 ua v in = gnd to v ddq , v ddq = v ddq max i u2 i2u input pull-up current -150 -6 ua v out = gnd, v ddq = v ddq max v oh1 o1 output voltage 2.2 v i oh1 =i oh1 min v ol1 0.4 i ol1 =i ol1 max i oh1 output current -2 ma v ddq =v ddq min i ol1 output current 2 ma v ddq =v ddq min v oh2 o2 output voltage 2.2 v i oh2 =i oh2 min v ol2 0.4 i ol2 =i ol2 max i oh2 output current 3 ma v ddq min i ol2 output current 3 ma v ddq min v oh6 o6 output voltage for dasp# pin 2.2 v i oh6 =i oh6 min v ol6 0.4 i ol6 =i ol6 max i oh6 output current for dasp# pin -2 ma v ddq min i ol6 output current for dasp# pin 8 ma v ddq max t0-0.1 1355 table 20: power consumption symbol type parameter min max units conditions i dd 1,2 1. sequential data transfer for 1 sector read data from host interface and write data to media. 2. this parameter is measured only for in itial qualification and after a design or proc ess change that could affect this paramet er. pwr power supply current (t a = 0c to +70c) 50 ma v dd =v dd max; v ddq =v ddq max i dd 1,2 pwr power supply current (t a = -40c to +85c) 100 ma v dd =v dd max; v ddq =v ddq max i sp pwr sleep/standby/idle current (t a = 0c to +70c) 700 a v dd =v dd max; v ddq =v ddq max i sp pwr sleep/standby/idle current (t a = -40c to +85c) 950 a v dd =v dd max; v ddq =v ddq max t0-0.1 1355
data sheet nand controller gls55vd020 39 ?2010 greenliant systems, ltd. s71355-04-000 05/10 ac characteristics figure 5: ac input/output reference waveforms media side interface timing specifications note: all ac specifications are guaranteed by design. 1355 f02.0 reference points output input v it v iht v ilt v ot ac test inputs are driven at v iht (0.9 v dd ) for a logic ?1? and v ilt (0.1 v dd ) for a logic ?0?. measurement reference points for inputs and outputs are v it (0.5 v dd ) and v ot (0.5 v dd ). input rise and fall times (10% ? 90%) are <10 ns. note: v it - v input te s t v ot - v output te s t v iht - v input high test v ilt - v input low test table 21: gls55vd020 timing specifications symbol parameter min max units t cls fcle setup time 15 - ns t clh fcle hold time 15 - ns t cs fce# setup time 30 - ns t ch fce# hold time for command/data write cycle 15 - ns t chr fce# hold time for sequential read last cycle - 40 ns t wp fwe# pulse width 15 - ns t wh fwe# high hold time 15 - ns t wc write cycle time 30 - ns t als fale setup time 15 - ns t alh fale hold time 15 - ns t ds fad[15:0] setup time 30 - ns t dh fad[15:0] hold time 15 - ns t rp fre# pulse width 15 - ns t rr ready to fre# low 20 - ns t res fre# data setup time - 20 ns t rc read cycle time 30 - ns t reh fre# high hold time 15 - ns t rhz fre# high to data hi-z - 100 ns t0-0.0 1355
40 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 figure 6: media command latch cycle figure 7: media address latch cycle fcle fce# fwe# fale f ad[15:0] or fad[7:0] command t ds t dh t alh t wp t clh t cls t cs t ch 1355 f09 .1 t als fce# fwe# fale fad[15:0] or fad[7:0] t cs t wc 1355 f10.0 a byte0 a byte1 a byte2 t ds t ds t dh t dh t dh t dh t dh t ds t ds t ds t als t alh t wp t wh t wh t wc fcle t wp t wp t wp t wh t wh t wc t wc a byte3 a byte4
data sheet nand controller gls55vd020 41 ?2010 greenliant systems, ltd. s71355-04-000 05/10 figure 8: media data loading latch cycle figure 9: media data read cycle fcle fce# fale fwe# f ad[15:0] or fad[7:0] 1355 f11.0 t ds t dh t wp t wp t wp t wh t ds t ds t dh t dh t wc d in 0d in 1d in final t ch 1355 f12.0 frbybsy# fce# fre# fad[15:0] or fad[7:0] d out 0 d out final d out 1 t rr t res t reh t res t rp t res t rhz t rhz t chr t rc
42 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 product ordering information valid combinations valid combinations for gls55vd020 gls55vd020-60-c-tqwe gls55vd020-60-i-tqwe note: valid combinations are those products in mass production or will be in mass production. consult your greenliant sales representative to confirm availability of valid combinat ions and to determine availability of new combinations. gls 55 vd 020 - 60 - c -tqw e xx xx xxx -xx -x -xxx x environmental attribute e * = non-pb package modifier w = 100 leads or 85 ball positions package type tq = tqfp mv = vfbga operation temperature c = commercial: 0c to +70c i = industrial: -40c to +85c frequency 60= 60 mhz device number 020 = udma/ata controller function d = disk/media controller voltage v = 2.7-3.465v product series nand controller * environmental suffix ?e? denotes non-pb solder. greenliant non-pb solder devices are ?rohs compliant?.
data sheet nand controller gls55vd020 43 ?2010 greenliant systems, ltd. s71355-04-000 05/10 packaging diagram figure 10: 100-lead thin quad flat pack (tqfp) greenliant package code: tqw .45 .75 1.00 nominal 0- 7 .95 1.05 .05 .15 detail note: 1. complies with jedec publication 95 ms-026 variant aed dimensions although some dimensions may be more stringent. 2. all linear dimensions are in millimeters (min/max). 3. coplanarity: 0.1 mm. 4. package body dimensions do not include mold flash. maximum allowable mold flash is 0.25 mm. top view 100-tqfp-tqw-0 0.17 0.27 0.50 bsc pin #1 identifier 14.00 bsc 16.00 bsc 14.00 bsc 16.00 bsc .09 .20 1.10 0.10 1mm
44 data sheet nand controller gls55vd020 ?2010 greenliant systems, ltd. s71355-04-000 05/10 figure 11: 85-ball very-thin, fine-pitch, ball grid array (vfbga) greenliant package code: mvw k j h g f e d c b a a b c d e f g h j k 10 9 8 7 6 5 4 3 2 1 10 9 8 7 6 5 4 3 2 1 0.50 0.50 bottom view 0.32 0.05 (85x) a1 indicator 4.50 4.50 a1 corner top view 85-vfbga-mvw-6x6-32mic-0.0 note: 1. although many dimensions are similar to those of jedec publication 95, mo-225, this specific package is not registere d 2. all linear dimensions are in millimeters 3. coplanarity: 0.075 mm 4. ball opening size is 0.29 mm ( 0.05 mm) 1mm detail side view seating plane 0.20 0.06 0.86 0.10 0.075 6.00 0.08 6.00 0.08
data sheet nand controller gls55vd020 45 ?2010 greenliant systems, ltd. s71355-04-000 05/10 table 22: revision history number description date 00 ? initial release of data sheet sep 2007 01 ? updated ?features:? and ?product description? ? modified ?general description? on page 3. ? updated table 2 on page 11 ? modified ?manufacturing support? and ?security features?on page 12 ? removed drive address from tables 5 and 6 ? updated ?nand controller command description? including tables 7 and 8, and removing the entry for word 21. ? added ?word 163: cf advanced true ide timing mo de capabilities and settings? ? updated figure 6 ? updated table 16 feb 2008 02 ? globally changed product name from ata flash disk to nand controller may 2009 03 ? eol of sst55vd020-60-i-mvwe. see s71355(02) jul 2009 04 ? transferred from sst to greenliant may 2010 ? 2010 greenliant systems, ltd. all rights reserved. greenliant, the gre enliant logo and nandrive ar e trademarks of greenliant systems, ltd. all trademarks and registered trademarks are the property of their respective owners. these specifications are su b- ject to change without notice. superflash is a registered trademark of silicon storag e technology, inc, a wholly owned subsidia ry of microchip technology inc.

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