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general description the MAX1960/max1961/max1962 high-current, high- efficiency voltage-mode step-down dc-dc controllers operate from a 2.35v to 5.5v input and generate output voltages down to 0.8v at up to 20a. an on-chip charge pump generates a regulated 5v for mosfet drive. additionally, adaptive dead-time drivers allow a wide variety of mosfets to be used without risking shoot-through. fixed-frequency pwm operation and external synchro- nization make these controllers suitable for telecom and datacom applications. the operating frequency is programmable to either 500khz or 1mhz, or from 450khz to 1.2mhz with an external clock. a clock output is provided to synchronize another converter for 180 out-of-phase operation. a high closed-loop bandwidth provides excellent transient response for applications with dynamic loads. lossless current sensing in the MAX1960 and max1961 is achieved by monitoring the drain-to-source voltage of the low-side external fet. the current limit is scalable to accommodate a wide variety of mosfets and load currents. the max1962 has 10% accurate sense-resistor-based current limiting. the MAX1960 and max1962 have an adjustable output voltage from 0.8v to 4.95v. the max1961 and max1962 have four preset output voltages (1.5v, 1.8v, 2.5v, and 3.3v) and feature 0.5% voltage accuracy over temperature, line, and load variations. the MAX1960 and max1961 also feature voltage-margining control inputs that shift the output voltage up or down by 4% for system testing. applications asic, fpga, dsp, and cpu core and i/o voltages cellular base stations telecom and network equipment server and storage systems features 0.5% accurate output operates from 2.35v to 5.5v supply generates low output voltage down to 0.8v on-chip charge pump provides 5v gate drive ceramic or electrolytic capacitors 94% efficiency external synchronization from 450khz to 1.2mhz 500khz/1mhz fixed-frequency pwm operation fast transient response two converters can operate 180 out-of-phase ?% voltage margining for system test 10% accurate current sensing (max1962) adaptive dead time prevents shoot-through MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ________________________________________________________________ maxim integrated products 1 ordering information 19-2740; rev 0; 1/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package MAX1960 eep -40 c to +85 c 20 qsop max1961 eep -40 c to +85 c 20 qsop max1962 eep -40 c to +85 c 20 qsop pin configurations and selector guide appear at the end of the data sheet. MAX1960 v cc ctl1 comp ref gnd fset/sync clkout av dd v dd bst dh lx dl pgnd fb c+ c- input 2.35v to 5.5v clkout 180 out-of-phase output 0.8 to 0.87 ? v in up to 20a ctl2 ilim optional synchronization voltage margining and on/off typical operating circuit
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc , ctl_, cs, fset/sync, sel, en, out to gnd ..........................................................-0.3v to +6v ilim, comp, ref, fb, clkout, c- to gnd ..............................................-0.3v to v avdd + 0.3v c+ to gnd.............-0.3v to higher of v vcc + 1v or v vdd + 0.3v v dd , av dd to gnd ..............-0.3v to higher of v vcc - 0.3v or 6v dl to pgnd ................................................-0.3v to v vdd + 0.3v bst to gnd ............................................................-0.3v to +12v dh to lx ...................................................................-0.3v to +6v lx to bst..................................................................-6v to +0.3v pgnd to gnd, or v dd to av dd ............................-0.3v to +0.3v continuous power dissipation (t a = +70 c) 20-pin qsop (derate up to +70 c)..............................727mw 20-pin qsop (derate above +70 c) ........................9.1mw/ c operating temperature range (extended).........-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +150 c lead temperature (soldering, 10s) .................................+300 c electrical characteristics (v vcc = 3.3v, circuits of figures 9 12, t a = 0 c to +85 c . typical values are at t a = +25 c, unless otherwise noted.) parameter conditions min typ max units v cc input voltage range 2.35 5.5 v v cc input voltage uvlo rising or falling, hysteresis = 33mv (typ) 1.95 2.3 v v dd input voltage uvlo rising or falling, hysteresis = 44mv (typ) 3.9 4.45 v output voltage 0.8 v MAX1960/max1962 (measured at fb) 0.796 0.800 0.804 sel = gnd 1.492 1.500 1.508 sel = ref 1.791 1.800 1.809 sel not connected 2.487 2.500 2.514 dc output accuracy max1961/ max1962 (fb = v dd ), measured at output sel = v dd 3.272 3.300 3.336 v positive voltage-margining shift MAX1960/max1961 +3.8 +4 +4.2 % negative voltage-margining shift MAX1960/max1961 -3.8 -4 -4.2 % load regulation error 0v to full load 0.08 % line regulation error v vcc = 2.7v to 5.5v 0.1 % fb input bias current -0.2 +0.2 a feedback transconductance 1 2 3 ms comp discharge resistance in shutdown 10 100 ? dc-dc soft-start time 1280 cycles fset/sync = gnd 450 500 550 switching frequency fset/sync = v cc 880 1000 1120 khz sync frequency range 450 1200 khz maximum duty cycle f = 1mhz 80 83 % maximum duty cycle f = 500khz 90 92 % quiescent supply current 11 15 ma shutdown supply current 15 a
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining _______________________________________________________________________________________ 3 electrical characteristics (continued) (v vcc = 3.3v, circuits of figures 9 12, t a = 0 c to +85 c . typical values are at t a = +25 c, unless otherwise noted.) parameter conditions min typ max units 2.7v v vcc 5.5v, i load = 1ma to 50ma 4.75 5.25 v 2.35v v vcc 2.7v, i load = 1ma to 35ma, c1 = 4.7 f, c6 = 22 f (note 1) 4.45 5.25 v v dd output voltage 2.35v v vcc 3.6v with tripler, i load = 1 to 50ma (circuit of figure 12) (note 1) 4.75 5.25 v reference voltage (no load) 1.269 1.280 1.291 v reference load regulation -50 a to +50 a3mv v out = 0.8v 44 53 62 v out = 2.0v 45 50 55 positive current-limit threshold (v pgnd - v lx ) max1962 v out = 3.3v 38 48 58 mv negative current-limit threshold (v lx - v pgnd ) max1962, v out = 0.8v to 3.3v 38 50 68 mv cs bias current max1962, v cs = 3.3v 20 50 a out bias current max1961/max1962, v out = 3.3v 30 50 a current-limit threshold (positive direction, fixed, v pgnd - v lx ) MAX1960/max1961, ilim = v dd 58 74 90 mv current-limit threshold (negative direction, fixed, v lx - v pgnd ) MAX1960/max1961, ilim = v dd 50 67 85 mv MAX1960/max1961, r ilim = 160k ? 100 114 135 current-limit threshold (positive direction, adjustable, v pgnd - v lx ) r ilim = 400k ? 250 279 306 mv MAX1960/max1961, r ilim = 160k ? 90 107 125 current-limit threshold (negative direction, adjustable, v lx - v pgnd ) r ilim = 400k ? 245 271 296 mv thermal-shutdown threshold 15 c hysteresis +160 c dh gate-driver on-resistance v bst - v lx = 5v, pulling up or down 1.8 3.5 ? dl gate-driver on-resistance (pullup) dl high state 1.8 3.5 ? dl gate-driver on-resistance (pulldown) dl low state 0.5 1.6 ? dh falling to dl rising 35 minimum adaptive dead time dh rising to dl falling 26 ns minimum high time (note 1) 200 fset/sync pulse width minimum low time (note 1) 200 ns fset/sync rise/fall time (note 1) 100 ns ctl_, fset/sync, en input high voltage v vcc = 2.35v to 5.5v 2.0 v ctl_, fset/sync, en input low voltage v vcc = 2.35v to 5.5v 0.8 v ctl_, fset/sync, en input current -1 +1 a clkout v ol sinking 1ma 0.01 0.1 v clkout v oh sourcing 1ma v vcc - 0.2v v vcc - 0.01v v clkout rise/fall time c load = 100pf (note 1) 40 ns
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 4 _______________________________________________________________________________________ electrical characteristics (v vcc = 3.3v, circuits of figures 9 12, t a = -40 c to +85 c , unless otherwise noted.) (note 2) parameter conditions min typ max units v cc input voltage range 2.35 5.50 v v cc input voltage uvlo rising or falling 1.95 2.3 v v dd input voltage uvlo rising or falling 3.90 4.45 v output voltage 0.8 v MAX1960/max1962 (measured at fb) 0.795 0.805 sel = gnd 1.492 1.508 sel = ref 1.789 1.809 sel not connected 2.482 2.517 dc output accuracy max1961/max1962 (fb = v dd ), measured at output sel = v dd 3.272 3.339 v positive voltage-margining shift MAX1960/max1961 3.8 4.2 % negative voltage-margining shift MAX1960/max1961 -3.8 -4.2 % fb input bias current -0.2 +0.2 a feedback transconductance 1 3 s comp discharge resistance in shutdown 100 ? fset/sync = gnd 450 550 switching frequency fset/sync = v cc 880 1120 khz sync frequency range 450 1200 khz maximum duty cycle f = 1mhz 80 % maximum duty cycle f = 500khz 90 % quiescent supply current 15 ma shutdown supply current 15 a 2.7v v vcc 5.5v, i load = 1ma to 50ma 4.75 5.25 2.35v v vcc 2.7v, i load = 1ma to 35ma, c1 = 4.7f, c6 = 22f 4.45 5.25 v dd output voltage 2.35v v vcc 3.6v with tripler, i load = 1ma to 50ma (circuit of figure 12) 4.75 5.25 v reference voltage (no load) 1.267 1.291 v positive current-limit threshold (v cs - v out ) max1962, v out = 2v 45 56 mv negative current-limit threshold (v out - v cs ) max1962, v out = 2v 42 64 mv cs bias current max1962, v cs = 3.3v 50 a out bias current max1961/max1962, v out = 3.3v 50 a current-limit threshold (positive direction, fixed, v pgnd - v lx ) MAX1960/max1961, ilim = v dd 58 90 mv current-limit threshold (negative direction, fixed, v lx - v pgnd ) MAX1960/max1961, ilim = v dd 50 85 mv MAX1960/max1961, r ilim = 160k ? 100 135 current-limit threshold (positive direction, adjustable, v pgnd - v lx ) r ilim = 400k ? 250 306 mv
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining _______________________________________________________________________________________ 5 electrical characteristics (continued) (v vcc = 3.3v, circuits of figures 9 12, t a = -40 c to +85 c , unless otherwise noted.) (note 2) parameter conditions min typ max units MAX1960/max1961, r ilim = 160k ? 90 125 current-limit threshold (negative direction, adjustable, v lx - v pgnd ) r ilim = 400k ? 245 296 mv dh gate-driver on-resistance v bst - v lx = 5v, pulling up or down 3.5 ? dl gate-driver on-resistance (pullup) dl high state 3.5 ? dl gate-driver on-resistance (pulldown) dl low state 1.6 ? minimum high time 200 fset/sync pulse width minimum low time 200 ns fset/sync rise/fall time 100 ns ctl_, fset/sync, en input high voltage v vcc = 2.35v to 5.5v 2.0 v ctl_, fset/sync, en input low voltage v vcc = 2.35v to 5.5v 0.8 v ctl_, fset/sync, en input current -1 +1 a clkout v ol sinking 1ma 0.1 v clkout v oh sourcing 1ma v vcc - 0.2v v clkout rise/fall time c load = 100pf 40 ns note 1: guaranteed by design. note 2: specifications at -40 c are guaranteed by design, and not production tested.
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 6 _______________________________________________________________________________________ typical operating characteristics (circuit of figure 9, t a = +25 c, unless otherwise noted.) efficiency vs. load current with 15a 1mhz circuit, 3.3v input MAX1960 toc01 load current (a) efficiency (%) 10 1 60 70 80 90 100 50 0.1 100 v out = 2.5v v out = 1.8v v out = 1.5v efficiency vs. load current with 15a 1mhz circuit, 5v input MAX1960 toc02 load current (a) efficiency (%) 10 1 60 70 80 90 100 50 0.1 100 v out = 3.3v v out = 2.5v v out = 1.5v v out = 1.8v efficiency vs. load current with 15a 500khz circuit, 3.3v input MAX1960 toc03 load current (a) efficiency (%) 10 1 60 70 80 90 100 50 0.1 100 v out = 2.5v v out = 1.5v v out = 1.8v efficiency vs. load current with 15a 500khz circuit, 5v input MAX1960 toc04 load current (a) efficiency (%) 10 1 60 70 80 90 100 50 0.1 100 v out = 3.3v v out = 2.5v v out = 1.5v v out = 1.8v output voltage vs. input voltage, 1mhz MAX1960 toc05 input voltage (v) output voltage (v) 5.1 4.7 4.3 3.9 3.5 3.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 2.7 5.5 3.3v output 2.5v output 1.8v output 1.5v output 1.2v output 15a load dropout output voltage vs. input voltage, 500khz MAX1960 toc06 input voltage (v) output voltage (v) 5.1 4.7 4.3 3.9 3.5 3.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 2.7 5.5 3.3v output 2.5v output 1.8v output 1.5v output 1.2v output 15a load dropout fb regulation voltage vs. load current MAX1960 toc07 load current (a) fb voltage (v) 15 10 5 0.798 0.799 0.800 0.801 0.802 0.803 0.797 020 frequency vs. input voltage MAX1960 toc08 input voltage (v) frequency (khz) 5.0 4.5 3.5 4.0 500 600 700 800 1000 900 1100 1200 400 3.0 5.5 fset/sync = v cc fset/sync = gnd
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining _______________________________________________________________________________________ 7 frequency vs. temperature MAX1960 toc09 temperature ( c) frequency (khz) 60 35 10 -15 100 200 300 400 500 600 700 800 900 1000 1100 0 -40 85 fset/sync = v cc fset/sync = gnd charge-pump output voltage vs. charge-pump load current, 1mhz MAX1960 toc10 charge-pump load current (ma) charge-pump output voltage (v) 150 100 50 4.6 4.7 4.8 v in = 3.3v v in = 2.5v 4.9 5.0 5.1 5.2 4.5 0 200 c1 = 0.47 f c6 = 2.2 f charge-pump output voltage vs. charge-pump load current, 500khz MAX1960 toc11 charge-pump load current (ma) charge-pump output voltage (v) 150 100 50 4.6 4.7 4.8 v in = 3.3v v in = 2.5v 4.9 5.0 5.1 5.2 4.5 0 200 c1 = 1 f c6 = 4.7 f tripler charge-pump output voltage vs. charge-pump load current, 1mhz MAX1960 toc12 charge-pump load current (ma) charge-pump output voltage (v) 30 20 10 4.6 4.7 4.8 4.9 5.0 5.1 5.2 4.5 04050 v in = 2.5v circuit of figure 12 c10, c11, c12 = 0.47 f c6 = 2.2 f tripler charge-pump output voltage vs. charge-pump load current, 500khz MAX1960 toc13 charge-pump load current (ma) charge-pump output voltage (v) 30 20 10 4.6 4.7 4.8 4.9 5.0 5.1 5.2 4.5 04050 v in = 2.5v c10, c11, c12 = 1 f c6 = 4.7 f circuit of figure 12 MAX1960/max1961 current-limit threshold voltage vs. temperature MAX1960 toc14 temperature ( c ) current-limit threshold voltage (mv) 60 35 10 -15 100 50 150 200 250 300 350 0 -40 85 r ilim = 390k ? ilim = v dd max1962 current-limit threshold voltage vs. temperature MAX1960 toc15 temperature ( c) current-limit threshold voltage (mv) 60 35 10 -15 47.5 48.0 48.5 49.0 49.5 50.0 50.5 51.0 51.5 52.0 47.0 -40 85 typical operating characteristics (continued) (circuit of figure 9, t a = +25 c, unless otherwise noted.)
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 8 _______________________________________________________________________________________ 7.5a to 15a to 7.5a load transient MAX1960 toc16 20 s/div v out 50mv/div 5a/div i load voltage-margining step response MAX1960 toc17 50 s/div ctl2 i in ctl1 5v/div 5v/div 200ma/div 200mv/div v out circuit of figure 13 startup/shutdown waveforms MAX1960 toc18 1ms/div i l i in 10a/div 10a/div 1v/div v out MAX1960/max1961 short-circuit waveforms MAX1960 toc19 50 s/div i l i in 2v/div 20a/div 5a/div v out circuit of figure 13 max1962 short-circuit waveforms MAX1960 toc20 50 s/div i l i in 10a/div 10a/div 2v/div v out v in = 5v v out = 3.3v sync timing waveforms MAX1960 toc21 200ns/div dh master dl master dl slave dh slave clkout master/ sync slave typical operating characteristics (continued) (circuit of figure 9, t a = +25 c, unless otherwise noted.)
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining _______________________________________________________________________________________ 9 pin description pin MAX1960 max1961 max1962 name function 1 1 1 clkout clock output. connect to fset/sync of a second converter to operate 180 out-of- phase. clkout swings from v cc to gnd. clkout is low in shutdown (see the operating frequency and synchronization section) . 2 2 2 fset/sync frequency set and synchronization. connect to gnd for 500khz operation, connect to v cc for 1mhz operation, or drive with clock signal to synchronize (between 450khz and 1200khz). 33 ilim current limit. connect a resistor from ilim to gnd to set the current-sense threshold voltage. connect ilim to v dd to select the default threshold of 75mv. 3ene nab l e. d r i ve hi g h for nor m al op er ati on. d r i ve l ow or connect to gn d for shutd ow n m od e. 4 4 sel preset output voltage select. allows the output to be set to one of four preset voltages (1.5v, 1.8v, 2.5v, and 3.3v). for the max1962, fb must be connected to v dd if sel is to be used (see the setting the output voltage section) . 4 n.c. no connection. not internally connected. 8 5 out output. connect to the output. used to sense the output voltage for internal feedback and current sense. 55 ctl1 66 ctl2 control pins. controls voltage margining and shutdown. connect both ctl1 and ctl2 high for normal operation. connect both ctl1 and ctl2 low for shutdown. connect ctl1 high and ctl2 low for +4% voltage margining. connect ctl1 low and ctl2 high for -4% voltage margining. if voltage margining is not to be used, connect ctl1 and ctl2 together and use to enable/shutdown the device. 6cs c ur r ent- s ense inp ut. c onnect to the j uncti on of the cur r ent- sense r esi stor and the i nd uctor . the m ax 1962 cur r ent- sense thr eshol d i s 50m v m easur ed fr om c s to o u t. 777av dd filtered supply from v dd . connect a 1f bypass capacitor. av dd is forced to v cc in shutdown. do not apply an external load to av dd . 8 8fb feed b ack inp ut. the feed b ack thr eshol d i s 0.8v . c onnect to the center of a r esi sti ve vol tag e- d i vi d er fr om the outp ut to gn d to set the outp ut vol tag e to 0.8v or g r eater . on the m ax 1962, connect fb to v dd to sel ect p r eset outp ut vol tag es ( see s e l) . 9 9 9 comp compensation pin. comp is forced to gnd in shutdown, uvlo, or thermal fault. 10 10 10 ref reference output. v ref = 1.28v. bypass with a 0.22f capacitor to gnd. 11 11 11 gnd analog ground. connect to the pc board analog ground plane. connect the pc board analog ground plane and power ground planes with a single connection. 12 12 12 v dd c har g e- p um p o utp ut. p r ovi d es r eg ul ated 5v to p ow er the ic and g ate d r i ver s. byp ass w i th a 4.7f cer am i c cap aci tor for op er ati ng fr eq uenci es b etw een 450kh z and 950kh z. byp ass w i th a 2.2f cer am i c cap aci tor for 1m h z op er ati on. v dd i s i nter nal l y for ced to v cc i n shutd ow n. d o not ap p l y an exter nal l oad to v dd . 13 13 13 dl low-side mosfet synchronous rectifier gate-driver output. dl is high in shutdown. 14 14 14 pgnd power ground. connect to the pc board power ground plane.
MAX1960/max1961/max1962 detailed description the MAX1960/max1961/max1962 are high-current, high-efficiency voltage-mode step-down dc-dc con- trollers that operate from 2.35v to 5.5v input and gener- ate adjustable voltages down to 0.8v at up to 20a. an on-chip charge pump generates a regulated 5v for dri- ving a variety of external n-channel mosfets. constant frequency pwm operation and external syn- chronization make these controllers suitable for telecom and datacom applications. the operating frequency is programmed externally to either 500khz or 1mhz, or from 450khz to 1.2mhz with an external clock. a clock output is provided to synchronize another converter for 180 out-of-phase operation. a high closed-loop bandwidth provides excellent tran- sient response for applications with dynamic loads. internal charge pump an on-chip regulated charge pump develops 5v at 50ma (max) with input voltages as low as 2.35v. the output of this charge pump provides power for the internal circuitry, bias for the low-side driver (dl), and the bias for the boost diode, which supplies the high- side mosfet gate driver (dh). the charge pump is synchronized with the dl driver signal and operates at 1/2 the pwm frequency. the external mosfet gate charge is the dominant load for the charge pump and is proportional to the pwm switching frequency. the charge pump must supply chip-operating current plus adequate gate current for both mosfets at the selected operating frequency. the required charge-pump output current is given by the formula: i total = i avdd + f osc (q g1 + q g2 ) where i avdd is the current supplied to the ic through av dd (typically 2ma), f osc is the pwm switching frequency, q g1 is the gate charge of the high-side mosfet, and q g2 is the gate charge of the low-side mosfet. the mosfets must be chosen such that i total does not exceed 50ma. for example, with 1mhz operation, q g1 + q g2 should be less than 48nc. voltage margining and shutdown the voltage-margining feature on the MAX1960/ max1961 shifts the output voltage up or down by 4%. this is useful for the automatic testing of systems at high and low supply conditions to find potential hardware fail- ures. ctl1 and ctl2 control voltage margining as out- lined in table 1. a shutdown feature is included on all three parts, which stops switching the output drivers and the charge pump, reducing the supply current to less than 15a. for the max1962, drive en high for normal operation, or low for shutdown. for the MAX1960/max1961, drive both ctl1 and ctl2 high for normal operation, or drive ctl1 and ctl2 low for shutdown. for a simple enable/shutdown function with no voltage margining, connect ctl1 and ctl2 together and drive as one input. 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 10 ______________________________________________________________________________________ pin description (continued) pin MAX1960 max1961 max1962 name function 15 15 15 c- charge-pump flying capacitor negative connection. use a 0.47f ceramic capacitor at 1mhz, and 1f between 450khz and 950khz. 16 16 16 c+ charge-pump flying capacitor positive connection. use a 0.47f ceramic capacitor at 1mhz and 1f between 450khz and 950khz. 17 17 17 v cc input supply to charge pump 18 18 18 bst boost capacitor connection. connect a 0.1f ceramic capacitor from bst to lx. 19 19 19 dh high-side mosfet gate-driver output. dh is low in shutdown. 20 20 20 lx inductor connection ctl1 ctl2 function high high normal operation high low +4% output-voltage shift low high -4% output-voltage shift low low shutdown table 1. voltage margining truth table
mosfet gate drivers the dh and dl drivers are designed to drive logic-level n-channel mosfets to optimize system cost and effi- ciency. mosfets with r dson rated at v gs 4.5v are recommended. an adaptive dead-time circuit monitors the dl output and prevents the high-side mosfet from turning on until dl is fully off. there must be a low-resis- tance, low-inductance path from the dl driver to the mosfet gate for the adaptive dead-time circuit to work properly. otherwise, the internal sense circuitry could interpret the mosfet gate as off while there is actually still charge left on the gate. use very short, wide traces measuring no more than 20 squares (50mils to 100mils wide if the mosfet is 1in from the ic). undervoltage lockout and soft-start there are two undervoltage lockout (uvlo) circuits on the MAX1960/max1961/max1962. the first uvlo cir- cuit monitors v cc , which must be above 2.15v (typ) in order for the charge pump to operate. the second uvlo circuit monitors the output of the charge pump. the charge-pump output, v dd , must be above 4.2v (typ) in order for the pwm converter to operate. both uvlo circuits inhibit switching and force dl high and dh low when either v cc or v dd are below their threshold. when the monitored voltages are above their thresh- olds, an internal soft-start timer ramps up the error- amplifier reference voltage. the ramp occurs in eighty 10mv steps. full output voltage is reached 1.28ms after activation with a 1mhz operating frequency. MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 11 s r q q current sense osc uvlo soft-start dac charge pump osc v dd ref ilim (MAX1960/max1961) fset/sync clkout comp fb (MAX1960/max1962) out (max1961/max1962) feedback select vsel (max1961/max1962) c+ c- v dd v cc ref av dd pgnd gnd dl lx dh bst shutdown and voltage margining ctl1 (MAX1960/max1961) ctl2 (MAX1960/max1961) en (max1962) pgnd lx cs (max1962) osc out MAX1960/ max1961/ max1962 comp error amp figure 1. functional diagram
MAX1960/max1961/max1962 operating frequency and synchronization the MAX1960/max1961/max1962 operating frequency is set externally to either 500khz or 1mhz. for 500khz operation, connect fset/sync to gnd, or for 1mhz operation, connect fset/sync to v dd . alternately, an external clock from 450khz to 1.2mhz can be applied to sync. a clock output (clkout) that is 180 out-of-phase with the internal clock is also provided. this allows a second converter to be synchronized, and operate 180 out-of- phase with the first. to do this, simply connect clkout of the first converter to fset/sync of the second con- verter. the first converter can be set internally to 500khz or 1mhz for this mode of operation. when the first con- verter is synchronized to an external clock, clkout is the inverse of external clock. see the sync timing waveform in the typical operating characteristics . lossless current limit (MAX1960/max1961) to prevent damage in the case of excessive load cur- rent or a short circuit, the MAX1960/max1961 use the low-side mosfet s on-resistance (r ds(on) ) for current sensing. the current is monitored during the on-time of the low-side mosfet. if the current-sense voltage (v pgnd - v lx ) rises above the current-limit threshold for more than 128 clock cycles, the controller turns off. the controller remains off until the input voltage is removed or the device is re-enabled with ctl1 and ctl2 (see the setting the current limit section). current-sense resistor (max1962) the max1962 uses a standard current-sense resistor in series with the inductor for a 10% accurate current-limit measurement. the current-sense threshold is 50mv. this provides accurate current sensing at all duty cycles with- out relying on mosfet on-resistance. cs connects to the high-side (inductor side) of the current-sense resistor and out connects to the low-side (output side) of the current-sense resistor. the current-sense resistor for the max1962 may also be replaced with a series rc network across the inductor. this method uses the parasitic resistance of the inductor for current sensing. this method is less accurate than using a current-sense resistor, but is lower cost and pro- vides slightly higher efficiency. see the design procedure section for instructions on using this method. dropout performance the MAX1960/max1961/max1962 enter dropout when the input voltage is not sufficiently high to maintain output regulation. as input voltage is lowered, the duty cycle increases until it reaches its maximum value, where the part enters dropout. with a switching frequency of 1mhz, the maximum duty cycle is about 83%. at 500khz, the duty cycle can increase to about 92%, resulting in a lower dropout voltage. the duty cycle is dependent on the input voltage (v in ), the output volt- age (v out ), and the parasitic voltage drops in the mosfets and the inductor (v drop(n1) , v drop(n2) , v drop(l) ). note that v drop(l) includes the voltage drop due to the inductor s resistance, the drop across the current-sense resistor (if used), and any other resis- tive voltage drop from the lx switching node to the point where the output voltage is sensed. the duty cycle is found from: adaptive dead time the MAX1960/max1961/max1962 dl and dh mosfet drivers have an adaptive dead-time circuit to prevent shoot-through current caused by high- and low-side mosfet overlap. this allows a wide variety of mosfets to be used without matching fet dynamic characteris- tics. the dl driver will not go high until dh drives the high-side mosfet gate to within 1v of its source (lx). the dh output will not go high until dl drives the low-side mosfet gate to within 1v of ground. design procedure component selection is primarily dictated by the following criteria: input voltage range. the maximum value (v in(max) ) must accommodate the worst-case high input voltage. the minimum value (v in(min) ) must account for the lowest input voltage after drops due to connectors, fuses, and selector switches are con- sidered. maximum load current. there are two values to con- sider: the peak load current (i load(max) ) determines the instantaneous component stresses and filtering requirements and is key in determining output capac- itor requirements. i load(max) also determines the inductor saturation rating and the design of the cur- rent-limit circuit. the continuous load current (i load ) determines the thermal stresses and is key in deter- mining input capacitor requirements, mosfet requirements, as well as those of other critical heat- contributing components. d vv vv v out drop l in drop n drop n = + () () ( ) -- 12 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 12 ______________________________________________________________________________________
inductor operating point. this choice provides tradeoffs between size, transient response, and effi- ciency. choosing higher inductance values results in lower inductor ripple current, lower peak current, lower switching losses, and, therefore, higher effi- ciency at the cost of slower transient response and larger size. choosing lower inductance values results in large ripple currents, smaller size, and poorer efficiency, but have faster transient response. setting the output voltage the max1961 has four output voltage presets selected by sel. table 2 shows how each of the preset voltages are selected. the max1962 also has four preset output voltages, but also is adjustable down to 0.8v. to use the preset voltages on the max1962, fb must be connected to v dd . sel then selects the output voltage as shown in table 2. both the MAX1960/max1962 feature an adjustable out- put that can be set down to 0.8v. to set voltages greater than 0.8v, connect fb to a resistor-divider from the out- put (figures 9 and 11). use a resistor up to 10k ? for r2 and select r1 according to the following equation: where the feedback threshold, v fb = 0.8v, and v out is the output voltage. input voltage range the MAX1960/max1961/max1962 have an input volt- age range of 2.35v to 5.5v but cannot operate at both extremes with one application circuit. the standard charge-pump doubler application circuit operates with an input range of 2.7v to 5.5v (figures 9, 10, and 11). in order to operate down to 2.35v, the charge pump must be configured as a tripler. this circuit, however, limits the maximum input voltage to 3.6v. the schematic for the tripler charge pump is shown in figure 2. note that the flying capacitor between c+ and c- has been removed and c+ is not connected. inductor selection determine an appropriate inductor value with the fol- lowing equation: the inductor current ripple, lir, is the ratio of peak-to- peak inductor ripple current to the average continuous inductor current. an lir between 20% and 40% pro- vides a good compromise between efficiency and economy. choose a low-loss inductor having the lowest possible dc resistance. ferrite core type inductors are often the best choice for performance. the inductor saturation current rating must exceed i peak : setting the current limit lossless current limit (MAX1960/max1961) the MAX1960/max1961 use the low-side mosfet s on- resistance (r ds(on) ) for current sensing. this method of current limit sets the maximum value of the inductor s valley current (figure 3). if the inductor current is higher than the valley current-limit setting at the end of the clock period, the controller skips the dh pulse. when the first current-limit event is detected, the controller initi- ii lir i peak load max load max () () =+ ? ? ? ? ? ? 2 lv vv v f lir i out in out in osc load max = () - rr v v out fb 12 1 = ? ? ? ? ? ? - MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 13 preset output voltage sel 1.5v gnd 1.8v ref 2.5v no connection 3.3v v dd table 2. preset voltages max1961/max1962 MAX1960/ max1961/ max1962 c10 c11 c12 c6 d2 d3 d4 d5 r5 10 ? c4 1 f v cc c- c+ v dd av dd c10, c11, c12 c6 500khz 1 f 4.7 f 1mhz 0.47 f 2.2 f figure 2. tripler charge-pump configuration.
MAX1960/max1961/max1962 ates a 128 clock cycle counter. if the current limit is pre- sent at the end of this count, the controller remains off until the input voltage is removed and re-applied, or the device is re-enabled with ctl1 and ctl2. the 128-cycle counter is reset when four successive dh pulses are observed, without activating the current limit. at maximum load, the low excursion of inductor current, i valley(max) , is: the current-limit threshold (v clt ) is set by connecting a resistor (r ilim ) from ilim to gnd. the range for this resistor is 100k ? to 400k ? . set current-limit threshold as follows: v clt = r ilim 0.714a connecting ilim to v dd sets the threshold to a default value of 75mv. to prevent the current limit from falsely triggering, v clt divided by the low-side mosfet r ds(on) must exceed the maximum value of i valley . the maximum value of low-side mosfet r ds(on) should be used: v clt > r ds(on)max x i valley(max) a limitation of sensing current across mosfet on-resis- tance is that the mosfet on-resistance varies signifi- cantly from mosfet to mosfet and over temperature. consequently, this current-sensing method may not be suitable if a precise current limit is required. if better accuracy is needed, use the max1962 with a current- sense resistor. current-sense resistor (max1962) the max1962 uses a current-sense resistor connected from the inductor to the output with kelvin sense connec- tions. the current-sense voltage is measured from cs to out, and has a fixed threshold of 50mv. the max1962 current limit is triggered when the peak voltage across the current-sense resistor, i peak r sense , exceeds 50mv. once current sense is triggered, the controller does not turn off, but continues to operate at the current limit. this method of current sensing is more precise due to the accuracy of the current-sense resistor. the cost of this precision is that it requires an extra component and is slightly less efficient due to the loss in the current- sense resistance. inductor resistance current sense (max1962) alternately, the inductor resistance can be used to sense current in place of a current-sense resistor. to do this, connect a series rc network in parallel with the inductor (figure 4). choose a resistor value less than 40 ? to avoid offsets due to cs input current. calculate the capacitor value from the formula c = 2l / (r l r). the effective current-sense resistance (r sense ) equals r l . current-sense accuracy then depends on the accu- racy of the inductor resistance. note that the current- sense signal is delayed due to the rc filter time constant. consequently, inductor current may over- shoot (by as much as 2x) when a fast short occurs. ii lir i valley max load max load max () () () = ? ? ? ? ? ? - 2 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 14 ______________________________________________________________________________________ i peak i load i valley inductor current time figure 3. inductor current waveform dh l r l r r = 33 ? 0.22 h, 2.8mw, i limit = 18a c c = 4.7 f lx dl cs out max1962 figure 4. using the inductor resistance as a current-sense resistor with the max1962
output capacitor selection the output filter capacitor must have low enough effective series resistance (esr) to meet output ripple and load transient requirements. in addition, the capacitance value must be high enough to absorb the inductor energy during load steps. in applications where the output is subject to large load transients, low esr is needed to prevent the output from dipping too low (v dip ) during a load step: in applications with less severe load steps, maximum esr may be governed by what is needed to maintain acceptable output voltage ripple: to satisfy both load step and ripple requirements, select the lowest value from the above two equations. the capacitor is usually selected by physical size, esr, and voltage rating, rather than by capacitance value. with current tantalum, electrolytic, and polymer capaci- tor technology, the bulk capacitance will also be suffi- cient once the esr requirement is satisfied. when using low-capacity filter capacitors such as ceramic, capacitor size is usually determined by the capacitance needed to prevent voltage undershoot and overshoot during load transients. the overshoot voltage (v soar ) is given by: generally, once enough capacitance is in place to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. input capacitor selection the input capacitor (c in ) reduces the current peaks drawn from the input supply and reduces noise injec- tion. the source impedance to the input supply largely determines the value of c in . high source impedance requires high input capacitance. the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents. the rms input ripple current is given by: for optimal circuit reliability, choose a capacitor that has less than 10 c temperature rise at the peak ripple current. compensation and stability compensation with ceramic output capacitors the high switching frequency range of the MAX1960/max1961/max1962 allows the use of ceramic output capacitors. since the esr of ceramic capacitors is very low typically, the frequency of the associated transfer function zero is higher than the unity-gain crossover frequency and the zero cannot be used to compensate for the double pole created by the output inductor and capacitor. the solution is type 3 compen- sation (figure 5), which takes advantage of local feed- back to create two zeros and three poles (figure 6). the frequency of the poles and zeros are described below: unity-gain crossover frequency: fr c v vlc in max ramp 0 00 13 1 2 = () f rc zesr esr = 1 2 0 f rr c z2 1 2233 = + () f rc z1 1 211 = f lc lc = 1 2 00 f r cc cc p3 1 21 12 12 = + f rc p2 1 223 = f p1 0 = ii vvv v rms load out in out in = () - v li vc soar peak out out = () 2 2 r v lir i esr ripple p p load max ? () () r v i esr dip loadstep max () MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 15
MAX1960/max1961/max1962 where: v in(max) = maximum input voltage v ramp = oscillator ramp voltage = 0.85 x 10 6 /f s , where f s = switching frequency l o = output inductance c o = output capacitance the goal is to place the two zeros below crossover and the two poles above crossover so that crossover occurs with a single-pole slope. the compensation pro- cedure is as follows: select the crossover frequency such that: f 0 < f zesr and f 0 <1/5 ? f s select r1 such that: where g mea = 2ms. place the first zero before the double pole: place the third pole at half the switching frequency: if c2 < 10pf, it can be omitted. place the second pole after the esr zero: if: increase r1 and recalculate c1, c2, and c3. place the second zero at the double-pole frequency: set the output voltage: r v vv rv v fb out fb fb 4308 == - ,. r fc r lc 3 1 23 2 - r g m 2 1 550 <= (), ? r fc zesr 2 1 23 c fl c v rv ramp in 3 2 1 00 0 c fr s 2 1 205 1 . c fr lc 1 1 2 0 75 1 . r g mea 1 2 >> 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 16 ______________________________________________________________________________________ dh v in l o c 0 r3 r4 r2 r1 c1 c2 c3 v out lx dl fb comp MAX1960 figure 5. type 3 compensation network fp1 fz1 fz2 fp2 fp3 gain (db) frequency figure 6. transfer function for type 3 compensation
compensation with electrolytic output capacitors the MAX1960/max1961/max1962 use a voltage-mode control scheme that regulates the output voltage by comparing the error-amplifier output (comp) with a fixed internal ramp to produce the required duty cycle. the inductor and output capacitor create a double pole at the resonant frequency, which has gain drop of 40db per decade, and phase shift of 180 . the error amplifier must compensate for this gain drop and phase shift in order to achieve a stable high-bandwidth, closed-loop system. the basic regulator loop consists of a power modulator, an output feedback divider and an error amplifier. the power modulator has dc gain set by v in /v ramp , with a double pole set by the inductor and output capacitor, and a single zero set by the output capacitor (c o ) and its equivalent series resistance (esr). below are equa- tions that define the power modulator: the dc gain of the power modulator is: where v ramp = 0.85 10 6 / f s . the pole frequency due to the inductor and output capacitor is: the zero frequency due to the output capacitor s esr is: the output capacitor is usually comprised of several same value capacitors connected in parallel. with n capacitors in parallel, the output capacitance is: the total esr is: the esr zero (f zesr ) for a parallel combination of capacitors is the same as for an individual capacitor. the feedback divider has a gain of g fb = v fb /v out , where v fb is 0.8v. the transconductance error amplifier has dc gain gea(dc) of 80db. a dominant pole is set by the com- pensation capacitor (c c ), the amplifier output resis- tance (r o ), and the compensation resistor (r c ): a zero is set by the compensation resistor and the compensation capacitor: the total closed-loop gain must equal to unity at the crossover frequency, where the crossover frequency should be higher than f zesr , so that the -1 slope is used to cross over at unity gain. also, the crossover frequency should be less than or equal to 1/5 the switching frequency. the loop-gain equation at the crossover frequency is: where: and: the compensation resistor, r c , is calculated from: where g mea = 2ms. due to the under-damped (q > 1) nature of the output lc double pole, the error-amplifier compensation zero should be approximately 0.2f pmod to provide good phase boost. c c is calculated from: c rf c c pmod = 5 2 r v gvg c out mea fb mod f c = () gg f ff mod f mod dc pmod esr c c () ( ) () = 2 ggr ea f mea c c () = v v gg fb out ea f mod f cc () () = 1 ff f zesr c s < 5 f cr zea cc = 1 2 f crr pea cc = + 1 2 0 ( ) r r n esr esr each = () cnc o each = f rc zesr esr o = 1 2 f lc pmod oo = 1 2 g v v mod dc in ramp () = MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 17
MAX1960/max1961/max1962 a small capacitor c f , can also be added from comp to gnd to provide high-frequency decoupling. c f will add another high-frequency pole (f phf ) to the error-amplifier response. this pole should be greater than 100 times the error-amplifier zero frequency to have negligible impact on the phase margin. this pole should also be less than half the switching frequency for effective decoupling: 100f zea < f phf < 0.5f s select a value for f phf in the range given above, then solve for c f using the following equation: below is a numerical example to calculate compensa- tion values: v in = 3.3v v ramp = 0.85v v out = 1.8v v fb = 0.8v i out(max) = 15a c o = 2 x 680f = 1360f esr = 0.008 ? / 2 = 0.004 ? l o = 0.22h g mea = 2ms f s = 1mhz choose the crossover frequency (f c ) in the range f zesr < f c < f s /5: 29.3khz < f c < 200khz select f c = 100khz, this meets the criteria above, and the bandwidth is high enough for good transient response. the power modulator gain at f c is: choose r 1 = 8.06k ? , then r 2 = 10k ? (see the setting the output voltage section): select c c = 8200pf (nearest standard capacitor value). select f phf in the range 100f zea < f phf < 0.5f s . 184khz < f phf < 500khz select f phf = 250khz, then solve for c f : select the nearest standard capacitor value c f = 56pf. summary of feedback divider and compensation com- ponents: r 1 = 8.06k ? r 2 = 10k ? r c = 11k ? c c = 8200pf c f = 56pf power mosfet selection when selecting a mosfet, essential parameters include: (1) total gate charge (q g ) (2) reverse transfer capacitance (c rss ) (3) on-resistance (r ds(on) ) (4) gate threshold voltage (v th(min) ) (5) turn-on/turn-off times (6) turn-on/turn-off delays c r f k khz pf f c phf = = = 1 2 1 2 11 250 58 ? c rf k pf c c pmod = = = 5 2 5 2 11 9201 7863 ? v gvg k c out mea fb mod f c = = = . . . . () 18 0 002 0 8 0 102 11 ? g v v f ff kk mod fc in ramp pmod zesr c () () . () . . = = = 2 2 3 085 9201 29 3 100 0 102 ?? f cr khz zesr o esr = = = ? 1 2 1 2 1360 10 0 004 29 3 6 . . f lc khz pmod oo = = = ?? 1 2 1 2 0 22 10 1360 10 9 201 66 . . c rf f c phf = 1 2 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 18 ______________________________________________________________________________________
at high switching rates, dynamic characteristics (para- meters 1, 2, 5, and 6) that predict switching losses may have more impact on efficiency than r ds(on) , which pre- dicts dc losses. q g includes all capacitance associated with charging the gate, and best performance is achieved with a low total gate charge. q g also helps predict the current needed to drive the gate at the selected operating frequency. this is very important because the output current from the charge pump is finite (50ma, max) and is used to drive the gates of the mosfets as well as provide bias for the ic. r ds(on) is important as well, as it is used for current sensing in the MAX1960/max1961. r ds(on) also causes power dissi- pation during the on-time of the mosfet. choose q g to be as low as possible. ensure that: choose r ds(on) to provide the desired i load(max) at the desired current-limit threshold voltage (see the setting the current limit section). mosfet rc snubber circuit fast-switching transitions can cause ringing due to res- onating circuit parasitic inductance and capacitance at the switching nodes. this high-frequency ringing occurs at lx rising and falling transitions, and may introduce current-sensing errors and generate emi. to dampen this ringing, a series rc snubber circuit can be added across each mosfet switch (figure 8). typical values for the snubber components are c snub = 4700pf and r snub = 1 ? , however, the ideal values for snubber components will depend on circuit para- sitics. below is the procedure for selecting the compo- nent values of the series rc snubber circuit: 1) connect a scope probe to measure v lx to gnd, and observe the ringing frequency, f r . 2) find the capacitor value (connected from lx to gnd) that reduces the ringing frequency by half. 3) the circuit parasitic capacitance, c par , at lx is then equal to 1/3 of the value of the added capacitance above. qq ma f gg s 12 50 + MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 19 feedback divider error amplifier v 1 r1 r2 r3 c9 r s l1 v 2 r esr c out r load 0.8v modulator output filter gm v in /v ramp figure 7. open-loop transfer model
MAX1960/max1961/max1962 4) the circuit parasitic inductance, l par , is calculated by: 5) the resistor for critical dampening, r snub = 2 x f r x l par . the resistor value can be adjusted up or down to tailor the desired damping and the peak voltage excursion. 6) the capacitor, c snub , should be at least 2 to 4 times the value of the c par to be effective. 7) the snubber circuit power loss is dissipated in the resistor, p rsnub , and can be calculated as: where v in is the input voltage, and f s is the switching frequency. choose r snub power rating that exceeds the calculated power dissipation. mosfet power dissipation worst-case power dissipation occurs at duty factor extremes. for the high-side mosfet, the worst-case power dissipation due to resistance occurs at minimum input voltage (v in(min) ): the following formula calculates switching losses for the high-side mosfet, but is only an approximation and not a substitute for evaluation: where v in(max) is the maximum value of the input volt- age, t fall and t rise are the fall and rise time of the mosfet, i l(peak) and i l(valley) are the maximum peak and valley inductor current, and f s is the pwm switching frequency: i l(peak) = i out(max) (1 + 0.5 lir) and i l(valley) = i out(max) (1 - 0.5 lir) where lir is the peak-to-peak inductor ripple current divided by the load current. the total power dissipation in the high-side mosfet is the sum of these two power losses: p d(n1) = p d(n1resistive) + p d(n1switching) for the low-side mosfet, the worst-case power dissi- pation occurs at maximum input voltage: applications information pc board layout guidelines a properly designed pc board layout is important in any switching dc-dc converter circuit. if possible, mount the mosfets, inductor, input/output capacitors, and current-sense resistor on the top side. connect the ground for these devices close together on a power- ground trace. make all other ground connections to a separate analog ground plane. connect the analog ground plane to power ground at a single point. to help dissipate heat, place high-power components (mosfets, inductor, and current-sense resistor) on a large pc board area. keep high-current traces short and wide to reduce the resistance in these traces. also make the gate drive connections (dh and dl) short and wide, measuring 10 to 20 squares (50mils to 100mils wide if the mosfet is 1in from the controller ic). for the MAX1960/max1961, connect lx and pgnd to the low-side mosfet using kelvin sense connections. for the max1962, connect cs and out to the current- sense resistor using kelvin sense connections. place the ref capacitor, the bst diode and capacitor, and the charge-pump components as close as possible to the ic. if the ic is far from the input capacitors, bypass v cc to gnd with a 0.1 f or greater ceramic capacitor close to the v cc pin. for an example pc board layout, see the MAX1960 evaluation kit. p v v ir d n resistive out in max load ds on () () () 2 2 1 = ? ? ? ? ? ? - p iti t v f d n switching l peak fall l valley rise in max s () () ( ) () 1 2 = + () pd v v ir n resistive out in min load ds on () () () 1 2 = pcvf rsnub snub in s () = 2 l fc par r par = 1 2 2 ( ) 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 20 ______________________________________________________________________________________ dl lx dh pgnd MAX1960 n2 r snub c snub c snub r snub l1 n1 input figure 8. rc snubber circuit
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 21 part app. circuit 15a output 1mhz 15a output 500khz c1 1, 2, 3 0.47f ceramic capacitor 1f ceramic capacitor c2 1, 2, 3, 4 5 10f ceramic capacitors 5 10f ceramic capacitors c3 1, 2, 3, 4 2 x 680f poscaps sanyo 2r5tpd680m8 2 x 680 f poscaps sanyo 2r5tpd680m8 c4 1, 2, 3, 4 1f ceramic capacitor 1f ceramic capacitor c5 1, 2, 3, 4 0.1f ceramic capacitor 0.1f ceramic capacitor c6 1, 2, 3, 4 2.2f ceramic capacitor 4.7f ceramic capacitor c8 1, 2, 3, 4 0.22f ceramic capacitor 0.22f ceramic capacitor c9 1, 2, 3, 4 (table 4) (table 5) c10, c11, c12 4 0.47f ceramic capacitors 1f ceramic capacitors c13, c14 1, 2, 3, 4 4700pf ceramic capacitors 4700pf ceramic capacitors d1 1, 2, 3, 4 schottky diode central cmssh-3 schottky diode central cmssh-3 d2 d5 4 schottky diodes central cmhsh5-2l schottky diodes central cmhsh5-2l l1 1, 2, 3, 4 0.22h, 1.7m ? inductor sumida cdep1040r2nc-50 0.45h inductor sumida cdep1040r4mc-50 n1 1, 2, 3, 4 n-channel mosfet international rectifier irlr7821 n-channel mosfet international rectifier irlr7821 n2 1, 2, 3, 4 n-channel mosfet international rectifier irlr7833 n-channel mosfet international rectifier irlr7833 r1 1, 3 sets output voltage sets output voltage r2 1, 3 10k ? 1% resistor 10k ? 1% resistor r3 1, 2, 3, 4 (table 4) (table 5) r4 1, 2 390k ? 5% resistor 390k ? 5% resistor r5 1, 2, 3, 4 10 ? 5% resistor 10 ? 5% resistor r6 3, 4 1.5m ? 5%, 1w resistor panasonic erjm1wtj1m5u 1.5m ? 5%, 1w resistor panasonic erjm1wtj1m5u r7, r8 1, 2, 3, 4 1 ? 5% resistors 1 ? 5% resistors table 3. component list for application circuits
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 22 ______________________________________________________________________________________ v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.5v v in r1 (k ? ) r3 (k ? ) c9 (f) r1 (k ? ) r3 (k ? ) c9 (f) r1 (k ? ) r3 (k ? ) c9 (f) r1 ( ? ) r3 (k ? ) c9 (f) 5v 3.12 1.2 0.0068 2.13 9.1 0.01 1.24 6.8 0.01 876 5.5 0.01 3.3v 1.24 2.7 0.01 876 2.4 0.01 2.5v 1.24 3.9 0.01 876 3.3 0.01 table 4. r1, r3, and c9 component values for 1mhz operation supplier phone website c entr al s em i cond uctor 631- 435- 1110 w w w .centr al sem i .com international rectifier 310-322-3331 www.irf.com kamaya 260-489-1533 www.kamaya.com murata 814-237-1431 www.murata.com panasonic 714-373-7939 www.panasonic.com sanyo 619-661-6835 www.sanyo.com sumida 847-956-0666 www.sumida.com taiyo yuden 408-573-4150 www.t-yuden.com table 6. component suppliers part voltage margining current limit output voltage MAX1960 adjustable max1961 4% fet v ds sensing 4 presets max1962 no 10% with r sense 4 presets or adjustable selector guide v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.5v v in r1 (k ? ) r3 (k ? ) c9 (f) r1 (k ? ) r3 (k ? ) c9 (f) r1 (k ? ) r3 (k ? ) c9 (f) r1 ( ? ) r3 (k ? ) c9 (f) 5v 3.12 36 0.0033 2.13 27 0.0047 1.24 20 0.0068 876 16 0.0068 3.3v 2.13 47 0.0033 1.24 30 0.0047 876 27 0.0047 2.5v 1.24 39 0.0033 876 33 0.0033 table 5. r1, r3, and c9 component values for 500khz operation
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 23 dl lx dh bst v dd v cc av dd c- c+ pgnd ilim fb MAX1960 n2 r8 c14 c13 r7 l1 n1 d1 r5 c6 c4 c5 ctl1 input 2.7v to 5.5v ctl2 comp ref gnd fset/sync clkout r1 c3 output down to 0.8v r2 r4 c1 c2 c8 c9 r3 n.c. clkout figure 9. application circuit 1 MAX1960 adjustable output voltage
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 24 ______________________________________________________________________________________ dl lx dh bst v dd v cc av dd c- c+ pgnd ilim out max1961 n2 r8 c14 c13 r7 l1 n1 d1 r5 c6 c4 c5 ctl1 input 2.7v to 5.5v ctl2 comp ref gnd fset/sync clkout c3 output 2.5v r4 c1 c2 c8 c9 r3 vsel clkout figure 10. application circuit 2 max1961 preset output voltage
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 25 dl lx dh bst v dd v cc av dd c- c+ pgnd cs fb max1962 n2 r8 c14 c13 r7 l1 r6 n1 d1 r5 c6 c4 c5 input 2.7v to 5.5v en comp ref gnd fset/sync clkout r1 c3 output down to 0.8v r2 out c1 c2 c8 c9 r3 vsel clkout figure 11. application circuit 3 max1962 adjustable output voltage
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 26 ______________________________________________________________________________________ dl lx dh bst v dd v cc av dd c- c+ pgnd cs fb v dd max1962 n2 r8 c14 c13 r7 l1 r6 n1 d1 r5 c6 c4 d2 c5 input 2.35v to 3.6v en comp ref gnd fset/sync clkout d3 c3 output 1.5v out c2 c8 c9 r3 vsel c11 c10 d4 d5 c12 clkout figure 12. application circuit 4 max1962 tripler configuration, preset output
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining ______________________________________________________________________________________ 27 dl lx dh bst v dd v cc av dd c- c+ pgnd ilim fb MAX1960 n2 r8 1 ? c14 4700pf c13 4700pf r7 1 ? l1 n1 d1 r5 10 ? c6 2.2 f c4 1 f c5 0.1 f ctl1 input 2.7v to 5.5v ctl2 comp ref gnd fset/sync clkout n1 ?irlr7821 n2 ?irlr7833 r1 6.84k ? c3 4 x 47 f taiyo-yuden jmk325bj476mn output 2.5v, 15a r2 3.22k ? r4 390k ? c1 0.47 f c2 5 x 10 f c8 0.22 f c9 820pf c10 33pf r3 10k ? n.c. clkout c7 560pf r9 680 ? figure 13. application circuit ceramic output capacitors with type 3 compensation
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining 28 ______________________________________________________________________________________ 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 lx dh bst v cc n.c. (sel) ilim fset/sync clkout top view c+ c- pgnd dl fb (out) av dd ctl2 ctl1 12 11 9 10 v dd gnd ref comp MAX1960 max1961 qsop ( ) are for max1961. pin configurations 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 lx dh bst v cc sel en fset/sync clkout top view c+ c- pgnd dl fb av dd cs out 12 11 9 10 v dd gnd ref comp max1962 qsop chip information transistor count: 4476 process: bicmos
MAX1960/max1961/max1962 2.35v to 5.5v, 0.5% accurate, 1mhz pwm step-down controllers with voltage margining maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 29 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) qsop.eps

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