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sm8707 series nippon precision circuits inc.? clock generator with dual plls overview the sm8707 series are dual-pll clock generator ics, using a 27mhz master clock, that generate independent audio clock, video clock, and signal processor clock outputs needed in dvd player/recorder applications. each pll loop ?ter and crystal oscillator circuit are built-in and require no external components, resulting in high- precision clocks. the lineup includes devices that support both 44.1/48khz audio sampling frequencies (fs), switchable using a control pin. the sampling frequency can be switched during operation without generating any output spike noise. features supply voltage: 3.0 to 3.6v low current consumption: 35ma typ. (v dd = 3.3v, all outputs with no load) 27mhz master clock (internal pll reference clock) pll loop ?ter built-in crystal oscillator circuit built-in sampling frequency fs: 44.1/48khz 16-pin vsop package (pb free) generated clocks (refer to ?utput frequency listing?on page 18 for details.) low jitter output (1-sigma output load capacitance typical values) applications dvd players/recorders dvd car navigation system ordering information package dimensions (unit: mm) weight: 0.07g sm8707d sm8707e sm8707f sm8707g sm8707h sm8707k sm8707l video system output 27.0000mhz 27.0000mhz 27.0000mhz 27.0000mhz 27.0000mhz ? 27.0000mhz audio system output 512fs 768fs 1 384fs 1 1. 384fs (fs = 44.1khz)/768fs (fs = 48khz) 512fs 768fs ? 512fs 768fs 768fs signal processor system output 16.9344mhz 33.8688mhz 33.8688mhz 16.9344mhz 33.8688mhz 33.8688mhz 16.9344mhz 33.8688mhz 36.8640mhz 18.4320mhz 24.5760mhz 33.8688mhz 36.8640mhz 24.5760mhz 33.8688mhz sm8707d sm8707e sm8707f sm8707g sm8707h sm8707k sm8707l video system output 20ps 20ps 20ps 20ps 20ps ? 20ps audio and signal processor system output 70ps 55ps 40ps 40ps 70ps 60ps 60ps device package sm8707dv 16-pin vsop sm8707ev sm8707fv sm8707gv SM8707HV sm8707kv sm8707lv 4.4 0.2 6.4 0.2 5.1 0.2 1.15 0.1 0.10 0.05 0.5 0.2 0.275typ 0.65 0.10 0.12 m 0.15 + 0.1 - 0.05 0.22 + 0.1 ? 0.05 0 to 10
sm8707 series nippon precision circuits inc.? pinout (top view) pin description name i/o description mo o video system output ao o audio system output so o signal processor system output fsel i sampling frequency select xti i crystal oscillator connection or external clock input xto o crystal oscillator connection vdd1 supply for digital block vss1 ground for digital block vdd2 supply for analog block vss2 ground for analog block vdd3 supply for digital block vss3 ground for digital block nc1 o no connection output (leave pin open circuit) nc2 i no connection (leave pin open circuit or connect to vdd) vdd1 vss1 mo1 mo2 mo2 mo1 mo1 mo1 mo1 mo2 so1 nc1 mo2 mo1 nc1 nc1 vdd2 vss2 xti nc2 nc1 nc2 so2 so2 so2 so2 so4 so3 so3 so3 so2 fsel fsel fsel fsel fsel fsel so1 so1 so1 so1 so1 vdd3 vss3 ao1 ao1 ao1 ao1 ao1 ao2 ao2 ao2 xto 1 9 16 8 defghk l so2 sm8707 d e f g h k so2 so1 ao2 ao1 l sm8707
sm8707 series nippon precision circuits inc.? block diagram mo (nc: sm8707k) xto xti x'tal osc reference divider 0 phase detector 0 charge pump 0 lpf 0 vco 0 control logic so ao (nc: sm8707g) fsel (nc: sm8707g) loop divider 0 phase detector 1 charge pump 1 lpf 1 vco 1 loop divider 1 reference divider 1
sm8707 series nippon precision circuits inc.? note: unless otherwise noted, vdd applies to vdd1, vdd2, and vdd3. similarly, vss applies to vss1, vss2, and vss3. specifications absolute maximum ratings recommended operating conditions v ss = v ss1 = v ss2 = v ss3 = 0v unless otherwise noted. note 1: the supply voltage is de ned relative to v ss = 0v. note 2: the supply voltages applied on vdd1, vdd2, and vdd3 should be derived from a common supply source. note 3: if the supply voltages on vdd1, vdd2, and vdd3 are from different sources, they should be applied simultaneously. the sm8707 may be damaged if the supply voltage timing is different. sm8707d sm8707e parameter symbol condition rating unit supply voltage range v dd1 , v dd2 , v dd3 ? 0.3 to + 6.5 v supply voltage deviation v dd1 ?v dd2 , v dd1 ?v dd3 , v dd2 ?v dd3 ?0.1 v input voltage range v in ? 0.3 to v dd + 0.3 v output voltage range v out ? 0.3 to v dd + 0.3 v power dissipation p d 165 mw storage temperature range t stg ? 55 to + 125 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance 1 c l1 mo1, mo2, so1, so2 outputs 25 pf output load capacitance 2 c l2 ao1, ao2 outputs 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?40 + 85 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance 1 c l1 mo1 output 40 pf output load capacitance 2 c l2 mo2 output 25 pf output load capacitance 3 c l3 so1, so2, ao1, ao2 outputs 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?10 + 75 c
sm8707 series nippon precision circuits inc.? sm8707f sm8707g sm8707h sm8707k sm8707l parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance 1 c l1 mo1, so1, so2 outputs 25 pf output load capacitance 2 c l2 ao1, ao2 outputs 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?40 + 85 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance 1 c l1 mo1 output 40 pf output load capacitance 2 c l2 so3 output 25 pf output load capacitance 3 c l3 so1, so2 outputs 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?10 + 75 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance 1 c l1 mo1, mo2, so2, so3 outputs 25 pf output load capacitance 2 c l2 ao1, so1 outputs 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?40 + 85 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance c l outputs 25 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?40 + 85 c parameter symbol condition rating unit min typ max supply voltage ranges v dd1 , v dd2 , v dd3 (note 1, 2, 3) + 3.0 + 3.6 v output load capacitance c l outputs excluding xto 15 pf master clock frequency f xtal when using crystal oscillator 27.0000 mhz operating temperature range t opr ?40 + 85 c
sm8707 series nippon precision circuits inc.? dc electrical characteristics sm8707d/f/h/k/l f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. sm8707e/g f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 10 to + 75 c unless otherwise noted. parameter symbol pins condition rating unit min typ max current consumption i dd vdd v dd = 3.3v, ta = 25 c, fs = 48khz, crystal oscillator connected, no load on all outputs excluding sm8707g ?545 ma sm8707g 20 27 input voltage v ih fsel, xti v dd = 3.3v 0.8 v dd v v il 0.2 v dd input current i ih1 fsel 1 1. fsel pin has schmitt-trigger input and built-in pull-up resistor (sm8707g: nc pin). v in = v dd 1 ? i il1 v in = 0v ?100 ? i ih2 xti v in = v dd 40 i il2 v in = 0v ?40 ? output voltage v oh all outputs excluding xto i oh = ? 2ma v dd ? 0.4 v v ol i ol = 2ma 0.4
sm8707 series nippon precision circuits inc.? ac electrical characteristics sm8707d f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1, mo2, so1, so2 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns ao1, ao2 c l = 15pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 output clock fall time 2 t f mo1, mo2, so1, so2 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns ao1, ao2 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1, mo2 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0 ps so1, so2 70 ao1, ao2 ta = 25 c, c l = 15pf, v o = 0.5v dd ?0 output clock duty cycle 2 dt mo1, mo2, so1, so2 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 % ao1, ao2 ta = 25 c, c l =15 pf, v o = 0.5v dd 45 50 55 settling time 2 t s all outputs excluding xto 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.? sm8707e f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 10 to + 75 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1 c l = 40 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns mo2 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 so1, so2, ao1, ao2 c l = 15pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 output clock fall time 2 t f mo1 c l = 40pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns mo2 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 so1, so2, ao1, ao2 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1 ta = 25 c, c l = 40pf, v o = 0.5v dd ?0 ps mo2 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0 so1, so2, ao1, ao2 ta = 25 c, c l = 15pf, v o = 0.5v dd ?5 output clock duty cycle 2 dt mo1 ta = 25 c, c l = 40pf, v o = 0.5v dd 45 50 55 % mo2 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 so1, so2, ao1, ao2 ta = 25 c, c l =15 pf, v o = 0.5v dd 45 50 55 settling time 2 t s ao1, ao2 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.? sm8707f f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1, so1, so2 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns ao1, ao2 c l = 15pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 output clock fall time 2 t f mo1, so1, so2 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns ao1, ao2 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0 ps so1, so2 40 ao1, ao2 ta = 25 c, c l = 15pf, v o = 0.5v dd ?0 output clock duty cycle 2 dt mo1, so1, so2 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 % ao1, ao2 ta = 25 c, c l =15 pf, v o = 0.5v dd 45 50 55 settling time 2 t s all outputs excluding xto 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.?0 sm8707g f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 10 to + 75 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1 c l = 40 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns so3 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 so1, so2 c l = 15pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 output clock fall time 2 t f mo1 c l = 40pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns so3 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 so1, so2 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1 ta = 25 c, c l = 40pf, v o = 0.5v dd ?0 ps so3 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0 so1, so2 ta = 25 c, c l = 15pf, v o = 0.5v dd ?0 output clock duty cycle 2 dt mo1 ta = 25 c, c l = 40pf, v o = 0.5v dd 45 50 55 % so3 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 so1, so2 ta = 25 c, c l =15 pf, v o = 0.5v dd 45 50 55 power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.?1 sm8707h f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1, mo2, so2, so3 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns so1, ao1 c l = 15pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 output clock fall time 2 t f mo1, mo2, so2, so3 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns so1, ao1 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1, mo2 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0 ps so2, so3 70 so1, ao1 ta = 25 c, c l = 15pf, v o = 0.5v dd ?0 output clock duty cycle 2 dt mo1, mo2, so2, so3 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 % so1, ao1 ta = 25 c, c l =15 pf, v o = 0.5v dd 45 50 55 settling time 2 t s all outputs excluding xto 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.?2 sm8707k f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz frequency deviation 1 d f so1, so2, so3, so4, ao1 applies to external clock input use only, when frequency deviation of master clock is 0ppm ?5 +15 ppm output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r so1, so2, so3, so4, ao1 c l = 25 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns output clock fall time 2 t f so1, so2, so3, so4, ao1 c l = 25pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) so1, so2, so3, so4, ao1 ta = 25 c, c l = 25pf, v o = 0.5v dd ?0ps output clock duty cycle 2 dt so1, so2, so3, so4, ao1 ta = 25 c, c l = 25pf, v o = 0.5v dd 45 50 55 % settling time 2 t s all outputs excluding xto 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms
sm8707 series nippon precision circuits inc.?3 sm8707l f xtal = 27.0000mhz, v dd = 3.3v 0.3v, v ss = 0v, ta = 40 to + 85 c unless otherwise noted. parameter symbol pins condition rating unit min typ max external input clock frequency 1 1. when using an external clock input, the xti duty should be 50% with 3.3v clock signal amplitude level. the input signal volt age should not exceed the absolute maximum rating, otherwise damage may occur. f xti xti applies to external clock input use only 27.0000 mhz output clock rise time 2 2. the numeric values are measured values obtained using the circuit in figure 1 and the npc standard evaluation board. t r mo1, mo2, so1, so2, ao1, ao2 c l = 15 pf, transition between v ol = 0.2v dd and v oh = 0.8v dd 2.0 ns output clock fall time 2 t f mo1, mo2, so1, so2, ao1, ao2 c l = 15pf, transition between v oh = 0.8v dd and v ol = 0.2v dd 2.0 ns output clock jitter 3 3. the numeric values are measured values obtained using the circuit in figure 2 and the npc standard evaluation board. t jitter (1-sigma) mo1, mo2 ta = 25 c, c l = 15pf, v o = 0.5v dd ?0ps so1, so2, ao1, ao2 ?0ps output clock duty cycle 2 dt mo1, mo2, so1, so2, ao1, ao2 ta = 25 c, c l = 15pf, v o = 0.5v dd 45 50 55 % settling time 2 t s all outputs excluding xto 1 s power-up time 2, 4 4. this is the time, after the supply is turned on from the off state, until the output clock reaches 0.1% of the speci?d frequency. t p all outputs excluding xto ?5ms figure 1. measurement circuit 1 frequency & time interval analyzer (hp5371a) 27mhz oscilloscope (infinium hp54845a) passive probe (hp10435a) active probe (hp1152a) dut dut:device under test figure 2. measurement circuit 2 jitter measurement system (asa, m1) 27mhz oscilloscope (hp54720d +hp54721a) active probe (hp54701a) dut dut:device under test
sm8707 series nippon precision circuits inc.?4 functional description 27mhz master clock the sm8707 series 27mhz master clock circuit is con gured, as shown in figure 3 and 4, with the crystal oscillator element connected between xti (pin 7) and xto (pin 8). alternatively, the 27mhz master clock can be supplied from an external master clock input on xti, as shown in figure 5 and 6. if an external input clock on xti is used, it is recommended that the frequency be 27.0000mhz, with 50% duty, and 3.3v voltage amplitude level. furthermore, when using an external clock input, the input signal voltage should not exceed the absolute max- imum rating, otherwise damage may occur. figure 3. crystal oscillator connection (excluding sm8707k) oscillator internal circuits xti (pin 7) xto (pin 8) mo c1 c2 c1, c2 = 5 to 33pf figure 4. crystal oscillator connection (sm8707k) oscillator internal circuits xti (pin 7) xto (pin 8) c1 c2 c1, c2 = 5 to 33pf figure 5. external clock input (excluding sm8707k) open external clock oscillator internal circuits xti (pin 7) xto (pin 8) mo figure 6. external clock input (sm8707k) open external clock oscillator internal circuits xti (pin 7) xto (pin 8)
sm8707 series nippon precision circuits inc.?5 sampling frequency and output clock frequency sm8707d the sm8707d sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is high, and 48khz when fsel is low. the audio output (ao1) is a 384fs frequency clock when fsel is high (fs = 44.1khz), and 768fs frequency clock when fsel is low (fs = 48khz) where fs is determined by the setting on fsel. the audio output (ao2) is a 512fs frequency clock. in addition, the signal processor output (so1 and so2) is a 16.9344mhz, 33.8688mhz frequency clock derived from the master clock. and the video output (mo1 and mo2) is a 27mhz frequency clock, identical to the master clock. the sm8707d possible output clock frequencies are shown in table 1. sm8707e the sm8707e sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is low, and 48khz when fsel is high. the audio output (ao1 and ao2) is a 512fs frequency clock, where fs is deter- mined by the setting on fsel. in addition, the signal processor output (so1 and so2) is a 33.8688mhz fre- quency clock derived from the master clock. and the video output (mo1 and mo2) is a 27mhz frequency clock, identical to the master clock. the sm8707e possible output clock frequencies are shown in table 2. table 1. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 9) ao2 (pin 10) so1 (pin 13) so2 (pin 15) mo1 (pin 3) mo2 (pin 4) high 44.1 16.9344 (384fs) 22.5792 (512fs) 16.9344 33.8688 27.0000 27.0000 low 48 36.8640 (768fs) 24.5760 (512fs) 16.9344 33.8688 27.0000 27.0000 table 2. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 9) ao2 (pin 10) so1 (pin 13) so2 (pin 15) mo1 (pin 3) mo2 (pin 4) high 48 24.5760 (512fs) 24.5760 (512fs) 33.8688 33.8688 27.0000 27.0000 low 44.1 22.5792 (512fs) 22.5792 (512fs) 33.8688 33.8688 27.0000 27.0000
sm8707 series nippon precision circuits inc.?6 sm8707f the sm8707f sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is high, and 48khz when fsel is low. the audio outputs (ao1 and ao2) are equivalent to 768fs, where fs is determined by the setting on fsel. in addition, the signal processor outputs (so1 and so2) are 16.9344mhz and 33.8688mhz clocks, respectively, derived from the master clock. the video output (mo1) is a 27mhz clock, identical to the master clock. the sm8707f supported clock frequencies are shown in table 3. sm8707g the sm8707g signal processor outputs (so1, so2 and so3) are all 33.8688mhz clocks, derived from the master clock. the video output (mo1) is a 27mhz clock, identical to the master clock. the sm8707g supported clock frequencies are shown in table 4. sm8707h the sm8707h sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is high, and 48khz when fsel is low. the audio output (ao1) is equivalent to 512fs, where fs is determined by the set- ting on fsel. in addition, the signal processor outputs (so1, so2 and so3) are 36.8640mhz, 16.9344mhz and 33.8688mhz clocks, respectively, derived from the master clock. the video outputs (mo1 and mo2) are 27mhz clocks, identical to the master clock. the sm8707h supported clock frequencies are shown in table 5. table 3. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 9) ao2 (pin 10) so1 (pin 13) so2 (pin 15) mo1 (pin 3) high 44.1 33.8688 (768fs) 33.8688 (768fs) 16.9344 33.8688 27.0000 low 48 36.8640 (768fs) 36.8640 (768fs) 16.9344 33.8688 27.0000 table 4. sampling frequency and output clock frequency (27.0000mhz master clock frequency) output clock frequency [mhz] so1 (pin 9) so2 (pin 10) so3 (pin 13) mo1 (pin 3) 33.8688 33.8688 33.8688 27.0000 table 5. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 10) so1 (pin 9) so2 (pin 13) so3 (pin 15) mo1 (pin 3) mo2 (pin 4) high 44.1 22.5792 (512fs) 36.8640 16.9344 33.8688 27.0000 27.0000 low 48 24.5760 (512fs) 36.8640 16.9344 33.8688 27.0000 27.0000
sm8707 series nippon precision circuits inc.?7 sm8707k the sm8707k sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is high, and 48khz when fsel is low. the audio output (ao1) is equivalent to 768fs, where fs is determined by the set- ting on fsel. in addition, the signal processor output (so1, so2, so3 and so4) is 24.5760mhz, 18.4320mhz, 36.8640mhz and 33.8688mhz clocks, respectively, derived from the master clock. also, the audio output ao1 36.8688mhz clock is synchronized with the signal processor output so4 clock, and audio output ao1 36.8640mhz clock is synchronized with the signal processor output so3 clock. the sm8707k supported clock frequencies are shown in table 6. sm8707l the sm8707l sampling frequency fs can be switched between 44.1khz when fsel (pin 14) is low, and 48khz when fsel is high. the audio output (ao1 and ao2) is a 768fs frequency clock, where fs is deter- mined by the setting on fsel. in addition, the signal processor output (so1 and so2) is 24.5760mhz and 33.8688mhz frequency clock derived from the master clock. and the video output (mo1 and mo2) is a 27mhz frequency clock, identical to the master clock. the sm8707l supported clock frequencies are shown in table 7. table 6. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 10) so1 (pin 4) so2 (pin 9) so3 (pin 13) so4 (pin 15) high 44.1 33.8688 (768fs) 24.5760 18.4320 36.8640 33.8688 low 48 36.8640 (768fs) 24.5760 18.4320 36.8640 33.8688 table 7. sampling frequency and output clock frequency (27.0000mhz master clock frequency) fsel (pin 14) sampling frequency fs [khz] output clock frequency [mhz] ao1 (pin 9) ao2 (pin 10) so1 (pin 13) so2 (pin 15) mo1 (pin 3) mo2 (pin 4) high 44.1 33.8688 (768fs) 33.8688 (768fs) 24.5760 33.8688 27.0000 27.0000 low 48 36.8640 (768fs) 36.8640 (768fs) 24.5760 33.8688 27.0000 27.0000
sm8707 series nippon precision circuits inc.?8 spike noise prevention function all device versions, excluding the sm8707g which has no fsel input, have a spike noise prevention circuit that prevents any spike noise generation in the audio output clocks when the sampling frequency is switched using fsel. the state of the ao output before and after fsel is switched is shown in figure 7. when fsel is switched, either from low to high or high to low, the spike noise prevention circuit stops the ao clock output by a maximum of 1 s, and then the output clock changes to re ect the current fsel set- ting. sampling frequency switching settling time the clock output response when the sampling frequency is switched using fsel is shown in figure 8. note that all device versions, excluding the sm8707g which has no fsel input, have a spike noise prevention cir- cuit which stops the output ao clocks for a xed interval, which means the settling time is a maximum 1 s when the sampling frequency is switched. figure 7. spike noise prevention circuit timing at sampling frequency switching figure 8. output signal switching timing fs = 44.1khz (sm8707e: fs = 48khz) fsel 1 s (max) fs = 48khz (sm8707e: fs = 44.1khz) ao 27.0000mhz mo ao t s fsel t s 16.9344/33.8688mhz (sm8707d/f) 33.8688mhz (sm8707e) so 0.8v dd 0.2v dd fs = 48khz (sm8707e: fs = 44.1khz) fs = 44.1khz (sm8707e: fs = 48khz) fs = 48khz (sm8707e: fs = 44.1khz) 16.9344/33.8688/36.8640mhz (sm8707h) 18.4320/24.5760/33.8688/36.8640mhz (sm8707k) 24.5760/33.8688mhz (sm8707l)
sm8707 series nippon precision circuits inc.?9 sm8707 series output frequency listing version fsel polarity (pin 14) sampling frequency fs [khz] output clock frequency [mhz] pin 3 pin 4 pin 9 pin 10 pin 13 pin 15 sm8707d h 44.1 27.0000 27.0000 16.9344 (384fs) 22.5792 (512fs) 16.9344 33.8688 l 48.0 27.0000 27.0000 36.8640 (768fs) 24.5760 (512fs) 16.9344 33.8688 output load capacitance [pf] 25 25 15 15 25 25 pin name mo1 mo2 ao1 ao2 so1 so2 sm8707e h 48.0 27.0000 27.0000 24.5760 (512fs) 24.5760 (512fs) 33.8688 33.8688 l 44.1 27.0000 27.0000 22.5792 (512fs) 22.5792 (512fs) 33.8688 33.8688 output load capacitance [pf] 40 25 15 15 15 15 pin name mo1 mo2 ao1 ao2 so1 so2 sm8707f h 44.1 27.0000 ? 33.8688 (768fs) 33.8688 (768fs) 16.9344 33.8688 l 48.0 27.0000 36.8640 (768fs) 36.8640 (768fs) 16.9344 33.8688 output load capacitance [pf] 25 ? 15 15 25 25 pin name mo1 nc1 ao1 ao2 so1 so2 sm8707g ?? 27.0000 ? 33.8688 33.8688 33.8688 ? output load capacitance [pf] 40 ? 15 15 25 ? pin name mo1 nc1 so1 so2 so3 nc1 sm8707h h 44.1 27.0000 27.0000 36.8640 22.5792 (512fs) 16.9344 33.8688 l 48.0 27.0000 27.0000 36.8640 24.5760 (512fs) 16.9344 33.8688 output load capacitance [pf] 25 25 15 15 25 25 pin name mo1 mo2 so1 ao1 so2 so3 sm8707k h 44.1 ? 24.5760 18.4320 33.8688 (768fs) 36.8640 33.8688 l 48.0 24.5760 18.4320 36.8640 (768fs) 36.8640 33.8688 output load capacitance [pf] ? 25 25 25 25 25 pin name nc1 so1 so2 ao1 so3 so4 sm8707l h 44.1 27.0000 27.0000 33.8688 (768fs) 33.8688 (768fs) 24.5760 33.8688 l 48.0 27.0000 27.0000 36.8640 (768fs) 36.8640 (768fs) 24.5760 33.8688 output load capacitance [pf] 15 15 15 15 15 15 pin name mo1 mo2 ao1 ao2 so1 so2
sm8707 series nippon precision circuits inc.?0 nc0107ce 2003.12 please pay your attention to the following points at time of using the products shown in this document. the products shown in this document (hereinafter ?roducts? are not intended to be used for the apparatus that exerts harmful in?ence on human lives due to the defects, failure or malfunction of the products. customers are requested to obtain prior written agreeme nt for such use from nippon precision circuits inc. (hereinafter ?pc?. customers shall be solely responsible for, and indemnify and hold npc free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. npc reserves the right to change the speci?ations of the products in order to improve the characteristic or reliability thereof. npc makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. therefore, npc shall not be responsible for such problems, even if the use is in accordance with the descriptions prov ided in this document. any descriptions including applications, circuits, and the parameters of the products in this document are for refere nce to use the products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modi?ation. customers are requested not to export or re-export, directly or indirectly, the products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. customers are req uested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. nippon precision circuits inc. 4-3, fukuzumi 2-chome, koto-ku, tokyo 135-8430, japan telephone: +81-3-3642-6661 facsimile: +81-3-3642-6698 http://www.npc.co.jp/ email: sales @ npc.co.jp

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