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T6LD4 2006-09-20 1 toshiba cmos digital integrated circuit silicon monolithic T6LD4 gate driver for tft lcd panels the T6LD4 is a 350 / 342-channel output gate driver for tft lcd panels. features ? lcd drive output pins : switchable 350 / 342 pins ? logic power supply voltage : 2.3 to 3.6v ? lcd drive voltage : max 43.5v ? data transfer method : bidirectional shift register ? operating temperature : ? 20 to 75c ? package : cof ? built-in power on reset circuit application modules for pc monitor and note pc unit : mm user pitch area T6LD4 in out for the latest tcp / cof specifications and product line-up, contact toshiba or your local sales office. cof (chip on film)
T6LD4 2006-09-20 2 block diagram do/i g2 g3 g348 g349 g1 g350 u/d cpv control circuit block output circuit block v gg v ee v ss v dd bidirectional shift registers input circuit block di/o mode oe
T6LD4 2006-09-20 3 pin assignment the above diagram shows the device?s pin configuration only and does not necessarily correspond to the pad layout on the chip. please contact toshiba or our distributors for the latest cof specification. g350 g349 g348 g3 g2 g1 365 364 363 18 17 16 T6LD4 (chip top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 v gg v ee v dd do/i oe cpv (v dd ) u/d (v ss ) mode (v dd ) di/o v ss v ee v gg
T6LD4 2006-09-20 4 pin description signal name i/o function di/o do/i i/o vertical shift data input/output pins these pins are used to input and output shift data. the function of these pins is switched for input or output by u/d as shown below: u/d di/o do/i h input output l output input when set for input the data is latched into the internal shift registers synchronously with the rising edge of cpv. when set for output when two or more T6LD4s are cascaded, this pin outputs the data to be fed into the next stage. this data changes state synchronously with the falling edge of cpv. u/d i transfer direction select pin this pin specifies the direction in which data is transferred through the shift registers. the shift register data is shifted synchronously with each rising edge of cpv as follows: when u/d is high, data is shifted in the direction u/d = ?h?: g1 g2 g3 g4 g350 when u / d is low, the direction is reversed to give u/d = ?l?: g350 g349 g348 g347 g1 the voltage applied to this pin must be a dc-level voltage that is either high (v dd ) or low (v ss ). apply the same dc-level voltage to these pins. cpv i vertical shift clock pin this is the shift clock for the shift registers. data is shifted through the shift registers synchronously with the rising edge of cpv. oe i output enable pin this signal controls the data appearing at the tft -lcd panel drive pins (g1 to g350). this pin operates asynchronously with cpv. oe = high level : controls the lcd panel drive output to v ee oe = low level : outputs shift data and data contents. mode i output select pin this signal selects 350 / 342-pin mode for the lcd panel driver. mode output mode the unapplied lcd panel drive pins h 350-out ? l 342-out g171 to g178 (v ee level) the voltage applied to this pin must be a dc -level voltage that is either high (v dd ) or low (v ss ). g1 to g350 o tft-lcd panel driver pins these pins output the shift register data or the voltage of v gg or v ee depending on the control oe signal. v gg power supply for tft-lcd drive pin v ee power supply for tft-lcd drive pin v dd power supply for the internal logic pin these signals arranged right and left is connected on the film. apply the same voltage to these pins. the (v dd ) is the pin for connection. v ss power supply for the internal logic pin these signals arranged right and left is connected on the film. apply the same voltage to these pins. the (v ss ) is the pin for connection.
T6LD4 2006-09-20 5 device operation shift data transfer method shift data mode output mode u/dpin input output data transfer method h di/o do/i g1 g2 g3 g4 g350 h 350-out l do/i di/o g350 g349 g348 g1 h di/o do/i g1 g2 g3 g4 g170 g179 g350 l 342-out l do/i di/o g350 g349 g348 g179 g170 g1 the input data (di/o or do/i) is latched into the internal register synchronously with the rising edge of the shift clock cpv. at the same time that the data is shifted to the next register at the next rise of cpv, new vertical shift data is latched into. in the output operation, the data in the last shift register (g350 or g1) is output synchronously with the falling edge of cpv. (the output high voltage is the v dd level; the output low voltage is the v ss level.)
T6LD4 2006-09-20 6 timing chart 1 ( 350-out mode, u/d = high level, mode = high level ) timing chart 2 ( 350-out mode, u/d = low level, mode = high level ) di/o (input) cpv 1 2 3 4 5 350 351 g1 g2 g3 g4 g350 do/i (output) : this part is output which is controlled ( fixed to v ee ) by oe pin do/i (input) cpv 1 2 3 4 5 350 351 g350 g349 g348 g347 g1 di/o (output) : this part is output which is controlled ( fixed to v ee ) by oe pin oe oe
T6LD4 2006-09-20 7 timing chart 3 ( 342-out mode, u/d = high level, mode = low level ) timing chart 4 ( 342-out mode, u/d = low level, mode = low level ) di/o (input) cpv 1 2 3 4 5 342 343 g1 g2 g3 g4 g350 do/i (output) : this part is output which is controlled ( fixed to v ee ) by oe pin g171 to g178 v ee do/i (input) cpv 1 2 3 4 5 342 343 g350 g349 g348 g347 g1 di/o (output) : this part is output which is controlled ( fixed to v ee ) by oe pin g178 to g171 v ee oe oe
T6LD4 2006-09-20 8 maximum ratings (v ss = 0 v) characteristics symbol rating unit supply voltage (1) v dd ? 0.3 to 4.0 supply voltage (2) v gg ? 0.3 to 45.0 supply voltage (3) v ee ? 20.0 to 0.3 supply voltage (1) v gg ? v ee ? 0.3 to 45.0 v input voltage v in ? 0.3 to v dd + 0.3 v storage temperature t stg ? 55 to 125 c operating range (v ss = 0 v) characteristics symbol rating unit supply voltage (3) v dd 2.3 to 3.6 supply voltage (2) v gg 10 to 35 supply voltage (4) v ee ? 15 to ? 5 supply voltage (1) v gg ? v ee 15.0 to 43.5 v operating temperature t opr ? 20 to 75 c operating frequency f cpv 100 (max) khz output load capacitance c l 600 (max) pf / pin electrical characteristics dc characteristics unless otherwise specified, v gg ? v ee = 30.0 to 43.5 v, v dd = 2.3 to 3.6 v, v ss = 0 v, ta = 20 to 75c characteristics symbol test circuit test condition min max unit relevant pin low level v il ? v ss 0.3 v dd input voltage high level v ih ? ? 0.7 v dd v dd v (note 1) low level v ol ? i ol = 40 a v ss v ss + 0.4 output voltage high level v oh ? i oh = ? 40 a v dd ? 0.4 v dd v di/o, do/i low level r ol v out = v ee + 0.5 v output resistance high level r oh ? v out = v gg ? 0.5 v ? 1000 ? g1 to g350 input current i in ? ? ? 1 1 a (note 1) i gg ? ? 200 v gg i dd ? ? 50 v dd current dissipation i ee ? no load (note 2) ? 200 a v ee note1: di/o , do/i , cpv, oe note2: f cpv = 50 khz, shift data input : 60hz 1pulse, oe = low level, mode = high level
T6LD4 2006-09-20 9 ac characteristics unless otherwise specified, v gg ? v ee = 30.0 to 43.5 v, v dd = 2.3 to 3.6 v, v ss = 0 v, ta = 20 to 75c characteristics symbol test circuit test condition min max unit clock pulse frequency t cpv ? ? ? 100 khz clock pulse width (h) t cpvh ? ? 500 ? clock pulse width (l) t cpvl ? ? 500 ? ns data setup time t sdi ? ? 200 ? data hold time t hdi ? ? 200 ? ns oe pulse width t woe ? ? 1 ? s output delay time (1) t pddo ? c l = 50 pf ? 200 output delay time (2) t pdg ? c l = 600 pf ? 1000 output delay time (3) t pdoe ? c l = 600 pf ? 1000 ns cpv t cpvh t cpvl t sdi t hdi di/o, do/i (input) v gg 50% 50% 50% 50% 50% 50% 50% g1 t pdg 50% t pdg 50% v ee g2 to g350 t pdg 50% t pdg 50% v gg v ee cpv do/i, di/o (output) v gg 50% 50% g350 t pddo 50% t pddo 50% v ee g1 to g350 t woe v gg 50% 50% v ee t pdoe 50% t pdoe 50% oe
T6LD4 2006-09-20 10 power supply sequence turn power on in the order v dd v ee input signal v gg . turn power off in th reverse order. it may input v ee, input signal and v gg simultaneously. T6LD4 have the power on reset function. (t rg 10 s) instruction for operating circumstances ? light striking a semiconductor device can generate electromotive force due to photoelectric effects. in some cases this may cause the device to malfunction. this is more likely to be affected for the devices in which the surface (back), or side of the chip is exposed. at the design phase, please make sure that devices are protected against incident light from external sources. please take into account of incident light from external sources during actual operation and during inspection. ? polyimide base film is hard and thin. be careful not to injure yourself on the film or to scratch any other parts with the film. please design and manufacture products so that there is no chance of users touching the film after assembly, or if they do that, there is no chance of them injuring themselves. when cutting out the film, please ensure that the film shavings do not cause accidents. after use, please treat the leftover film and reel spacers as industrial waste. v dd v gg v ee v ss t rg
T6LD4 2006-09-20 11 restrictions on product use ? the information contained herein is subject to change without notice. 021023_d ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utiliz ing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handli ng guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc. 021023_a ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. 021023_b ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_q ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. 021023_c ? please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. toshiba assumes no liability for damage or losses occurrin g as a result of noncompliance with applicable laws and regulations. ? the products described in this document are subject to foreign exchange and foreign trade control laws. 021023_e

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