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  1. general description the 74lv374 is an octal d-type ?ip-?op featuring separate d-type inputs for each ?ip-?op and 3-state outputs for bus-oriented applications. a clock input (cp) and an output enable input ( oe) are common to all ?ip-?ops. the 74lv374 is a low-voltage si-gate cmos device and is pin and function compatible with 74hc374 and 74hct374. the eight ?ip-?ops will store the state of their individual d-inputs that meet the set-up and hold times requirements on the low to high cp transition. when oe is low, the contents of the eight ?ip-?ops is available at the outputs. when oe is high, the outputs go to the high-impedance off-state. operation of the oe input does not affect the state of the ?ip-?ops. 2. features n wide operating voltage: 1.0 v to 5.5 v n optimized for low voltage applications: 1.0 v to 3.6 v n accepts ttl input levels between v cc = 2.7 v and v cc = 3.6 v n typical output ground bounce < 0.8 v at v cc = 3.3 v and t amb = 25 c n typical high-level output voltage (v oh ) undershoot: > 2 v at v cc = 3.3 v and t amb =25 c n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n common 3-state output enable input n multiple package options n speci?ed from - 40 cto+85 c and from - 40 c to +125 c 3. ordering information 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state rev. 02 14 may 2009 product data sheet table 1. ordering information type number package temperature range name description version 74lv374 n - 40 c to +125 c dip20 plastic dual in-line package; 20 leads (300 mil) sot146-1 74lv374 d - 40 c to +125 c so20 plastic small outline package; 20 leads; body width 7.5 mm sot163-1 74lv374 db - 40 c to +125 c ssop20 plastic shrink small outline package; 20 leads; body width 5.3 mm sot339-1 74lv374 pw - 40 c to +125 c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 2 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 4. functional diagram fig 1. logic symbol fig 2. iec logic symbol mna891 d0 d1 d2 d3 d4 d5 d6 d7 oe cp q0 q1 q2 q3 q4 q5 q6 q7 11 1 19 16 15 12 9 6 5 2 18 17 14 13 8 7 4 3 mna196 19 16 15 12 9 6 5 11 c1 1 en 1d 2 18 17 14 13 8 7 4 3 fig 3. functional diagram mna892 3-state outputs ff1 to ff8 q0 q1 q2 q3 q4 q5 q6 q7 19 16 15 12 9 6 5 2 d0 d1 d2 d3 d4 d5 d6 d7 cp oe 18 11 1 17 14 13 8 7 4 3
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 3 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 5. pinning information 5.1 pinning 5.2 pin description fig 4. logic diagram mna893 q4 d4 q3 d3 q2 d2 q1 d1 q0 d0 d ff1 q cp cp d ff2 q cp d ff3 q cp d ff4 q cp d ff5 q cp d ff6 q cp d ff7 q cp d ff8 q cp oe q5 d5 q6 d6 q7 d7 fig 5. pin con?guration dip20, so20 fig 6. pin con?guration ssop20, tssop20 74lv374 oe v cc q0 q7 d0 d7 d1 d6 q1 q6 q2 q5 d2 d5 d3 d4 q3 q4 gnd cp 001aak107 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 74lv374 oe v cc q0 q7 d0 d7 d1 d6 q1 q6 q2 q5 d2 d5 d3 d4 q3 q4 gnd cp 001aak108 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 table 2. pin description symbol pin description oe 1 output enable input (active low) q0 to q7 2, 5, 6, 9, 12, 15, 16, 19 data output d0 to d7 3, 4, 7, 8, 13, 14, 17, 18 data input gnd 10 ground (0 v) cp 11 clock input (low to high; edge triggered) v cc 20 supply voltage
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 4 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 6. functional description [1] h = high voltage level h = high voltage level one set-up time prior to the low to high cp transition l = low voltage level l = low voltage level one set-up time prior to the low to high cp transition z = high-impedance off-state - = low to high clock transition 7. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for dip20 packages: above 70 c the value of p tot derates linearly with 12 mw/k. for so20 packages: above 70 c the value of p tot derates linearly with 8 mw/k. for (t)ssop20 packages: above 60 c the value of p tot derates linearly with 5.5 mw/k. table 3. function table [1] operating mode input internal ?ip-?op output oe cp dn qn load and read register l - lll l - hhh load register and disable outputs h - llz h - hhz table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7.0 v i ik input clamping current v i < - 0.5 v or v i >v cc + 0.5 v [1] - 20 ma i ok output clamping current v o < - 0.5 v or v o >v cc + 0.5 v [1] - 50 ma i o output current v o = - 0.5 v to (v cc + 0.5 v) - 35 ma i cc supply current - 70 ma i gnd ground current - 70 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [2] dip20 - 750 mw so20, ssop20 and tssop20 - 500 mw
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 5 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 8. recommended operating conditions [1] the static characteristics are guaranteed from v cc = 1.2 v to v cc = 5.5 v, but lv devices are guaranteed to function down to v cc = 1.0 v (with input levels gnd or v cc ). 9. static characteristics table 5. recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v cc supply voltage [1] 1.0 3.3 5.5 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 1.0 v to 2.0 v - - 500 ns/v v cc = 2.0 v to 2.7 v - - 200 ns/v v cc = 2.7 v to 3.6 v - - 100 ns/v v cc = 3.6 v to 5.5 v - - 50 ns/v table 6. static characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.2 v 0.9 - - 0.9 - v v cc = 2.0 v 1.4 - - 1.4 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v to 5.5 v 0.7v cc - - 0.7v cc -v v il low-level input voltage v cc = 1.2 v - - 0.3 - 0.3 v v cc = 2.0 v - - 0.6 - 0.6 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3v cc - 0.3v cc v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.2 v - 1.2 - - - v i o = - 100 m a; v cc = 2.0 v 1.8 2.0 - 1.8 - v i o = - 100 m a; v cc = 2.7 v 2.5 2.7 - 2.5 - v i o = - 100 m a; v cc = 3.0 v 2.8 3.0 - 2.8 - v i o = - 100 m a; v cc = 4.5 v 4.3 4.5 - 4.3 - v i o = - 8 ma; v cc = 3.0 v 2.4 2.82 - 2.2 - v i o = - 16 ma; v cc = 4.5 v 3.6 4.2 - 3.5 - v
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 6 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state [1] typical values are measured at t amb = 25 c. 10. dynamic characteristics v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc = 1.2 v - 0 - - - v i o = 100 m a; v cc = 2.0 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 2.7 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 3.0 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 4.5 v - 0 0.2 - 0.2 v i o = 8 ma; v cc = 3.0 v - 0.20 0.40 - 0.50 v i o = 16 ma; v cc = 4.5 v - 0.35 0.55 - 0.65 v i i input leakage current v i =v cc or gnd; v cc = 5.5 v - - 1.0 - 1.0 m a i oz off-state output current v i =v ih or v il ; v o =v cc or gnd; v cc = 5.5 v --5 - 10 m a i cc supply current v i = v cc or gnd; i o = 0 a; v cc = 5.5 v - - 20 - 160 m a d i cc additional supply current per input; v i = v cc - 0.6 v; v cc = 2.7 v to 3.6 v - - 500 - 850 m a c i input capacitance - 3.5 - - - pf table 6. static characteristics continued at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max table 7. dynamic characteristics voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 10 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay cp to qn; see figure 7 [2] v cc = 1.2 v - 90 - - - ns v cc = 2.0 v - 31 39 - 49 ns v cc = 2.7 v - 23 29 - 36 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -14- - -ns v cc = 3.0 v to 3.6 v [3] - 17 23 - 29 ns v cc = 4.5 v to 5.5 v - - 19 - 24 ns t en enable time oe to qn; see figure 8 [4] v cc = 1.2 v - 75 - - - ns v cc = 2.0 v - 26 34 - 43 ns v cc = 2.7 v - 19 25 - 31 ns v cc = 3.0 v to 3.6 v [3] - 14 20 - 25 ns v cc = 4.5 v to 5.5 v - - 17 - 21 ns
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 7 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state [1] typical values are measured at t amb =25 c. [2] t pd is the same as t plh and t phl . [3] typical value measured at v cc = 3.3 v. [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t phz and t plz . [6] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. t dis disable time oe to qn; figure 8 [5] v cc = 1.2 v - 80 - - - ns v cc = 2.0 v - 29 39 - 48 ns v cc = 2.7 v - 22 29 - 36 ns v cc = 3.0 v to 3.6 v [3] - 17 24 - 29 ns v cc = 4.5 v to 5.5 v [3] - - 20 - 24 ns t w pulse width cp, high or low; see figure 7 v cc = 2.0 v 34 12 - 41 - ns v cc = 2.7 v 25 9 - 30 - ns v cc = 3.0 v to 3.6 v [3] 20 7 - 24 - ns t su set-up time dn to cp; see figure 9 v cc = 1.2 v - 25 - - - ns v cc = 2.0 v 22 9 - 26 - ns v cc = 2.7 v 16 6 - 19 - ns v cc = 3.0 v to 3.6 v [3] 13 5 - 15 - ns t h hold time dn to cp; see figure 9 v cc = 1.2 v - - 10 - - - ns v cc = 2.0 v 5 - 3- 5 -ns v cc = 2.7 v 5 - 2- 5 -ns v cc = 3.0 v to 3.6 v [3] 5 - 2- 5 -ns f max maximum frequency see figure 7 v cc = 2.0 v 15 40 - 12 - mhz v cc = 2.7 v 19 58 - 16 - mhz v cc = 3.3 v; c l = 15 pf - 77 - - - mhz v cc = 3.0 v to 3.6 v [3] 24 70 - 20 - mhz c pd power dissipation capacitance c l = 50 pf; f i = 1 mhz; v i = gnd to v cc [6] 25 pf table 7. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 10 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 8 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 11. waveforms measurement points are given in t ab le 8 . v ol and v oh are typical output voltage levels that occur with the output load. fig 7. the clock (cp) to output (qn) propagation delays, the clock (cp) pulse width and the maximum clock pulse frequency mna894 cp input qn output t phl t plh t w 1/f max v m v oh v i gnd v ol v m measurement points are given in t ab le 8 . v ol and v oh are typical output voltage levels that occur with the output load. fig 8. enable and disable times mna644 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 9 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state measurement points are given in t ab le 8 . the shaded areas indicate when the input is permitted to change for predictable output performance. v ol and v oh are typical output voltage levels that occur with the output load. fig 9. the data set-up and hold times for the dn input to the cp input mna202 gnd gnd t h t h t su t su v m v m v m v i v oh v ol v i qn output cp input dn input table 8. measurement points supply voltage input output v cc v m v m v x v y < 2.7 v 0.5v cc 0.5v cc v ol + 0.3 v v oh - 0.3 v 2.7 v to 3.6 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v 3 4.5 v 0.5v cc 0.5v cc v ol + 0.3 v v oh - 0.3 v
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 10 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state test data is given in t ab le 9 . de?nitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 10. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 9. test data supply voltage input load v ext v cc v i t r , t f c l r l t phl , t plh t pzh , t phz t pzl , t plz < 2.7 v v cc 2.5 ns 50 pf 1 k w open gnd 2v cc 2.7 v to 3.6 v 2.7 v 2.5 ns 15 pf, 50 pf 1 k w open gnd 2v cc 3 4.5 v v cc 2.5 ns 50 pf 1 k w open gnd 2v cc
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 11 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 12. package outline fig 11. package outline sot146-1 (dip20) unit a max. 1 2 b 1 cd e e m h l references outline version european projection issue date iec jedec jeita mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot146-1 99-12-27 03-02-13 a min. a max. b z max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 6.40 6.22 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 2 4.2 0.51 3.2 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 0.25 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.078 0.17 0.02 0.13 sc-603 ms-001 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 20 1 11 10 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. (1) (1) (1) dip20: plastic dual in-line package; 20 leads (300 mil) sot146-1
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 12 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state fig 12. package outline sot163-1 (so20) unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec jeita mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 sot163-1 10 20 w m b p detail x z e 11 1 d y 0.25 075e04 ms-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale x q a a 1 a 2 h e l p q e c l v m a (a ) 3 a so20: plastic small outline package; 20 leads; body width 7.5 mm sot163-1 99-12-27 03-02-19
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 13 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state fig 13. package outline sot339-1 (ssop20) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p q (1) z y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 0.9 0.7 0.9 0.5 8 0 o o 0.13 1.25 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. 1.03 0.63 sot339-1 mo-150 99-12-27 03-02-19 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 110 20 11 y 0.25 pin 1 index 0 2.5 5 mm scale ssop20: plastic shrink small outline package; 20 leads; body width 5.3 mm sot339-1 a max. 2
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 14 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state fig 14. package outline sot360-1 (tssop20) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot360-1 mo-153 99-12-27 03-02-19 w m b p d z e 0.25 110 20 11 pin 1 index q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 a max. 1.1
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 15 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 13. abbreviations 14. revision history table 10. abbreviations acronym description dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 11. revision history document id release date data sheet status change notice supersedes 74lv374 _2 20090514 product data sheet - 74lv374 _1 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? quick reference data removed ? added type number 74lv374pw (tssop20 package) 74lv374 _1 19970320 product speci?cation - -
74lv374_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 14 may 2009 16 of 17 nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lv374 octal d-type ?ip-?op; positive edge-trigger; 3-state ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 14 may 2009 document identifier: 74lv374_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 16 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 contact information. . . . . . . . . . . . . . . . . . . . . 16 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17


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