ICS332 qtclock dual output clock mds 332 1 revision 111000 integrated circuit systems, inc. ?525 race street ?san jose ?a?5126?408) 295-9800tel ?www.icst.com advance information advance information ?packaged as 8 pin soic ?zero ppm synthesis error in many cases ?input crystal frequency from 5 to 27 mhz ?input clock frequency from 3 to 50 mhz ?two output clocks ?spread spectrum capability ?output clock frequencies up to 200 mhz ?duty cycle of 45/55 ?3.3 v operating voltage (consult ics for 5v) ?advanced, low power cmos process ?for one output clock (lowest jitter), use the ics331. for three output clocks, see the ics333. for more than three outputs, use the ics355. the ICS332 is a low cost frequency generator that is factory programmable. using phase-locked- loop (pll) techniques, the device uses a standard fundamental mode, inexpensive crystal or clock input to produce two output clocks. the chip has one select input that allows the selection of one of two different frequencies stored in memory. the device also has an power down feature that tri states the clock outputs and turns off the pll when the pdts pin is taken low. this data sheet is to be used with the one-page programming information for the complete specification on the device. block diagram description features 5-27 mhz crystal or clock x1/iclk x2 optional crystal capacitors clk2 crystal oscillator pll clock synthesis and control circuitry output buffer pdts (both outputs and pll) otp rom with pll divider values sel clk1 output buffer
ICS332 qtclock dual output clock mds 332 2 revision 111000 integrated circuit systems, inc. ?525 race street ?san jose ?a?5126?408) 295-9800tel ?www.icst.com advance information advance information pin assignment 1 8 2 3 4 7 6 5 x1/iclk vdd gnd clk1 x2 pdts sel clk2 number name type description 1 x1/iclk xi crystal connection. connect to an 5 to 27 mhz fundamental crystal or clock input. 2 vdd p connect to +3.3 v. 3 gnd p connect to ground. 4 clk1 o clock 1 output. can be same frequency as crystal, or a divide from the pll. 5 clk2 o cmos level clock output. weak internal pull-down when tri state. 6 sel i select pin for frequency selection on clk and ref. internal pull-up. 7 pdts i powers down entire chip, tri states clk output, when low. internal pull-up. 8 x2 xo crystal connection. connect to an 5 to 27 mhz fundamental crystal. float for clock. pin descriptions key: xi/xo = crystal connections, i = input, o = output, p = power supply connection external components / crystal selection the ICS332 requires a 0.01? decoupling capacitor to be connected between vdd and gnd. it must be connected close to the ICS332 to minimize lead inductance. no external power supply filtering is required for this device. a 33 w terminating resistor can be used next to each output pin. a parallel resonant, fundamental mode crystal should be used. crystal capacitors should be connected from each of the pins x1 and x2 to ground as shown in the block diagram on page 1. the value (in pf) of these crystal caps should be = (c l -6)*2, where c l is the crystal load capacitance in pf. these external capacitors are required for all applications. sel clk1 (mhz) clk2 (mhz) spread amount 0 tbd tbd tbd 1 tbd tbd tbd output select table the select pin can also be defined as a power down or tri state for a single clock.
ICS332 qtclock dual output clock mds 332 3 revision 111000 integrated circuit systems, inc. ?525 race street ?san jose ?a?5126?408) 295-9800tel ?www.icst.com advance information advance information parameter conditions minimum typical maximum units absolute maximum ratings (note 1) absolute maximum ratings (note 1) supply voltage, vdd referenced to gnd 7 v inputs referenced to gnd -0.5 vdd+0.5 v clock outputs referenced to gnd -0.5 vdd+0.5 v ambient operating temperature 0 70 ? soldering temperature max of 10 seconds 260 ? storage temperature -65 150 ? dc characteristics (vdd = 3.3v unless otherwise noted) dc characteristics (vdd = 3.3v unless otherwise noted) operating voltage, vdd 3.13 3.47 v input high voltage, vih pdts, sel 2 v input low voltage, vil pdts, sel 0.4 v input high voltage, vih iclk (vdd/2)+1 v input low voltage, vil iclk (vdd/2)-1 v output high voltage, voh, cmos high ioh=-8ma vdd-0.4 v output high voltage, voh ioh=-12ma 2.4 v output low voltage, vol iol=12ma 0.4 v idd operating supply current no load tbd ma short circuit current outputs ?0 ma on-chip pull-up resistor input pins 270 k w input capacitance input pins 7 pf ac characteristics (vdd = 3.3v unless otherwise noted) ac characteristics (vdd = 3.3v unless otherwise noted) input frequency, crystal input 5 27 mhz input frequency, clock input 3 50 mhz output frequency tbd 200 mhz output frequency synthesis error 0 ppm output clock rise time 0.8 to 2.0v 1 ns output clock fall time 2.0 to 0.8v 1 ns output clock duty cycle at vdd/2 45 49 to 51 55 % output enable time, pdts high to output on tbd ? output disable time, pdts low to tri state tbd ? absolute clock period jitter deviation from mean tbd ps one sigma clock period jitter tbd ps electrical specifications notes: 1. stresses beyond those listed under absolute maximum ratings could cause permanent damage to the device. prolonged exposure to levels above the operating limits but below the absolute maximums may affect device reliability. 2. typical values are at 25?.
ICS332 qtclock dual output clock mds 332 4 revision 111000 integrated circuit systems, inc. ?525 race street ?san jose ?a?5126?408) 295-9800tel ?www.icst.com advance information advance information while the information presented herein has been checked for both accuracy and reliability, ics assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. ordering information part/order number marking package temperature ICS332m-xx ICS332m 8 pin soic 0 to 70 ? ICS332m-xxt ICS332m 8 pin soic on tape and reel 0 to 70 ? 8 pin soic inches inches millimeters millimeters symbol min max min max a 0.0532 0.0688 1.35 1.75 a1 0.0040 0.0098 0.10 0.24 b 0.0130 0.0200 0.33 0.51 c 0.0075 0.0098 0.19 0.24 d 0.1890 0.1968 4.80 5.00 e 0.1497 0.1574 3.80 4.00 e .050 bsc .050 bsc 1.27 bsc 1.27 bsc h 0.2284 0.2440 5.80 6.20 h 0.0099 0.0195 0.25 0.50 l 0.0160 0.0500 0.41 1.27 package outline and package dimensions ( for current dimensional specifications, see jedec publication no. 95.) the -xx indicates a two-character programming code, which must be specified when ordering parts. b d e h e a1 c a h x 45 l index area 1
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