off-line power supply controller transformerless off-line power supply wide 100vdc to 400vdc allowable input range fixed 5vdc or adjustable low voltage output output sinks 200ma, sources 150ma into a mosfet gate uses low cost smd inductors short circuit protected optional isolation capability the ucc3888 controller is optimized for use as an off-line, low power, low voltage, regulated bias supply. the unique circuit topology utilized in this device can be visualized as two cascaded flyback converters, each operating in the discontinu- ous mode, both driven from a single external power switch. the significant benefit of this approach is the ability to achieve voltage conversion ratios as high as 400v to 2.7v with no transformer and low internal losses. the control algorithm utilized by the ucc3888 sets the switch on time inversely proportional to the input line voltage and sets the switch off time inversely propor- tional to the output voltage. this action is automatically controlled by an internal feedback loop and reference. the cascaded configuration allows a voltage conver- sion from 400v to 2.7v to be achieved with a switch duty cycle of 7.6%. this topol- ogy also offers inherent short circuit protection since as the output voltage falls to zero, the switch off time approaches infinity. the output voltage is set internally to 5v. it can be programmed for other output voltages with two external resistors. an isolated version can be achieved with this topology as described further in unitrode application note u-149. ucc1888 ucc2888 ucc3888 3/97 features description operation with reference to the application diagram below, when input voltage is first applied, the current through r on into t on is directed to v cc where it charges the external capacitor, c3, connected to v cc . as voltage builds on v cc , an internal undervol- tage lockout holds the circuit off and the output at drive low until v cc reaches 8.4v. at this time, drive goes high turning on the power switch, q1, and redirect- ing the current into t on to the timing capacitor, c t . c t charges to a fixed threshold with a current i chg =0.8 (v in - 4.5v)/r on . since drive will only be high for as long as c t charges, the power switch on time will be inversely proportional to line voltage. this provides a constant (line voltage) (switch on time) product. note: this device incorporates patented technology used under license from lambda electronics, inc. typical application udg-96013
ucc1888 ucc2888 ucc3888 operation (cont.) at the end of the on time, q1 is turned off and the current through r on is again diverted to v cc . thus the current through r on , which charges c t during the on time, con- tributes to supplying power to the chip during the off time. the power switch off time is controlled by the discharge of c t which, in turn, is programmed by the regulated out- put voltage. the relationship between c t discharge cur- rent, i dchg , and output voltage is illustrated as follows: region 1. when v out = 0, the off time is infinite. this feature provides inherent short circuit protec- tion. however, to ensure output voltage startup when the output is not a short, a high value resistor, r s , is placed in parallel with c t to establish a minimum switching frequency. region 2. as v out rises above approximately 0.7v to its regulated value, i dchg is defined by r off , and is equal to: i dchg = (v out - 0.7v) / r off as v out increases, i dchg increases reducing off time. the operating frequency increases and v out rises quickly to its regulated value. region 3. in this region, a transconductance amplifier re- duces i dchg in order to maintain a regulated v out . region 4. if v out should rise above its regulation range, i dchg falls to zero and the circuit returns to the minimum frequency established by r s and c t . the range of switching frequencies is established by r on , r off , r s , and c t as follows: frequency = 1/(t on + t off ) t on = r on c t 4.6 v/(v in - 4.5v) t off (max) = 1.4 r s c t regions 1 and 4 t off = r off c t 3.7v /(v out - 0.7v) region 2, excluding the effects of r s which have a minimal impact on t off . the above equations assume that v cc equals 9v. the voltage at t on increases from approximately 2.5v to 6.5v while c t is charging. to take this into account, v in is adjusted by 4.5v in the calculation of t on . the voltage at t off is approximately 0.7v. design example the ucc3888 regulates a 5 volt, 1 watt nonisolated dc output from ac inputs between 80 and 265 volts. in this ex- ample, the ic is programmed to deliver a maximum on time gate drive pulse width of 2.2 microseconds which occurs at 80 vac. the corresponding switching frequency is approximately 100khz at low line, and overall efficiency is ap- proximately 50%. additional design information is available in unitrode application note u-149. udg-96014 2
parameter test conditions min typ max units general v cc zener voltage i cc < 1.5ma 8.6 9.0 9.3 v startup current v out = 0 150 250 m a operating current i(v cc )v cc = v cc (zener) C 100mv, f = 150khz 1.2 2.5 ma under-voltage-lockout start threshold v out = 0 8.0 8.4 8.8 v minimum operating voltage after start v out = 0 6.0 6.3 6.6 v hysteresis v out = 0 1.8 v oscillator amplitude v cc = 9v 3.5 3.7 3.9 v c t to drive high propagation delay overdrive = 0.2v 100 200 ns c t to drive low propagation delay overdrive = 0.2v 50 100 ns driver vol i = 20ma, v cc = 9v 0.15 0.4 v i = 100ma, v cc = 9v 0.7 1.8 v voh i = - 20ma, v cc = 9v 8.5 8.8 v i = - 100ma, v cc = 9v 6.1 7.8 v rise time c load = 1nf 35 70 ns fall time c load = 1nf 30 60 ns line voltage detection charge coefficient: i chg / i(t on ) vct = 3v, drive = high, i(t on ) = 1ma 0.73 0.79 0.85 minimum line voltage for fault r on = 330k 60 80 100 v minimum current i(t on ) for fault r on = 330k 220 m a on time during fault c t = 150pf, v line = min - 1v 2 m s oscillator restart delay after fault 0.5 ms v out error amp v out regulated 5v (adj open) v cc = 9v, i dchg = i(t off )/2 4.5 5.0 5.5 v discharge ratio: i dchg / i(t off )i(t off ) = 50 m a 0.95 1.01 1.07 voltage at t off i(t off ) = 50 m a 0.6 0.95 1.3 v regulation gm (note 1) max i dchg = 50 m a2.4ma/v max i dchg = 125 m a 1.9 4.1 7.0 ma/v unless otherwise stated, these specifications hold for t a = 0 c to 70 c for the ucc3888, -40 c to +85 c for the ucc2888, and -55 c to +125 c for the ucc1888. no load at drive pin (c load =0). electrical characteristics dil-8, soic-8 (top view) n or j, d package connection diagram i cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8ma current into t on pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5ma voltage on v out pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20v current into t off pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 m a storage temperature . . . . . . . . . . . . . . . . . . . . -65 c to +150 c note: unless otherwise indicated, voltages are referenced to ground and currents are positive into, negative out of, the speci- fied terminals. absolute maximum ratings ucc1888 ucc2888 ucc3888 note 1: gm is defined as d i dchg d v out for the values of v out when v out is in regulation. the two points used to calculate gm are for i dchg at 65% and 35% of its maximum value. 3
adj: the adj pin is used to provide a 5v regulated sup- ply without additional external components. other output voltages can be obtained by connecting a resistor divider between v out , adj and gnd. use the formula v out = 2.5v r1 + r2 r2 where r1 is connected between v out and adj, and r2 is connected between adj and gnd. r1 || r2 should be less than 1k w to minimize the effect of the temperature coefficient of the internal 30k resistors which also connect to v out , adj, and gnd. see block diagram. c t (timing capacitor): the signal voltage at c t has a peak-to-peak swing of 3.7v for 9v v cc . as the voltage at c t crosses the oscillator upper threshold, drive goes low. as the voltage on c t crosses the oscillator lower threshold, drive goes high. drive: this output is a cmos stage capable of sinking 200ma peak and sourcing 150ma peak. the output volt- age swing is 0 to v cc . gnd (chip ground): all voltages are measured with re- spect to gnd. t off (regulated output control): t off sets the dis- charge current of the timing capacitor through an external resistor connected between v out and t off . t on (line voltage control): t on serves three functions. when c t is discharging (off time), the current through t on is routed to v cc. when c t is charging (on time), the current through t on is split 80% to set the c t charge time and 20% to sense minimum line voltage which oc- curs for a t on current of 220 m a. for a minimum line volt- age of 80v, r on is 330k w . the c t voltage slightly affects the value of the charge current during the on time. during this time, the voltage at the t on pin increases from 2.5v to 6.5v. v cc (chip supply voltage): the supply voltage of the device at pin v cc is internally clamped at 9v. the device needs an external supply, from a source such as the rec- tified ac line or derived from the switching circuit. pre- cautions must be taken to ensure that total i cc does not exceed 8ma. v out (regulated output): the v out pin is directly con- nected to the power supply output voltage. when v out is greater than v cc , v out bootstraps v cc . ucc1888 ucc2888 ucc3888 pin descriptions block diagram udg-96015 4
unitrode corporation 7 continental blvd. merrimack, nh 03054 tel. (603) 424-2410 fax (603) 424-3460 ucc1888 ucc2888 ucc3888 typical characteristics curves 5
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