Part Number Hot Search : 
N5255 50WQ10FN WM8232 TC2045 KK1776 DT54FCT M54585FP 060B2
Product Description
Full Text Search
 

To Download ICS9148F-60 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  

   general description features ics9148-60 block diagram pentium/pro tm system clock chip 9148-60 rev d 10/19/99 pin configuration 28 pin soic and ssop pentium is a trademark on intel corporation.   
            !  "#$$ %&   # $  
   "'   ( %)         "$ !*+  + #$$
$%  !*+ #$#,    + #$#,  -./  0 $' #$$
1#  1#%   ! $% "  ""  "$ " # $% $%  22   1# %  33  #$$  45 
% $    #  $% # '6 5%$    #%  %& #%&   78 
 5%$  $% "9- :#  ";<;6  =! 45  ' 22 '%5 5 % 22 $:   $ $ # $% "$ $ # 
$% 
 #  
 . :
63 7 45   22 $>%  #$$  "7 ()  ! 1#%   1# % #$  33  #$$  45    %   ' $   $& %& 1#
  %  $ $ # $%  : $&      #$# % #  '  (!*+  +) >  (+)  -./ (+)   (!*+  +)       :  ?! ground groups 09 @ # "#   09 @ -./3 8 8! 09! @ 2a?/ 2a (3,*) 09@ 092 @ 2a (3,) power groups +99 @ "#$$
 22  +99 @ -./3 8 8! +99! @ 2a?/ 2a (3,*) +99 @  +992 @ 2a (3,) +992@ ics reserves the right to make changes in the device data identified in this publication without further notice. ics advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
ics9148-60 pin descriptions r e b m u n n i pe m a n n i pe p y tn o i t p i r c s e d 11 xn i p a c d a o l f p 3 3 l a n r e t n i s a h , t u p n i l a t s y r c z h m 8 1 3 . 4 1 n i _ l a t x 2 x m o r f r o t s i s e r k c a b d e e f d n a 22 xt u of p 3 3 p a c d a o l l a n r e t n i s a h , t u p t u o l a t s y r c t u o _ l a t x 32 d n gr w ps t u p t u o i c p r o f d n u o r g 4f _ k l c i c pt u ot u p t u o i c p g n i n n u r e e r f 1 1 , 0 1 , 8 , 7 , 6 , 5) 5 : 0 ( k l c i c pt u ov 3 . 3 e l b i t a p m o c l t t . s t u p t u o k c o l c i c p 9 , 62 d d vr w pv 3 . 3 y l l a n i m o n , s t u p t u o k l c i c p r o f r e w o p 2 13 d d vr w pz h m 8 4 r o f r e o p 3 1z h m 8 4t u oz h m 8 4 @ t u p t u o k l c d e x i f 4 1z h m 8 4 _ 4 2t u o f i z h m 8 4 , p u r e w o p t a 1 = 7 2 n i p f i z h m 4 2 ; t u p t u o k l c d e x i f . p u r e w o p t a 0 = 7 2 n i p 5 13 d n gr w pz h m 8 4 r o f d n u o r g 6 1# 6 . 6 6 / 0 0 1 l e sn i z h m 6 . 6 6 r o z h m 0 0 1 g n i l b a n e r o f n i p t c e l e s ) z h m 3 . 3 3 s u o n o r h c n y s s y a w l a i c p ( z h m 6 . 6 6 = l , z h m 0 0 1 = h 7 1k l c sn ii r o f t u p n i k c o l c 2 t u p n i c 8 1a t a d sn ii r o f t u p n i a t a d 2 t u p n i c 9 1d n gr w p) 1 : 0 ( k l c u p c r o f d n u o r g 0 2d d vr w pe r o c l l p r o f r e w o p 2 2 , 1 2) 0 : 1 ( k l c u p ct u ov 5 . 2 y l l a n i m o n s t u p t u o k c o l c t s o h d n a u p c 3 2l d d vr w pv 5 . 2 y l l a n i m o n , s t u p t u o u p c r o f r e w o p 4 2c i p a o it u o. z h m 8 1 3 . 4 1 t u p t u o k c o l c c i p a o i 5 2l d d vr w pc i p a o i r o f r e w o p 6 21 d d vr w p. s t u p t u o f e r r o f r e w o p 7 2 0 f e rt u o. k c o l c z h m 8 1 3 . 4 1 # 8 4 l e sn iz h m 8 4 s i 4 1 n i p , w o l n e h w . p u r e w o p t a t u p n i d e h c t a l / t u p t u o 8 21 d n gr w p. 2 x , 1 x , s t u p t u o f e r r o f d n u o r g
ics9148-60  45 "   & %   >b %>     $    :  5   % 5  5  >%% %  ! !  ! 45    #$$ :
5%   & % 33a :%b   (   )  45 %$# % $%&  + &% >   45  :
   %  :% :
 * 4 % $ %
5   &    %  5 $  %   # 
c " c  5   45 :
 # :   % 1#%    '  5%&5 :
 '%5 5 :% %
 $  
 $  :
 5 :   45      7
 # 5' :> # :  :# 5  % %&  5 ' :
 45  %   #%  "$ 1#  % %#  d  $'6  &%     #   %%  5' general i 2 c serial interface information 45 % % % 5%  % #   % %%
'%5    $& %& /  % %   "      $& %& $$ % %  how to write:    (5)     :%    (5)   5 '%   9!   "   '% 
    (5)    #
     "   '% 
    (5)    #
:
 #  "   '% 
    (5)   %& % :
 (7
 3) 5#&5 :
 *  "   '% 
  5 :
         (5)    "$ :% how to read:    (5) '%   :%    (5)   5    9   "   '% 
  "   '%  5       (5)  '  &  "     % :
    
       (5) '%    '  &  5 :
    (5) '%   $ :%  controller (host) ics (slave/receiver) start bit address d2 (h) ac k dummy command code ac k dummy byte count ac k byte 0 ack byte 1 ac k byte 2 ac k byte 3 ack byte 4 ac k byte 5 ac k byte 6 ack stop bit how to write: controller (host) ics (slave/receiver) start bit address d3 (h) ac k byte coun t ack byte 0 ack byte 1 ack byte 2 ack byte 3 ack byte 4 ack byte 5 ack byte 6 ack stop bit how to read:
 ics9148-60 #$ e9 @ '6$ 9#  % $&%'&(% ' )      
    
   
  %$      
    
   
  t i b# n i pe m a n n i pd w p n o i t p i r c s e d 0 = e u l a v t i b1 = e u l a v t i b 7- - - ) d e v r e s e r () d e v r e s e r ( 6- - - ) d e v r e s e r () d e v r e s e r ( 5- - - ) d e v r e s e r () d e v r e s e r ( 4- - - ) d e v r e s e r () d e v r e s e r ( 3- - - ) d e v r e s e r () d e v r e s e r ( 21 21 k l c u p c1 d e l b a s i d ) w o l ( d e l b a n e 1- - 0 ) d e v r e s e r () d e v r e s e r ( 02 20 k l c u p c1 ) d e l b a s i d ( ) w o l ( d e l b a n e %*$      
    
   
  t i b# n i pe m a n n i pd w p n o i t p i r c s e d 0 = e u l a v t i b1 = e u l a v t i b 74 f _ k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 61 15 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 50 14 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 4- - 0 ) d e v r e s e r () d e v r e s e r ( 38 3 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 27 2 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 16 1 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e 05 0 k l c i c p1 d e l b a s i d ) w o l ( d e l b a n e serial bitmap % $ t i b# n i pe m a n n i pd w p n o i t p i r c s e d 0 = e u l a v t i b1 = e u l a v t i b 7- - 0 ) d e v r e s e r () d e v r e s e r ( 6- - 0 ) d e v r e s e r () d e v r e s e r ( 54 2c i p a o i1 d e l b a s i d ) w o l ( d e l b a n e 4- - 0 ) d e v r e s e r () d e v r e s e r ( 3- - 0 ) d e v r e s e r () d e v r e s e r ( 2- - 0 ) d e v r e s e r () d e v r e s e r ( 17 20 f e r1 ) d e l b a s i d ( ) w o l ( d e l b a n e 07 20 f e r1 ) d e l b a s i d ( ) w o l ( d e l b a n e    
    
   
                                   !           
    

  
       t i bn o i t p i r c s e dd w p 7 ) 5 2 . 0 ( d a e r p s r e t n e c : 0 ) % 6 . 0 - o t 0 ( d a e r p s n w o d : 1 0 4 : 6 t i b 4 5 6 u p ci c p 0 0 0 1 0 0 0 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 1 1 5 . 8 6 0 . 5 7 3 . 3 8 6 . 6 6 3 0 1 2 1 1 3 . 3 3 1 0 0 1 5 2 . 4 3 5 . 7 3 6 . 1 4 3 . 3 3 3 . 4 3 3 . 7 3 3 4 . 4 4 3 3 . 3 3 0 3 y b d e t c e l e s s i y c n e u q e r f - 0 # 6 . 6 6 / 0 0 1 l e s t c e l e s e r a w d r a h e v o b a 4 : 6 y b d e t c e l e s s i y c n e u q e r f - 1 0 2) d e v r e s e r ( 0 1 n o i t a r e p o l a m r o n - 0 0 e d o m t s e t - 1 0 n o m u r t c e r p s d a e r p s - 0 1 s t u p t u o l l a e t a t s i r t - 1 1 0 0
* ics9148-60 absolute maximum ratings "#$$
+ &                            <3 + 2&% $#                             09 =3* +  +  f3* +  :% $%& 4 $#             3g  f<3g "& 4 $#                       =d*g  f*3g " :> 5 % #  
    
# $   &  5 >%  45 %&   $ %% % 
 # % $%  5 >%   5  
5  %% :> 5 % % 5 $%  %  5 $ %% % %  % $ %  .h$#  : # h% # %&  %%  h  $%  
  $ #   %:% %
 electrical characteristics - input/supply/common output parameters t a = 0 - 70c; supply voltage v dd = v ddl = 3.3 v +/-5% (unless otherwise stated) parameter symbol conditions min typ max units input high voltage v ih 2v dd +0.3 v input low voltage v il v ss -0.3 0.8 v input high current i ih v in = v dd 0.1 5 a input low current i il1 v in = 0 v; inputs with no pull-up resistors -5 2.0 a input low current i il2 v in = 0 v; inputs with pull-up resistors -200 -100 a operating i dd3 .3 op6 6 c l = 0 pf; select @ 66mhz 60 170 ma supply current i dd3 .3 op10 0 c l = 0 pf; select @ 100mhz 66 170 ma power down supply current i dd3 .3 pd c l = 0 pf; with input address to vdd or gnd 3 650 a input frequency f i v dd = 3.3 v; 14.318 mhz c in logic inputs 5 pf c inx x1 & x2 pins 27 36 45 pf transition time 1 t trans to 1st crossing of target freq. 3 ms settling time 1 t s from 1st crossing to 1% target freq. 5 ms clk stabilization 1 t stab from v dd = 3.3 v to 1% target freq. 3 ms skew 1 t agp-pci1 v t = 1.5 v; 1 3.5 4 ns 1 guaranteed by design, not 100% tested in production. input capacitance 1 electrical characteristics - input/supply/common output parameters t a = 0 - 70c; supply voltage v dd = 3.3 v +/-5%, v ddl = 2.5 v +/-5% (unless otherwise stated) parameter symbol conditions min typ max units operating i dd2.5op66 c l = 0 pf; select @ 66.8 mhz 16 72 ma supply current i dd2.5op100 c l = 0 pf; select @ 100 mhz 23 100 ma power down su pp l y current i dd2.5pd c l = 0 pf; with input address to vdd or gnd 10 100 a t cpu-agp 00.51 ns t cpu-pci2 v t = 1.5 v; v tl = 1.25 v 1 2.6 4 ns 1 guaranteed by design, not 100% tested in production. skew 1
ics9148-60 electrical characteristics - cpuclk t a = 0 - 70c; v dd = 3.3 v +/-5%, v ddl = 2.5 v +/-5%; c l = 20 pf (unless otherwise stated) parameter symbol c onditions min typ max units output high voltage v oh2 b i oh = -12.0 ma 2 2.3 v output low voltage v ol2b i ol = 12 ma 0.2 0.4 v output high current i oh2 b v oh = 1.7 v -41 -19 ma output low current i ol2 b v ol = 0.7 v 19 37 ma rise time t r2b 1 v ol = 0.4 v, v oh = 2.0 v 1.25 1.6 ns fall time t f2b 1 v oh = 2.0 v, v ol = 0.4 v 1 1.6 ns duty cycle d t2b 1 v t = 1.25 v 454855% skew t sk2b 1 v t = 1.25 v 30 175 ps jitter, cycle-to-cycle t j c y c-c y c2b 1 v t = 1.25 v 150 250 ps jitter, one sigma t j 1s2b 1 v t = 1.25 v 40 150 ps jitter, absolute t jabs2b 1 v t = 1.25 v -250 140 +250 ps 1 guaranteed by design, not 100% tested in production. electrical characteristics - pciclk t a = 0 - 70c; v dd = v ddl = 3.3 v +/-5%; c l = 30 pf parameter symbol conditions min typ max units output high voltage v oh1 i oh = -11 ma 2.4 3.1 v output low voltage v ol1 i ol = 9.4 ma 0.1 0.4 v output high current i oh1 v oh = 2.0 v -62 -22 ma output low current i ol1 v ol = 0.8 v 16 57 ma rise time 1 t r1 v ol = 0.4 v, v oh = 2.4 v 1.5 2 ns fall time 1 t f1 v oh = 2.4 v, v ol = 0.4 v 1.1 2 ns duty cycle 1 d t1 v t = 1.5 v 455055% skew 1 t sk1 v t = 1.5 v 140 500 ps jitter, one sigma 1 t j 1s1 v t = 1.5 v 17 150 ps jitter, absolute 1 t jabs1 v t = 1.5 v -500 70 500 ps 1 guaranteed by design, not 100% tested in production.
+ ics9148-60 electrical characteristics - ioapic t a = 0 - 70c; v dd = 3.3 v +/-5%, v ddl = 2.5 v +/-5%; c l = 20 pf parameter symbol conditions min typ max units output high voltage v oh4b i oh = -18 ma 2 2.2 v output low voltage v ol4b i ol = 18 ma 0.33 0.4 v output high current i oh4b v oh = 1.7 v -41 -28 ma output low current i ol4b v ol = 0.7 v 29 37 ma ris e time 1 t r4b v ol = 0.4 v, v oh = 2.0 v 1.3 1.6 ns fall time 1 t f4 b v oh = 2.0 v, v ol = 0.4 v 1.1 1.6 ns duty cycle 1 d t4b v t = 1.25 v 45 54 55 % skew 1 t sk4b 1 v t = 1.25 v 60 250 ps jitter, one sigma 1 t j1s4b v t = 1.25 v 1 3 % jitter, absolute 1 t jabs4b v t = 1.25 v -5 5 % 1 guaranteed by design, not 100% tested in production. electrical characteristics - ref t a = 0 - 70c; v dd = v ddl = 3.3 v +/-5%; c l = 20 pf (unless otherwise stated) parameter symbol conditions min typ max units output high voltage v oh5 i oh = -12 ma 2.6 3.1 v output low voltage v ol5 i ol = 9 ma 0.17 0.4 v output high current i oh5 v oh = 2.0 v -44 -22 ma output low current i ol5 v ol = 0.8 v 29 42 ma ris e time 1 t r5 v ol = 0.4 v, v oh = 2.4 v 1.4 2 ns fall time 1 t f5 v oh = 2.4 v, v ol = 0.4 v 1.1 2 ns duty cycle 1 d t5 v t = 1.5 v 47 54 57 % jitter, one sigma 1 t j1s5 v t = 1.5 v 1 3 % jitter, absolute 1 t jabs5 v t = 1.5 v 35% 1 guaranteed by design, not 100% tested in production.
 ics9148-60 electrical characteristics - 48, 24 mhz t a = 0 - 70c; v dd = v ddl = 3.3 v +/-5%; c l = 20 pf (unless otherwise stated) parameter symbol conditions min typ max units output high voltage v oh5 i oh = -12 ma 2.6 3 v output low voltage v ol5 i ol = 9 ma 0.14 0.4 v output high current i oh5 v oh = 2.0 v -44 -22 ma output low current i ol5 v ol = 0.8 v 16 42 ma ris e time 1 t r5 v ol = 0.4 v, v oh = 2.4 v 1.2 4 ns fall time 1 t f5 v oh = 2.4 v, v ol = 0.4 v 1.2 4 ns duty cycle 1 d t5 v t = 1.5 v 45 52 55 % jitter, one sigma 1 t j1s5 v t = 1.5 v 1 3 % jitter, absolute 1 t jabs5 v t = 1.5 v 3 5 % 1 guaranteed by design, not 100% tested in production.
 ics9148-60 soic package t n u o c d a e ll 8 2 l n o i s n e m i d4 0 7 . 0 ordering information ics9148 y m-60 
 
    ,-) ('%    '%5 5 >%%) ! "
 #  
   .h $ , ics xxxx y m - ppp

ics9148-60 ssop package 9% % % % 5 ics reserves the right to make changes in the device data identified in this publication without further notice. ics advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. l o b m y s n o m m o c s n o i s n e m i d s n o i t a i r a v d . n i m. m o n. x a mn . n i m. m o n. x a m a8 6 0 . 03 7 0 . 08 7 0 . 04 19 3 2 . 04 4 2 . 09 4 2 . 0 1 a2 0 0 . 05 0 0 . 08 0 0 . 06 19 3 2 . 04 4 2 . 09 4 2 . 0 2 a6 6 0 . 08 6 0 . 00 7 0 . 00 28 7 2 . 04 8 2 . 09 8 2 . 0 b0 1 0 . 02 1 0 . 05 1 0 . 04 28 1 3 . 03 2 3 . 08 2 3 . 0 c4 0 0 . 06 0 0 . 08 0 0 . 08 27 9 3 . 02 0 4 . 07 0 4 . 0 ds n o i t a i r a v e e s0 37 9 3 . 02 0 4 . 07 0 4 . 0 e5 0 2 . 09 0 2 . 02 1 2 . 0 ec s b 6 5 2 0 . 0 h1 0 3 . 07 0 3 . 01 1 3 . 0 l5 2 0 . 00 3 0 . 07 3 0 . 0 ns n o i t a i r a v e e s 0 4 8 ordering information ics9148 y f-60 
 
   ,-) ('%    '%5 5 >%%) ! "
 #  
   .h $ , ics xxxx y f - ppp


▲Up To Search▲   

 
Price & Availability of ICS9148F-60

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X