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en 2 device operating temperature range package semiconductor technical data liquid crystal display and backlight integrated controller ordering information MC34270FB mc34271fb t a = 0 to +70 c qfp32 qfp32 fb suffix plastic package case 873 1 32 pin connections order this document by mc34270/d 32 ds 1 ref 1 fb 1 comp 1 ss 1 s 1 d 1 drv 1 ds 2 ref 2 fb 2 comp 2 ss 2 s 2 d 2 v b sw sync r gnd v t a v ref eld mode v v dd 3 v 4 v 2 v 1 v 0 1 en 1 31 30 29 27 28 26 25 124 23 22 21 20 19 18 17 2 3 4 5 6 7 8 9101112 14 13 15 16 1 motorola analog ic device data
the mc34270 and mc34271 are low power dual switching voltage regulators, specifically designed for handheld and laptop applications, to provide several regulated output voltages using a minimum of external parts. two uncommitted switching regulators feature a very low standby bias current of 5.0 m a, and an operating current of 7.0 ma capable of supplying output currents in excess of 200 ma. both devices have three additional features. the first is an eld output that can be used to drive a backlight or a liquid crystal display. the eld output frequency is the clock divided by 256. the second feature allows four additional output bias voltages, in specific proportions to v b , one of the switching regulated output voltages. it allows use of mixed logic circuitry and provides a voltage bias for nchannel load control mosfets . the third feature is an enable input that allows a logic level signal to turnaoffo or turnaono both switching regulators. due to the low bias current specifications, these devices are ideally suited for battery powered computer, consumer, and industrial equipment where an extension of useful battery life is desirable. mc34270 and mc34271 features: ? low standby bias current of 5.0 m a ? uncommitted switching regulators allow both positive and negative supply voltages ? logic enable allows microprocessor control of all outputs ? synchronizable to external clock ? mode commandable for eld and lcd interface ? frequency synchronizable ? auxiliary output bias voltages enable load control via nchannel fets mosfet is a trademark of motorola, inc. maximum ratings (t a = 25 c, unless otherwise noted.) rating symbol value unit input voltage v dd 16 vdc power dissipation and thermal characteristics maximum power dissipation p d 1.43 w case 873 thermal resistance, junctiontoambient r q ja 100 c/w thermal resistance, junctiontocase r q jc 60 c/w output #1 and #2 switch current i sl & i sb 500 ma output #1 and #2 aoffostate voltage v sl 60 vdc feedback enable mosfets aoffostate voltage v lf 20 vdc operating junction temperature t j 125 c operating ambient temperature t a 0 to +70 c storage temperature range t stg 55 to +150 c ? motorola, inc. 1996 rev 1
mc34270 mc34271 2 motorola analog ic device data representative block diagram this device contains 350 active transistors. v in d 1 s 1 sw 1 sync drv 1 en 1 eld mode r t v ref 1.25 v ref 1 fb 1 v dd comp 1 osc d 2 s 2 v b v 0 v 1 v 2 v 3 v 4 ref 2 fb 2 comp 2 v a = 5.0 v gnd bias v b v 2 v 3 v 4 16 15 14 13 12 19 18 17 10 11 9 6 7 32 26 8 31 30 27 2 3 4 23 22 21 28 29 on/off from dac 2 v 1 v 0 bias output buffers v b 25 m p control el control el panel v in en 2 v dd circuit #1 pwm circuit #2 pwm eld en v ref v dd
mc34270 mc34271 3 motorola analog ic device data electrical characteristics (v dd = 6.0 v, for typical values t a = low to high [note 1], for min/max values t a is the operating ambient temperature range that applies, unless otherwise noted.) characteristic symbol min typ max unit reference section reference voltage (t j = 25 c) v ref 1.225 1.250 1.275 v line regulation (v dd = 5.0 v to 12.5 v) reg line 2.0 10 mv load regulation (i o = 0 to 120 m a) reg load 2.0 10 mv total variation (line, load and temperature) v ref 1.215 1.285 v error amplifiers input offset voltage (v cm = 1.25 v) v io 1.0 10 mv input bias current (v cm = 1.25 v) i ib 120 600 na open loop voltage gain (v cm = 1.25 v, v comp = 2.0 v) a vol 80 100 db output voltage swing v high state (i oh = 100 m a) ve oh v a 1.5 4.0 5.5 low state (i ol = 100 m a) ve ol 0 1.0 bias voltage voltage (v dd = 5.0 v to 12.5 v, i o = 0) v a 4.6 5.0 5.4 v oscillator and pwm sections total frequency variation over line and temperature f osc khz v dd = 5.0 v to 10 v, t a = 0 to 70 c, r t = 169 k 90 115 140 duty cycle at each output % maximum dc max 92 95 minimum dc min 0 sync inpu t input resistance (v sync = 3.5 v) r sync 25 50 100 k w minimum sync pulse width t p 1.0 m s output mosfets output voltage aonostate (i sink = 200 ma) v ol 150 250 mv output current aoffostate (v oh = 40 v) i oh 0.1 1.0 m a rise and fall times t r , t f 50 ns el discharge output (eld) and drv 1 output voltage aonostate (i sink = 100 m a) v ol 30 100 mv output voltage aonostate (i sink = 50 ma) v ol 2.0 2.5 v output voltage aoffostate (i source = 100 m a) v oh v dd 0.5 5.9 v output voltage aoffostate (i source = 50 ma) v oh v dd 3.5 3.3 v feedback enable switches (ds 1 , ds 2 ) output voltage alowostate (i sink = 1.0 ma) vfe ol 10 100 mv output current aoffostate (v oh = 12.5 v) ife oh 0.6 1.0 m a switched v dd output (sw 1 ) output voltage v switch aono (en 1 = 1, i source = 100 m a) vsw oh 5.5 5.9 6.0 switch aoffo (en 1 = 0, i sink = 100 m a) vsw ol 0 0.1 0.2 auxiliary voltage outputs v 0 enable switch aonoresistance: v b to v 0 rds 0 2.0 10 w aoffostate leakage current (v b = 10 v) i lkg 0 0.1 2.0 m a v 0 voltage (v b = 30 v, i source = 0 ma) v 0 29.5 29.9 30 v v 0 resistance (i source = 4.0 ma) r 0 20 40 60 w note: 1. low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
mc34270 mc34271 4 motorola analog ic device data electrical characteristics (continued) (v dd = 6.0 v, for typical values t a = low to high [note 1], for min/max values t a is the operating ambient temperature range that applies, unless otherwise noted.) characteristic unit max typ min symbol auxiliary voltage outputs v 1 , v 2 , v 3 , v 4 outputs 1v 1 /v 0 ratio: mc34270 0.0565 0.0580 0.0595 mc34271 0.0500 0.0520 0.0535 1v 2 /v 0 ratio: mc34270 0.1135 0.1160 0.1185 mc34271 0.1010 0.1035 0.1065 v 3 /v 0 ratio: mc34270 0.1135 0.1160 0.1185 mc34271 0.1010 0.1035 0.1065 v 4/ v 0 ratio: mc34270 0.0565 0.0580 0.0595 mc34271 0.0500 0.0520 0.0535 output resistance (i source = 4.0 ma) r o 20 40 60 w output short circuit current i ss 5.0 10 20 ma logic inputs (en 1 , en 2 , mode) input low state v il 0 0.8 v input high state v ih 2.0 6.0 v input impedance r in 25 50 100 k w soft start control (ss 1 ,ss 2 ) charge current (capacitor voltage = 1.0 v to 4.0 v ) i chg 0.5 1.0 2.5 m a discharge current (capacitor voltage = 1.0 v) i dschg 250 650 m a total supply current v dd current v dd = 6.0 v i cc 2.0 5.0 m a standby mode (en 1 = en 2 = 0) v dd = 16 v 3.0 15 v dd current i cc 0.7 3.0 ma backlight aono (en 1 = 1; en 2 = 0) v dd current i cc 0.9 2.0 ma lcd aono (no inductor) (en 1 = 0; en 2 = 1) v b current (v 0 = 35 v) i o 1.2 3.0 ma note: 1. low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 10 100 1.5 1.0 a vol , open loop voltage gain (db) f, frequency (hz) dc, switch output duty cycle figure 1. switch output duty cycle versus compensation voltage v comp , compensation voltage (v) figure 2. error amp open loop gain and phase versus frequency 0.6 0.4 0.2 0 0.8 80 60 40 20 0 20 2.0 2.5 3.0 3.5 4.0 4.5 100 1.0 k 10 k 100 k 1000 k q , excess phase ( ) 90 120 150 180 v dd = 6.0 v t a = 25 c v dd = 6.0 v v comp = 2.5 v r l = open t a = 25 c 0 30 60 gain phase
mc34270 mc34271 5 motorola analog ic device data 0 0 2.0 2.5 0 0.16 0 0 v sat , switch output source saturation (v) i source , switch output current (ma) quiescent current (ma) v dd , supply voltage (v) fet drain voltage (v) i d , drain current (ma) output voltage drop (mv) i, current draw (ma) figure 3. reference voltage change versus reference current figure 4. quiescent current versus supply voltage figure 5. fet drain voltage versus sink current figure 6. eld and drv 1 switch output source and sink saturation versus current v dd = 6.0 v t a = 25 c v dd = 6.0 v t a = 25 c v dd source saturation v ref v a en 1 and en 2 = 1 en 1 = 1 and en 2 = 0 r t = 169 k no loading t a = 25 c standby current en 1 and en 2 = 0 sink saturation 1.5 2.0 1.0 0.5 0 5.0 10 15 20 25 30 0.12 0.08 0.04 1.0 2.0 3.0 30 60 15 45 50 150 100 200 1.0 2.0 3.0 4.0 5.0 4.0 6.0 8.0 10 12 16 18 2.0 2.2 v sat , switch output sink saturation (v) m standby supply current ( a) 1.4 1.8 1.0 0.6 0.2 1.5 1.0 0.5 14 0 4.0 0 v dd = 6.0 v t a = 25 c t a , ambient temperature ( c) 0 8.0 0 0.30 oscillator frequency change (khz) voltage variation (v) figure 7. v ref and v a variation versus temperature t a , ambient temperature ( c) figure 8. oscillator frequency variation versus temperature 0.25 0.20 0.15 0.10 0.05 0 0.05 0.10 6.0 4.0 2.0 0 2.0 4.0 6.0 8.0 10 20 30 40 50 60 70 10 20 30 40 50 60 70 v dd = 6.0 v r t = 169 k v dd = 6.0 v v ref v a
mc34270 mc34271 6 motorola analog ic device data v dd level (v) 0 0 1000 reference voltage (v) frequency (khz) figure 9. frequency versus timing timing resistance (k w , s) figure 10. v a , v ref versus v dd 100 10 5.0 4.0 3.0 2.0 1.0 0 100 1000 1.0 2.0 3.0 4.0 5.0 6.0 v dd = 6.0 v t a = 25 c r t = 169 k t a = 25 c v a v ref operating description the mc34270 and mc34271 series are monolithic, fixed frequency power switching regulators specifically designed for dc to dc converter and battery powered applications. these devices operate as fixed frequency, voltage mode regulators containing all the active functions required to directly implement stepup, stepdown and voltage inverting converters with a minimum number of external components. potential markets include battery powered, handheld, automotive, computer, industrial and cost sensitive consumer products. a description of each section is given below with the representative block diagram shown in figure 9. oscillator the oscillator frequency is programmed by resistor r t . the charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the switch outputs. during the fall time of the internal sawtooth waveform, the oscillator generates an internal blanking pulse that holds the inverting input of the and gates high, disabling the output switching mosfets. the internal sawtooth waveform has a nominal peak voltage of 3.3 v and a valley voltage of 1.7 v. pulse width modulators both pulse width modulators consist of a comparator with the oscillator ramp voltage applied to the noninverting input, while the error amplifier output is applied to the inverting input. a third input to the comparator has a 0.5 ma typical current source that can be used to implement soft start. output switch conduction is initiated when the ramp waveform is discharged to the valley voltage. as the ramp voltage increases to a voltage that exceeds the error amplifier output, the latch resets, terminating output mosfet conduction for the duration of the oscillator ramp. this pwm/latch combination prevents multiple output pulses during a given oscillator cycle. each pwm circuit is enabled by a logic input. when disabled, the entire block is turned off, drawing only leakage current from the power source. shared circuits, like the reference and oscillator, can be activated by either en 1 or en 2 . circuit #1 has an eld output which may be used to drive an lcd or backlight. its output frequency is the oscillator frequency divided by 1024. error amplifiers and reference each error amplifier is provided with access to both inverting and noninverting inputs, and the output. the error amplifiers' common mode input range is 0 to 2.5 v. the amplifiers have a minimum dc voltage gain of 60 db. the 1.25 v reference has an accuracy of 4.0% at room temperature. external loop compensation is required for converter stability. a simple lowpass filter is formed by connecting a resistive divider from the output to the error amplifier inverting input, and a series resistorcapacitor from the error amplifier output also to the to the inverting input. the step down converter is easiest to compensate for stability. the stepup and voltage inverting configurations, when operated as continuous conduction boost or flyback converters, are more difficult to compensate, and may require a lower loop design bandwidth. mosfet switch outputs the output mosfets are designed to switch a maximum of 60 v, with a peak drain current capability of 500 ma. in circuit #1 an additional drv 1 output is provided for interfacing with an external mosfet.the gates of the mosfets are held low when the circuit is disabled. auxiliary output voltages output voltages v 0 through v 4 are provided for use as references or bias voltages. v 0 is the circuit #2 output voltage, when an internal fet switch is activated. the other auxiliary output voltages are proportional to v b . the amplifiers for v 1 and v 2 are powered from v 0 , while the amplifiers for v 3 and v 4 are powered from v dd .
mc34270 mc34271 7 motorola analog ic device data figure 11. representative block diagram electroluminescent backlight configuration en r s q v dd d 1 s 1 ds 1 sw 1 ? ? ? ? sync drv 1 en 1 eld mode r s q r t ss 1 v ref 1.25 v ref 1 fb 1 circuit #1 bias supply v dd v dd comp 1 en osc d 2 s 2 v b v 0 v 1 v 2 v 3 v 4 v dd circuit #2 bias supply ref 2 fb 2 comp 2 ss 2 ds 2 en 2 v a gnd bias v b 6.0 v to 30 v v 2 v 3 v 4 v dd2 v dd2 v dd2 169 k 16 15 14 13 12 19 18 17 10 11 9 6 7 32 1 26 8 31 30 27 2 3 4 5 23 22 21 20 24 25 28 29 el panel brightness aon/offo lcd display dac 2 n ?? ? ? v 1 v 0 v b
mc34270 mc34271 8 motorola analog ic device data figure 12. auxiliary supply configuration en r s q v dd 5.0 v to 16 v d 1 s 1 ds 1 sw 1 ? ? ? ? sync drv 1 en 1 eld mode r s q r t ss 1 v ref 1.25 v ref 1 fb 1 circuit #1 bias supply v dd v dd comp 1 en osc d 2 s 2 v b v 0 v 1 v 2 v 3 v 4 v dd circuit #2 bias supply ref 2 fb 2 comp 2 ss 2 ds 2 en 2 v a gnd bias v b 6.0 v to 30 v v 2 v 3 v 4 v dd2 v dd2 v dd2 169 k 16 15 14 13 12 19 18 17 10 11 9 6 7 32 1 26 8 31 30 27 2 3 4 5 23 22 21 20 24 25 28 29 lcd display 2 n ? ?? ? v 1 v 0 lcd contrast 27 v v b 12 v 12 v dac
mc34270 mc34271 9 motorola analog ic device data figure 13. mc34270 incandescent backlight configuration en r s q v in 5.0 v to 16 v d 1 s 1 ds 1 sw 1 ? ? ? ? sync drv 1 en 1 eld mode r s q r t ss 1 v ref 1.25 v ref 1 fb 1 circuit #1 bias supply v dd v dd comp 1 en osc d 2 s 2 v b v 0 v 1 v 2 v 3 v 4 v dd circuit #2 bias supply ref 2 fb 2 comp 2 ss 2 ds 2 en 2 v a gnd bias 6.0 v to 30 v v 2 v 3 v 4 v dd2 v dd2 v dd2 169 k 16 15 14 13 12 19 18 17 10 11 9 6 7 32 1 26 8 31 30 27 2 3 4 5 23 22 21 20 24 25 28 29 lcd display 2 n ? ? ? ? v 1 v 0 lcd contrast v ref ds 1 1 0.1 m f mc34270 dac
mc34270 mc34271 10 motorola analog ic device data figure 14. el panel drive circuit r s q v in 6.0 v d 1 s 1 sw 1 ?? ? ? ? ? sync drv 1 en 1 eld mode r s q r t ss 1 v ref 1.25 v ref 1 fb 1 circuit #1 bias supply v dd v dd comp 1 en osc d 2 s 2 v b v 0 v 1 v 2 v 3 v 4 v dd circuit #2 bias supply ref 2 fb 2 comp 2 ss 2 ds 2 en 2 v a gnd bias v b v 2 v 3 v 4 v dd2 v dd2 v dd2 160 k 16 15 14 13 12 19 18 17 10 11 9 6 7 32 26 8 31 30 27 2 3 4 5 23 22 21 20 24 25 28 29 lcd display 2 n ? ? ? v 1 v 0 v ref ds 1 1 mc34270 or mc34271 dac v b el panel 2.2 m 8.25 k 9.1 k 0.1 m f 4.3 m 15 pf 0.1 m f 8.2 k 1.0 k 400 hz 0.1 m f 10 2.2 k mtp3055el mr856 10 m f 4t #36 4t #36 65 34 mr856 8 7 0.22 m f 200 v 120t #36 2 1 15 k 1.0 k notes: :1. transformer information tdk core # pc40eem12.7/13.7z bobbin # bepc10118g 2 mil gap. l p = 1.6 m hy. 2. el panel: durel ? 3/sl orange + mpsa44 120t #36 10 k 1.0 k 22 k mmbt2907
mc34270 mc34271 11 motorola analog ic device data fb suffix plastic package case 87301 0.274 0.274 0.055 0.010 0.051 0.010 0.005 0.013 6 0.005 5 0.006 0.348 0.006 5 0.348 min min max max millimeters inches dim 7.10 7.10 1.60 0.373 1.50 0.20 0.197 0.57 8 0.135 10 0.25 9.15 0.25 11 9.15 6.95 6.95 1.40 0.273 1.30 0.273 0.119 0.33 6 0.119 5 0.15 8.85 0.15 5 8.85 0.031 bsc 0.220 ref 0.016 bsc 0.80 bsc 5.6 ref 0.40 bsc a b c d e f g h j k l m n p q r s t u v x 0.280 0.280 0.063 0.015 0.059 0.008 0.008 0.022 8 0.005 10 0.010 0.360 0.010 11 0.360 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane h is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums a, b and d to be determined at datum plane h. 5. dimensions s and v to be determined at seating plane c. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane h. 7. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the d dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. h datum plane x k detail c u t r q p detail a a,b,d b b j base metal d n section bb view rotated 90 clockwise f h datum plane h 32 25 24 17 16 9 8 1 v b b l a l d a s detail a c seating plane c e detail c m m g 1.0 ref 0.039 ref c 0.20 (0.008) ab d s s m 0.01 (0.004) h 0.20 (0.008) ab d s s m c 0.20 (0.008) ab d ab 0.05 (0.002) s s m 0.20 (0.008) c ab d 0.05 (0.002) ab m s s 0.20 (0.008) h ab d m s s outline dimensions
mc34270 mc34271 12 motorola analog ic device data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, 6f seibubutsuryucenter, p.o. box 20912; phoenix, arizona 85036. 18004412447 or 6023035454 3142 tatsumi kotoku, tokyo 135, japan. 038135218315 mfax : rmfax0@email.sps.mot.com touchtone 6 022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, internet : http://designnet.com 51 ting kok r oad, tai po, n.t., hong kong. 85226629298 mc34270/d
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