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  bts 824r infineon technologies ag page 1 of 14 2001-08-23 smart high-side power switch four channels: 4 x 90m ? ? ? ? status feedback product summary package operating voltage v bb 5.5...40v active channels one four parallel on-state resistance r on 90m ? 22.5m ? nominal load current i l(nom) 4.7a 19.0a current limitation i l(scr) 12a 12a general description ? n channel vertical power mosfet with charge pump, ground referenced cmos compatible input and diagnostic feedback, monolithically integrated in smart sipmos ? technology. ? fully protected by embedded protection functions applications ? c compatible high-side power switch with diagnostic feedback for 12v and 24v grounded loads ? all types of resistive, inductive and capacitve loads ? most suitable for loads with high inrush currents, so as lamps ? replaces electromechanical relays, fuses and discrete circuits basic functions ? very low standby current ? cmos compatible input ? improved electromagnetic compatibility (emc) ? fast demagnetization of inductive loads ? stable behaviour at undervoltage ? wide operating voltage range ? logic ground independent from load ground protection functions block diagram ? short circuit protection ? overload protection ? current limitation ? thermal shutdown ? overvoltage protection (including load dump) with external resistor ? reverse battery protection with external resistor ? loss of ground and loss of v bb protection ? electrostatic discharge protection (esd) diagnostic function ? diagnostic feedback with open drain output ? open load detection in off-state ? feedback of thermal shutdown in on-state vbb logic channel 3 channel 4 gnd load 1 load 2 logic channel 1 channel 2 load 4 load 3 in1 st1/2 in2 in3 st3/4 in4 power so 20
bts 824r infineon technologies ag page 2 of 14 2001-08-23 functional diagram . channel 1 out1 overvoltage p rotection logic internal volta g e su pp l y esd temperature sensor clamp for inductive load gate control + charge pump current limit reverse battery protection open load detection control and protection circuit of channel 2 control and protection circuit of channel 3 control and protection circuit of channel 4 in1 vbb gnd1/2 in2 in3 in4 st3/4 out2 out3 out4 load gnd3/4 st1/2
bts 824r infineon technologies ag page 3 of 14 2001-08-23 pin definitions and functions pin symbol function 1,10, 11,20 v bb positive power supply voltage . design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance 3in1 5in2 7in3 9in4 input 1,2, 3,4 activates channel 1,2,3,4 in case of logic high signal 18,19 out1 16,17 out2 14,15 out3 12,13 out4 output 1,2,3,4 protected high-side power output of channel 1,23,4. design the wiring for the max. short circuit current 4st1/2 diagnostic feedback 1/2,3/4 of channel 1,2,3,4 8 st3/4 open drain, low on failure 2 gnd1/2 ground of chip 1 (channel 1,2) 6 gnd3/4 ground of chip 2 (channel 3,4) pin configuration (top view) v bb 1 ? 20 v bb gnd1/2 2 19 out1 in1 3 18 out1 st1/2 4 17 out2 in2 5 16 out2 gnd3/4 6 15 out3 in3 7 14 out3 st3/4 8 13 out4 in4 9 12 out4 v bb 10 11 v bb
bts 824r infineon technologies ag page 4 of 14 2001-08-23 maximum ratings at t j = 25c unless otherwise specified parameter symbol values unit supply voltage (overvoltage protection see page 6) v bb 43 v supply voltage for full short circuit protection t j,start = -40 ...+150c v bb 36 v load current (short-circuit current, see page 6) i l self-limited a load dump protection 1 ) v loaddump = v a + v s , v a = 13.5 v r i 2 ) = 2 ? , t d = 400 ms; in = low or high, each channel loaded with r l = 13.5 ? , v load dump 3 ) 60 v operating temperature range storage temperature range t j t stg -40 ...+150 -55 ...+150 c power dissipation (dc) 4) t a = 25c: (all channels active) t a = 85c: p tot 3.6 1.9 w maximal switchable inductance, single pulse v bb = 12v, t j,start = 150c 4) , see diagrams on page 10 i l = 4.7 a, e as = 120 mj, 0 ? one channel: i l = 9.5 a, e as = 230 mj, 0 ? two parallel channels: i l = 19.0 a, e as = 450 mj, 0 ? four parallel channels: z l 7.9 3.7 1.8 mh electrostatic discharge capability (esd) in: (human body model) st: out to all other pins shorted: acc. mil-std883d, method 3015.7 and esd assn. std. s5.1-1993 r=1.5k ? ; c=100pf v esd 1.0 4.0 8.0 kv input voltage (dc) see internal circuit diagram page 9 v in -10 ... +16 v current through input pin (dc) current through status pin (dc) i in i st 0.3 0.3 ma 1 ) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins (a 150 ? resistor for the gnd connection is recommended. 2) r i = internal resistance of the load dump test pulse generator 3) v load dump is setup without the dut connected to the generator per iso 7637-1 and din 40839 4 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m thick) copper area for v bb connection. pcb is vertical without blown air. see page 14
bts 824r infineon technologies ag page 5 of 14 2001-08-23 thermal characteristics parameter and conditions symbol values unit min typ max thermal resistance junction - soldering point 5)6) each channel: r thjs -- -- 5 k/w junction ? ambient 5) @ 6 cm 2 cooling area one channel active: all channels active: r thja -- -- 42 34 -- -- electrical characteristics parameter and conditions, each of the four channels symbol values unit at t j = -40...+150c, v bb = 12 v unless otherwise specified min typ max load switching capabilities and characteristics on-state resistance (v bb to out); i l = 2 a each channel, t j = 25c: t j = 150c: two parallel channels, t j = 25c: four parallel channels, t j = 25c: see diagram, page 11 r on -- -- -- -- 70 140 35 17.5 90 180 45 22.5 m ? nominal load current one channel active: two parallel channels active: four parallel channels active: device on pcb 5) , t a = 85c, t j 150c i l(nom) 3.7 7.4 14.8 4.7 9.5 19.0 -- -- -- a output current while gnd disconnected or pulled up; v bb = 32 v, v in = 0, see diagram page 9; (not tested specified by design) i l(gndhigh) -- -- 2 ma turn-on time 7 ) in to 90% v out : turn-off time in to 10% v out : r l = 12 ? t on t off -- -- 100 100 250 270 s slew rate on 7 ) 10 to 30% v out , r l = 12 ? :d v /dt on 0.2 -- 1.0 v/ s slew rate off 7 ) 70 to 40% v out , r l = 12 ? :-d v /dt off 0.2 -- 1.1 v/ s 5 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m thick) copper area for v bb connection. pcb is vertical without blown air. see page 14 6 ) soldering point: upper side of solder edge of device pin 15. see page 14 7 ) see timing diagram on page 12.
bts 824r infineon technologies ag page 6 of 14 2001-08-23 parameter and conditions, each of the four channels symbol values unit at t j = -40...+150 c, v bb = 12 v unless otherwise specified min typ max operating parameters operating voltage v bb(on) 5.5 -- 40 v undervoltage switch off 8 ) t j =-40 c...25 c : v bb(u so) -- -- 4.5 v not tested, specified by design: t j =125 c: -- -- 4.5 overvolta g e protection 9 ) i bb = 40 ma v bb(az) 41 47 52 v standb y current 10 ) t j =-40 c...25 c : v in = 0; see diagram page 11 t j =150 c: i bb(off) -- -- 9 -- 20 30 a not tested, specified by design: t j =125 c: -- 20 off-state output current (included in i bb(off) ) v in = 0; each channel i l(off) -- 1 5 a operating current 11) , v in = 5v, i gnd = i gnd1 + i gnd2 , one channel on: all channels on: i gnd -- -- 0.6 2.4 1.2 4.8 ma protection functions 12 ) current limit, v out = 0v , (see timing diagrams, page 12) t j =-40 c: t j =25 c: t j =+150 c: i l(lim) -- -- 9 -- 15 -- 23 -- -- a repetitive short circuit current limit, t j = t j t each channel two,three or four parallel channels (see timing diagrams, page 12) i l(scr) -- -- 12 12 -- -- a initial short circuit shutdown time t j, start =25 c: v out = 0v (see timing diagrams on page 12) t off(sc) -- 2 -- ms output clamp (inductive load switch off) 13) at v on(cl) = v bb - v out , i l = 40 ma v on(cl) 41 47 52 v thermal overload trip temperature t jt 150 -- -- c thermal hysteresis ? t jt -- 10 -- k 8) is the voltage, where the device doesn t change it s switching condition for 15ms after the supply voltage falling below vbb(on) 9 ) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins (a 150 ? resistor for the gnd connection is recommended). see also v on(cl) in table of protection functions and circuit diagram on page 9. 10 ) measured with load; for the whole device; all channels off 11 ) add i st , if i st > 0 12 ) integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as "outside" normal operating range. protection functions are not designed for continuous repetitive operation. 13 ) if channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest v on(cl)
bts 824r infineon technologies ag page 7 of 14 2001-08-23 parameter and conditions, each of the four channels symbol values unit at t j = -40...+150 c, v bb = 12 v unless otherwise specified min typ max reverse battery reverse battery voltage 14 ) - v bb -- -- 32 v drain-source diode voltage (v out > v bb ) i l = - 2.0 a, t j = +150 c - v on -- 600 -- mv diagnostic characteristics open load detection voltage v out(ol) 1 1.7 2.8 4.0 v input and status feedback 15 ) input resistance (see circuit page 9) r i 2.5 4.0 6.0 k ? input turn-on threshold voltage v in(t+) -- -- 2.5 v input turn-off threshold voltage v in(t-) 1.0 -- -- v input threshold hysteresis ? v in(t) -- 0.2 -- v status change after positive input slope 16) with open load t d(ston) -- 10 20 s status change after positive input slope 16) with overload t d(ston) 30 -- -- s status change after negative input slope with open load t d(stoff) -- -- 500 s status change after negative input slope 16) with overtemperature t d(stoff) -- -- 20 s off state input current v in = 0.4 v: i in(off) 5--20 a on state input current v in = 5 v: i in(on) 10 35 60 a status output (open drain) zener limit voltage i st = +1.6 ma: st low voltage i st = +1.6 ma: v st(high) v st(low) 5.4 -- -- -- -- 0.6 v 14 ) requires a 150 ? resistor in gnd connection. the reverse load current through the intrinsic drain-source diode has to be limited by the connected load. power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. the temperature protection is not active during reverse current operation! input and status currents have to be limited (see max. ratings page 4 and circuit page 9). 15 ) if ground resistors r gnd are used, add the voltage drop across these resistors. 16 ) not tested, specified by design
bts 824r infineon technologies ag page 8 of 14 2001-08-23 truth table channel 1 and 2 chip 1 in1 in2 out1 out2 st1/2 channel 3 and 4 (equivalent to channel 1 and 2) chip 2 in3 in4 out3 out4 st3/4 normal operation l l h h l h l h l l h h l h l h h h h h open load channel 1 (3) l h x x z h x x l 17 ) h channel 2 (4) x x l h x x z h l 17 ) h overtemperature both channel l x h l h x l l l l l l h l l channel 1 (3) l h x x l l x x h l channel 2 (4) x x l h x x l l h l l = "low" level x = don't care z = high impedance, potential depends on external circuit h = "high" level status signal valid after the time delay shown in the timing diagrams parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and outputs in parallel (see truth table). if switching channel 1 to 4 in parallel, the status outputs st1/2 and st3/4 have to be configured as a 'wired or' function with a single pull-up resistor. terms profet in2 st1/2 out2 gnd1/2 v bb v out2 i gnd1/2 v on2 18 2 leadframe 3 4 in1 v out1 v on1 i l1 out1 5 16 v in1 v in2 v st1/2 i bb i in1 i in2 i st1/2 i l2 r gnd1/2 v bb chip 1 profet in4 st3/4 out4 gnd3/4 v bb v out4 i gnd3/4 v on4 14 6 leadframe 7 8 in3 v out3 v on3 i l3 out3 9 12 v in3 v in4 v st3/4 i in3 i in4 i st3/4 i l4 r gnd3/4 chip 2 19 17 15 13 leadframe (v bb ) is connected to pin 1,10,11,20 external r gnd optional; two resistors r gnd1 , r gnd2 = 150 ? or a single resistor r gnd = 75 ? for reverse battery protection up to the max. operating voltage. 17 ) l, if potential at the output exceeds the openload detection voltage
bts 824r infineon technologies ag page 9 of 14 2001-08-23 input circuit (esd protection), in1 to in4 in gnd i r esd-zd i i i the use of esd zener diodes as voltage clamp at dc conditions is not recommended. status output, st1/2 or st3/4 st gnd esd- zd +5v r st(on) esd-zener diode: 6.1 v typ., max 0.3 ma; r st(on) < 375 ? at 1.6 ma. the use of esd zener diodes as voltage clamp at dc conditions is not recommended. inductive and overvoltage output clamp, out1...4 +v bb out v z v on power gnd v on clamped to v on(cl) = 47 v typ. overvolt. and reverse batt. protection + v bb in st st r gnd gnd r signal gnd logic v z2 i r v z1 load gnd load r out st r + 5v v z1 = 6.1 v typ., v z2 = 47 v typ., r gnd = 150 ? , r st = 15 k ? , r i = 4.0 k ? typ. in case of reverse battery the load current has to be limited by the load. temperature protection is not active open-load detection, out1...4 off-state diagnostic condition: open load, if v out > 3 v typ.; in low open load detection logic unit v out signal gnd off r ext v bb gnd disconnect profet v in st out gnd bb v bb v in v st v gnd any kind of load. in case of in = high is v out v in - v in(t+) . due to v gnd > 0, no v st = low signal available.
bts 824r infineon technologies ag page 10 of 14 2001-08-23 gnd disconnect with gnd pull up profet v in st out gnd bb v bb v gnd v in v st any kind of load. if v gnd > v in - v in(t+) device stays off due to v gnd > 0, no v st = low signal available. v bb disconnect with energized inductive load profet v in st out gnd bb v bb high for inductive load currents up to the limits defined by z l (max. ratings and diagram on page 10) each switch is protected against loss of v bb . consider at your pcb layout that in the case of vbb dis- connection with energized inductive load all the load current flows through the gnd connection. inductive load switch-off energy dissipation profet v in st out gnd bb = e e e e as bb l r e load r l l { l z energy stored in load inductance: e l = 1 / 2 l i 2 l while demagnetizing load inductance, the energy dissipated in profet is e as = e bb + e l - e r = v on(cl) i l (t) dt, with an approximate solution for r l > 0 ? : e as = i l l 2 r l ( v bb + |v out(cl) |) ln (1+ i l r l |v out(cl) | ) maximum allowable load inductance for a single switch off (one channel) 4) l = f (i l ); t j,start = 150 c, v bb = 12 v, r l = 0 ? z l [mh] 1 10 100 1000 1234567891011 i l [a]
bts 824r infineon technologies ag page 11 of 14 2001-08-23 typ. on-state resistance r on = f (v bb ,t j ) ; i l = 2 a, in = high r on [mohm] 160 120 80 40 0 5 7 9 11 30 40 tj = 150c 25c -40c v bb [v] typ. standby current i bb(off) = f (t j ) ; v bb = 9...34 v, in1,2,3,4 = low i bb(off) [ a] 0 5 10 15 20 25 30 35 40 45 -50 0 50 100 150 200 t j [ c]
bts 824r infineon technologies ag page 12 of 14 2001-08-23 figure 1a: v bb turn on: in2 v out1 t v bb st1 open drain in1 v out2 st2 open drain figure 2a: switching a resistive load, turn-on/off time and slew rate definition: in t v out i l t t on off 90% dv/dton dv/dtoff 10% figure 2b: switching a lamp: in st out l t v i the initial peak current should be limited by the lamp and not by the current limit of the device. figure 3a: turn on into short circuit: shut down by overtemperature, restart by cooling other channel: normal operation t i st in1 l1 l(scr) i i l(lim) t off(sc) heating up of the chip may require several milliseconds, depending on external conditions timing diagrams all channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4
bts 824r infineon technologies ag page 13 of 14 2001-08-23 figure 3b: turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2) t st1/2 in1/2 l1 l2 l(scr) i 2xi l(lim) i + i t off(sc) st1 and st2 have to be configured as a 'wired or' function st1/2 with a single pull-up resistor. figure 4a: overtemperature: reset if t j < t jt in st out j t v t figure 5a: open load: detection in off-state, turn on/off to open load open load of channel 1; other channels normal operation out1 v st in1 i l1 10s 500s figure 6a: status change after, turn on/off to overtemperature overtemperature of channel 1; other channels normal operation st in1 30s 20s
bts 824r infineon technologies ag page 14 of 14 2001-08-23 package and ordering code standard: p-dso-20-12 ( power so 20 ) sales code bts 824r ordering code tbd all dimensions in millimetres definition of soldering point with temperature t s : upper side of solder edge of device pin 15. pin 15 printed circuit board (fr4, 1.5mm thick, one layer 70 m, 6cm 2 active heatsink area) as a reference for max. power dissipation p tot , nominal load current i l(nom) and thermal resistance r thja frontside: backside: published by infineon technologies ag , bereich kommunikation st.-martin-strasse 53, d-81541 mnchen ? infineon technologies ag 1999 all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.


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