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1/16 june 2000 AN1187 application note all you need to know before choosing a flash memory contents n introduction n applications of flash memories n system issues n hardware issues n software issues n conclusion n glossary introduction flash memories keep the data that is saved to them even when the power is removed: they are non-volatile memories. they offer advantages over rom and eprom because they can be erased and reprogrammed by the microprocessor they are connected to. the number of flash memories sold in 1998 is more than twice the number sold in 1995. heavy pressure on their price since 1995 means that the cost per bit is now more competitive than ev- er. if you use non-volatile memories in your designs, you are in- creasingly likely to choose a flash memory. this document gives an overview of flash memories and how to use them. if you are new to flash memories then this document should help you understand the jargon associated with flash memories. at the end of the document the glossary contains de- scriptions of some of the terms used in this rapidly expanding in- dustry. this document is not going to help you choose a specific flash memory. once you have read the document and understood the issues involved you will be able to go to the product selector and choose the correct flash memory for yourself. applications of flash memories there are many applications of flash memories in existence to- day. recently mp3 took top place in the most searched for term on the world-wide web. every mp3 digital audio-player being de- veloped is likely to choose flash memory to store music. flash memory offers a compact, low power, rugged storage solution that cd and other discs cannot. one of the first major markets for flash memories was in the pc motherboards to hold the bios. many manufacturers allow users to update the bios by changing the flash memory contents. hard disks, cd-rom, cd-r/w and dvd all make extensive use of flash memories to boot their microcontrollers and execute their internal algorithms. networked peripherals, such as printers, isdn routers and firewalls all use flash memories to allow their software protocols to be changed easily as well as storing their user parameters (ip address for example).
AN1187 - application note 2/16 mobile phones manufacturers use millions of flash memories every year. they benefit from being able to run software directly from their flash memories, reducing the amount and cost of the ram they require. in production they are able to reprogram the flash memory with the latest application software at the end of the production line, rather than before the pcb is assembled. they can even assemble the pcb with test software that is later replaced. other consumer products, such as set-top boxes use flash memories for both software and data storage. many set-top boxes are able to upgrade their software in the field. the new software is sent over the air- waves and programmed into the flash memory so they can remain abreast of technology advances for many years. engine management systems in cars could benefit from flash memories by allowing the engine manage- ment software to be upgraded along with a service. economy and performance enhancements can be made even after the car has been sold. other embedded products, such as digital cameras and gps receivers, can also benefit from field up- grades. many manufacturers offer users the ability to download the latest version of software from the web and program it into their product for upgrades or performance enhancements. flash memories are now the first choice for prototype and development products since the software can be quickly updated to incorporate new features. product development using flash memories can be con- siderably faster than eprom since the contents can be changed without dismantling the system. the cost of flash memories is very competitive and, therefore, the flash memory usually stays in the product de- sign once it moves to production. there are thousands of applications for flash memories. if you are not using a flash memory at the mo- ment you may be able to use one and provide a benefit to your customers before your competitors. they are cheaper than eeprom and more versatile than eprom. once you have the flash memory in your design, who knows what benefits you will be able you gain from it! system issues if you are going to make use of a flash memory in your system then you should plan how you are going to make use of the flash memory from the start. this will help you decide which flash memory you require. this section is intended to help you understand how to use a flash memory in your system. unlike ram, you cannot write data directly to a flash memory, you have to program it. furthermore, you have to program the data to a location that has been erased. and, you can only erase blocks of data at a time. these restrictions do not severely limit the use of flash memory, once you have the tools in place to ensure you do not lose your data you will find them easy to use. most flash memories are divided into blocks. each block can be erased separately. you can protect blocks so that accidental program and erase operations cannot change the data. before erasing a block it is important that none of the data in the block is required as all of the data will be erased. the most com- mon block size is 64 kbytes, though smaller block sizes do exist. read and program operations work in- dependently of the blocks. any byte (or word) can be read or programmed separately. consider figure 1, which shows how a flash memory might be used in a digital camera.
3/16 AN1187 - application note figure 1. example of how a flash memory might be used in a digital camera in this example the functionality of each block has been predefined. the bottom of the flash memory con- tains the boot code for the microprocessor, the next two blocks are used to store user parameters. fol- lowing this the application code fills two blocks and the remaining blocks are used to store pictures. this model is simpler than the one actually employed by most digital cameras, where the blocks are divided into smaller partitions. boot block flash memories are ideal for this type of application. they have different sized blocks at one end of the address space, allowing the product to make better use of the available space in the flash memory. the boot block is usually 16 kbytes, the parameter blocks are usually 8 kbytes and the small main block is usually 32 kbytes. the boot block, parameter blocks and small main block can be located at the top or bottom of the flash memorys address space. a flash memory with these blocks at the top of the address space is called a top boot block flash memory; if these blocks are at the bottom of the address space then the memory is a bottom boot block flash memory. boot block flash memories are usually positioned in the microprocessors address space so that the mi- croprocessor executes the program in the boot block after reset. in general intel microprocessors boot from a memory location near the top of the address space (therefore use top boot block flash memories) whereas motorola microprocessors boot at the bottom of the address space (therefore use bottom boot block flash memories). the boot block can be protected to prevent the boot code from being pro- grammed or erased. parameter blocks are useful for storing the options that the user has selected. they are small in size and erase quickly, making them ideal for rapid updating. there are usually two or more parameter blocks in a flash memory. by using two blocks the data can be secured against inadvertent power failure. the old data in one parameter block does not need to be erased until the new parameter block has been written. if only one block is used then there is always the risk that the user will remove the power during the erase/ reprogram operation and some data will be lost. ai03820 boot block user parameters (current) user parameters (erased) application code parameter block small main block main block parameter block main block main block main block boot code picture 1 picture 2 picture n
AN1187 - application note 4/16 the small main block is a good place to start the application code. application code can continue into the adjacent main blocks. in the case of the camera, if the application code grows then it can occupy the space used by the first picture (so long as the picture can be moved or deleted). the remaining main blocks can be used to store the users data. most main blocks are 64 kbytes in size. it is in these main blocks that more optimization can take place. it is unlikely that each picture will be ex- actly 64 kbytes in size. many applications use algorithms for storing data of variable size, rather than of a fixed size. this results is better usage of the space in the flash memory. there are many commercially available software products to manage the data areas of the flash memory. hardware issues the hardware issues relevant to flash memories are not too dissimilar to those of eproms, except for the additional control line, write enable, that needs to be connected. the data sheet for flash memories contains all of the information needed to design a flash memory into a processor board. the pin connec- tions, signal descriptions, dc and ac characteristics are described in detail. in this section some of the key parameters will be identified and an explanation of the various bus structures is given. the first key parameter to be considered is the voltage and power requirements. most applications of flash memories are battery powered and therefore power sensitive. to try and reduce the power required by electronic systems the operating voltage has fallen in recent year from 5v to 3v and now down to 1.6v. plans for 0.9v systems in the future exist. flash memory is moving down this route too. currently both 5v and 3v memories exist. memories that have 1.6v external buses but 3v cores are also available. parts are in development that can be programmed from a 1.6v single supply. the amount of data storage available in a flash memory today ranges from about 1 mbit (128kb x8) to 32 mbit (4mb x8). these are manufactured in 0.25 m m technology, shrinking this to 0.18 m m is underway. research for 128 mbit and 256 mbit is also taking place. the bus widths that flash memories are available in are 8-bits, 16-bits and, recently, 32-bits. many of the larger bus width flash memories can be accessed as a smaller bus width flash memory as well; for example the m29f400b is an x8/x16 bus width memory, meaning it can be configured for 8-bit wide or 16-bit wide bus access. the power requirement of a flash memory varies depending on the operation that is being performed. read operations make use of address transition detection; this wakes up the flash memory whenever it is being accessed and the address changes. the power consumption increases to about 15ma at the start of the read operation, but quickly falls to the standby current once the data has been read from the mem- ory array. a flash memory that is being accessed at 6mhz (6 million reads per second) has a maximum average current of about 10ma; at 1mhz this will fall to about 1.6ma. during program or erase operations the current supply is higher; about 20ma is required throughout the program or erase operation. access time is another critical parameter for hardware designers. currently the smaller flash memories (1mbit) have access times of 35ns and the larger ones (16mbit) have access times of 55ns. low voltage (3v) flash memories are slower than their 5v equivalents. memories with burst mode and page mode are available in 16mbit sizes with access times of about 100ns followed by 20ns for subsequent reads. note that many flash memories have slightly slower write access times than read access times. flash memories are protected from glitches corrupting their contents during power on and power off. the commands on many flash memories require some coded cycles to be written to the memory before program or erase commands will be accepted. the coded cycles are virtually impossible to issue by ac- cident as a glitch on the address and data bus. once the supply voltage falls below the lockout voltage the program/erase controller will not accept any program or erase commands. in addition critical blocks can be protected so that no program or erase operation can modify the data in these blocks. flash memories are available with commercial, industrial and automotive temperature ranges. there is a trade-off between access time and temperature range; the fastest parts may not be available over the widest temperature range (though you should still ask if you require these parts since they are often avail- able).
5/16 AN1187 - application note nearly all flash memories are only available in surface mount packages. the m29f040b is one of the only ones available in the non-surface mount pdip package. it is not necessary to have a multi-layered pcb to use a flash memory; however, it is good engineering practice to have a ground plane in any design where there are signals with pulse widths less than 100ns. a decoupling capacitor should be placed near to the flash memory to keep v cc constant during transient current requirements. access mechanisms flash memories come with different access mechanisms, the main three being parallel memories, serial memories and serial nand memories. stmicroelectronics concentrates on manufacturing parallel mem- ories, but a brief description of each is given here. parallel memories are used to connect to microprocessor buses. figure 2 gives an example of the main control lines that are required. almost all parallel memories have de-multiplexed address and data buses as shown in figure 2, although flash memories with multiplexed address/data buses are in development, if not available. parallel memories are read in three steps: firstly the address is set on the address bus; secondly the control signals select a read operation from the memory and finally the data output by the flash memory is read by the microprocessor. writing to parallel memories is a two step process: the ad- dress and data buses are set, followed by the control signals to latch the data into the flash memory. note that this is a bus write operation: it writes commands to the command interface of the flash memory, not to the memory array. there is more behind the term parallel memory than the bus configuration. parallel memories are ran- dom access devices: any byte (or word) can be accessed in any order with the same access time. this may seem obvious at the moment, but read on and you will find out that serial nand memories do not have this property. (note that burst mode and page mode flash memories can access sequential or pag- es of bytes faster than normal operations, but the access time is still the same order of magnitude). figure 2. connection between microprocessors and parallel memories serial memories have a serial bus instead of a parallel bus. the spi bus is the most common bus used by serial memories. figure 3 shows an example of a serial memory connected to a microcontroller. to read a serial memory the chip select is driven low, the address is clocked serially into the serial input pin then the data is clocked out of the serial output pin. writing to a serial memory is similar, but the data is written to the serial input pin instead of being read by the serial output pin. serial memories generally have additional commands and internal buffering to try and reduce the number of bus read and bus write operations required. ai03821 w parallel memory e g data bus address bus mcu rd wr cs1
AN1187 - application note 6/16 figure 3. connection between microcontrollers and serial memories serial nand memories transfer address and data serially, though they use an 8-bit wide parallel bus. fig- ure 4 shows an example of a serial nand memory. address and data are transferred 8-bits at a time from the microcontroller to the serial nand memory and visa-versa. each operation between the microcontrol- ler and the serial nand memory consists of the command, the address and one or more bytes of data. serial nand memories are not random access, it takes in the order of 10 m s to select the first byte in a page to be read, after that subsequent consecutive bytes can be read quickly (in the order of 50ns). serial nand memories are often used in conjunction with simple controllers (e.g. a flash ata controller for pc- cards) rather than connected directly to microprocessors or microcontrollers. figure 4. connection between microcontrollers and serial nand memories connecting parallel memories to the system address bus in this section an overview of the connection of a flash memory to system address bus will be looked at. stmicroelectronics have a range of application notes dedicated to helping designers connect flash mem- ories to specific microprocessors and microcontrollers. refer to these application notes for more details on how to connect your flash memory to a specific microprocessor. if an application note covering the microprocessor you require has not been written yet then the other application notes are worth reading as they contain information that is relevant to all microprocessors. ai03402 serial memory cs mcu cs1 sck sck si so so si ai03403 serial nand memory cs mcu cs1 re e we w se ale cle i/o0-i/o7
7/16 AN1187 - application note on flash memories with an 8-bit wide data bus the address pins are labelled with the normal conventions, a0, a1... a n . a0 selects the byte at an odd or even address. 16-bit wide flash memories label the address pins a0, a1... a n , but this time a0 selects the word at an odd or even address. for a 32-bit wide memory a0 is used to select the double word at an odd or even address. flash memories that support two or more bus widths have negative address pin labels. for example a x8/ x16 (8-bit or 16-bit width) flash memory has address pins a0, a1... a n in 16-bit mode and address pins aC1, a0, a1... a n in 8-bit mode. the aC1 (a minus one) address pin doubles as data bus pin dq15 in 16-bit mode. the reason for explaining this in detail is to ensure that the connection to microprocessors is understood. depending on the configuration chosen, a0 of the flash memory will not necessarily connect to a0 of the microprocessor, as the following examples will show. furthermore, the addresses that the software is re- quired to use when issuing commands to the flash memory must be translated from the microprocessor address space to the flash memory address space, otherwise the command interface will not accept the commands. two types of flash memory widths will be examined in detail. these are x8 bit flash memories and x8/ x16 bit flash memories. the detail of the other bus widths are similar to these examples. figure 5 shows the address bus connection of 8-bit flash memories to an 8-bit microprocessor and a 16-bit microproces- sor. figure 5. connection between 8-bit flash memories and microprocessors figure 5(a) shows the connection to the 8-bit microprocessor. here a0 on the microprocessor connects directly to a0 on the flash memory. there is no need to adjust the addresses when issuing commands because the flash memory and the microprocessor share the same address space conventions. in figure 5(b) there are two 8-bit flash memories connected in parallel. one memory holds the least significant byte and the other holds the most significant byte. now the address bus of the microprocessor is skewed compared to the address bus of the flash memory. the software will have to take into account the differ- ence between the flash memorys address space and the microprocessors address space when issuing commands. figure 6 shows the address bus connections of x8/x16 bit flash memories to an 8-bit and a 16-bit micro- processor. ai03405 x8 flash memory 8-bit mcu a0 a1 a2 a n ... a0 a1 a2 a n ... 16-bit mcu a1 a2 a3 a n+1 ... a0 a1 a2 a n ... two x8 flash memories a0 (a) (b)
AN1187 - application note 8/16 figure 6. connection between x8/x16 bit flash memories and microprocessors figure 6(a) shows the connection of an x8/x16 bit flash memory in x8 mode to an 8-bit microprocessor. care must be taken when using the memory in this configuration. the data sheet has two tables describ- ing the commands because the address locations for the commands change depending on how the mem- ory is used. this mode is where the address locations for the commands are shifted compared to the 8- bit parts. in figure 6(b) the flash memory is in x16 mode and connected to a 16-bit microprocessor. in this mode the other table in the data sheet should be used and address locations for the commands follow the conventions used by 8-bit or 16-bit parts. however, care is still needed in the software because the microprocessors address pins are skewed compared to the flash memorys address pins and a0 of the microprocessor is not used by the flash memory. second sourcing in the group of parallel memories made by stmicroelectronics there are two families, the m28 family and the m29 family. the behavior of the memory within the family is almost identical, both between parts and between manufacturers. for example, an m29f400b and an am29f400b (from amd) can be used inter- changably. one exception to this is the device code and manufacturer code. software that relies on the device code or manufacturer code will need to be changed to use the codes of either part. moving from an m29f400b to an m29f160b requires little change to the electronics or software; the additional address lines need to be accounted for on the pcb and the software needs to be aware that there is an extra one and a half megabytes of storage space. (often the software will read the manufacturer code and device code to recognize the flash memory). across families it is more difficult to second source parts. the pin connections between m28 family parts and m29 family parts are not identical (though they are as similar as possible). the command set accept- ed by the command interface is not the same, software for one family will not work on the other. which- ever family you choose the properties of the memory are very similar: they have similar storage capacities, similar power requirements, similar package sizes, etc. one major difference between the families is in the erase times. the block erase time for each family is similar. however, m29 series flash memories can erase multiple blocks in parallel. when several blocks need erasing an m29 series flash memory will win by a long margin. m28 series flash memories generally respond faster to erase suspend (they have lower latency), which compensates in some ways for their longer chip erase times. the common flash interface (or cfi) was intended to avoid compatibility problems. the interface defines the architecture of the blocks in the flash memory, the timing parameters, command set and other fea- tures that software needs to know. be aware, however, that having a common flash interface flash mem- ai03406 x8/x16 flash memory in x8 mode 8-bit mcu a0 a1 a2 a n+1 ... aC1 a0 a1 a n ... 16-bit mcu a1 a2 a3 a n+1 ... a0 a1 a2 a n ... x8/x16 flash memory in x16 mode a0 (a) (b)
9/16 AN1187 - application note ory and common flash interface software does not mean that they will communicate, it just means they will be able to tell you that they cannot communicate. some common flash interface software does sup- port both families and this can be used to make the parts truly second source across families. software issues stmicroelectronics provides software drivers for nearly all of its flash memories. if the driver you require if not available then contact stmicroelectronics, the driver for the part you require may be in development and become available shortly. some of the details that software engineers should be aware of have been described in the hardware is- sues section. these include the shifting of the microprocessor address bits compared to the flash memory address bits. the address locations of the commands are affected by the way that the flash memorys address bus is connected to the microprocessors address bus. in all but the simplest of software models designers use layers to hide the detail of different parts of a de- sign from other parts. software written for flash memories is no exception to this. different designs use different numbers of layers to abstract the manipulation of the data. in this application note four layers will be looked at: figure 7 shows the layers that will be described. figure 7. layers of software abstraction used in conjunction with flash memories in the hardware specific layer we find functions that are used to communicate with the flash memory over the microprocessor bus. in general the microprocessor bus only has two operations, bus read and bus write. in the flash memory drivers provided by stmicroelectronics the user has to write two functions, flashread() and flashwrite() to allow the functions in the next layer up to talk to the flash memory in their system. the flash specific layer translates from standard functions into operations the flash memory will exe- cute. the standard functions that a flash memory provides are auto select, program, block erase, chip erase, etc. it does not matter which flash memory you have, you will be able to execute these operations. in the flash memory drivers provided by stmicroelectronics these standard functions are provided by the c functions flashautoselect() , flashprogram() , flashblockerase() and flashchip- erase() . if you are using the drivers then you do not need to know how to program the flash memory, you only need to call flashprogram() and this layer will take care of the rest. in the data manipulation layer users are able to update data stored in the flash memory without worrying about how this is done. the user will want to issue commands like update picture 1 with these changes or modify my address book database to include a new address. because flash memories are erased in blocks and the picture and the database may be stored in the same block, care needs to be taken when updating one of them. the block cannot be erased to update the picture without also saving the database. the data manipulation layer takes care to ensure that the data is kept correctly and securely all the time. ai03404 hardware specific layer flash specific layer data manipulation layer application memory mapping and functions to read from/write to the flash. generic functions manipulate the specific flash memory. functions that look after the data in the flash memory (eeprom emulation, flash file sytems, etc.)
AN1187 - application note 10/16 the usual technique is to divide each block into smaller partition and keep track of which partitions (and what order of partitions) store the picture, the database, and any other data items. there are several com- mercially available software programs to perform the data manipulation layer. the data manipulation layer is the subject of application note an1188. this application note deals with several techniques of data storage, including eeprom emulation and linked lists. (eeprom emulation is useful for people who are upgrading from using an eprom and an eeprom to a single flash memory). flash memories are now fast enough to enable microprocessors to run their programs directly from the flash memory, rather than copying the code to another memory type, such as dram. running your soft- ware directly from the flash memory has some drawbacks that need to be explained. when you take a flash memory out of read mode it no longer responds with the data stored in the mem- ory array. if you are running your software from the flash memory and you issue a program or erase com- mand then your software is likely to die horribly. the next instruction read from the flash memory will read the status register, not the op-code for the microprocessor. there are two solutions to this problem. some flash memories are available with two banks (known as dual bank flash memories). program and erase operations on one bank do not affect the other bank, so you can run your software from one bank while programming the other. this is the easiest solution to use, but dual bank flash memories cost more than those with only one bank. internally dual bank flash mem- ories have 30% to 50% more circuitry, mainly because they require two read paths from the memory array (they are nearly two flash memories on one silicon die). the alternative solution is to copy the software required to program or erase to another memory and run it from there. not all of the software needs to be copied, only the part that executes the program or erase command. the disadvantage of this method though is that, if an interrupt occurs and your interrupt service routine is in the flash memory, you will not be able to access it until the flash memory completes its op- eration. in real time systems that cannot tolerate the microprocessor being busy for one or more seconds this is clearly a problem. the erase suspend command is useful for temporarily recovering your system during block erase oper- ations. if an interrupt occurs while the flash memory is erasing you can issue an erase suspend instruc- tion. the flash memory will take about 10 m s to pause the erase operation and return to read mode. flash memories with low latency respond much faster, within about 1 m s. once the flash memory has returned to read mode the interrupt can be run. be sure to check that the flash memory has entered read mode by reading the status register. once the interrupt has run the erase resume command will restart the erase operation where it left off. conclusion many of the issues to be considered when choosing a flash memory have been addressed in this appli- cation note. flash memories a are rugged, compact, easy to use data storage solution for electronic prod- ucts. suitable for low power applications they are finding their way into all sorts of modern consumer products. the types of data stored in the flash memory should be mapped at the outset of the design process. boot or uniform architecture flash memories can easily be chosen from considering the data types to be stored. the size, voltage, speed, package, etc. can be chosen to suit the application. other quantities such as power consumption are fixed. software drivers to command the flash memory are available from st- microelectronics, software to manipulate the data is available from a variety of suppliers. stmicroelectronics provides a range of different flash memories to suit every application. take the plunge today and choose a flash memory in your next application!
11/16 AN1187 - application note glossary of terms used in flash memories the terms in this glossary are intended to help newcomers to flash memories understand the jargon as- sociated with flash memories. not all of the terms in this glossary will apply to all flash memories. 3 hex codes. the command interface of some flash memories will not accept commands directly, in- stead it is necessary to issue some coded cycles to unlock the command interface before issuing the command. the purpose of the coded cycles is to protect the contents of the flash memory from power on glitches, power off glitches and faulty software. each coded cycle requires the correct data on the data bus and the correct address on part of the address bus. the upper bits of the address bus are ignored during the coded cycles. recently the number of address bits that needed to be correct (i.e. were not ignored) changed from a0-a14 to a0-a10. a flash memory that only requires address bits a0-a10 to be correct for the coded cycles is said to need 3 hex codes. block. also known as sector. a block is a group of flash memory cells that have to be erased together. usually blocks are 64 kbytes in size, but other sizes exist (boot blocks, parameter blocks). once a byte (or word) has been programmed it is necessary to erase the entire block containing the byte before the byte can be programmed again. all of the bytes in the block will be erased at the same time, so it is im- portant to save their data values before erasing them. block erase time. also known as sector erase time. this is the time it takes to erase a block. on some memories several blocks can be erased at the same time. it is faster to erase two blocks at the same time than to erase one then the other. however, erasing two blocks still takes longer than erasing one block (mainly due to the time it takes the program/erase controller to program all of the cells to 0 before erasing). block protection. also known as sector protection. blocks can be protected against accidental pro- gram or erase operations. if a block is protected then it will not be possible to change the data in the block. details on how to protect and unprotect blocks are given in application note 1122. block protection status. also known as sector protection status. the auto select mode of a flash memory can be used to determine if a block is protected or unprotected. protected blocks cannot have their data contents changed. in order to change the contents of a protected block it is necessary to unpro- tect the block, either temporarily using the reset/block temporary unprotect pin or permanently in a flash programmer. boot block. also known as boot sector. a boot block is a block of memory that is usually smaller than the normal block size. the boot block(s) will always be situated at the top or bottom of the memory (top boot block or bottom boot block). the purpose of the boot block is to store software code that the micro- processor boots from. generally the boot code does not change very often, whereas the application code may change regularly. by placing the boot code in one or more boot blocks it can be protected against accidental program or erase operations that could corrupt it. often boot code will include some mecha- nism to replace the application code so that, if the application code becomes corrupt, it will be possible to recover the system without removing the flash memory and reprogramming it in a flash memory pro- grammer. boot sector. see boot block. bus read operation. the flash memory data sheets use the term bus read operation and bus write operation to avoid mis-understandings that can arise with the term read or write. bus write operation. the flash memory data sheets use the term bus read operation and bus write operation to avoid mis-understandings that can arise with the term read or write. the term write can be particularly mis-leading because the phrase writing to the memory could be interpreted as writing to the command interface or programming the memory. byte . see byte/word organization select pin.
AN1187 - application note 12/16 byte/word organization select pin. also known as byte. when the byte/word organization select pin is high, v ih , the flash memory has a word-wide (x16) data bus. when it is low, v il , the flash memory has a byte-wide (x8) data bus. the pin dq15aC1 changes operation from an address pin (aC1) and a data pin (dq15) when byte/word organization select changes. cfi. abbreviation for common flash interface. coded cycles. to increase the security of the data stored in flash memories the command interface will only accept commands that are preceded by the correct coded cycles. the coded cycles prevent the flash memory from losing data due to faulty software, power on and power off glitches. command interface. the command interface is the internal state machine in the flash memory that in- terprets the bus write operations. bus write operations do not directly affect the data stored in the flash memory; instead, program and erase commands are required to change the memorys data. the com- mand interface will verify that the commands are valid and change the mode of the flash memory accord- ingly. program and erase commands are executed by the program/erase controller. common flash interface (cfi). the common flash interface is a standard defined to try and improve the second-source nature of flash memories. the common flash interface is stored in an additional part of the memory that can be accessed by issuing the cfi query command. information such as the memory size, block sizes and addresses, program and erase timings, command set, etc. are stored in the com- mon flash interface memory space. the common flash interface is useful for pcmcia cards since it al- lows the software on the host to identify the configuration of the memory in the pcmcia card. in general however, the common flash interface does not provide many of the benefits that users expect. having a common flash interface compatible flash memory and common flash interface compatible software does not guarantee that the system will work. command set. not all flash memories respond to the same commands, there are two different com- mand sets. stmicroelectronics manufactures two different types of flash memories, m28 series and m29 series, one series for each command set. the basic functionality of each flash memory series is the same, they have fast random access times, they are reliable, they can be used for both code and data storage. the differences are in the command set and the pin configurations. if you are looking for a sec- ond-source to your stmicroelectronics flash memory then intel provide flash memories compatible with the m28 series and amd or fujitsu are compatible with the m29 series. device code. see electronic signature. dual bank. also known as dual plane. dual bank flash memories have their blocks divided between two banks. when program or erase operations are taking place in one bank, read operations addressed to the other bank read from the memory array; read operations addressed to the bank where the program or erase operation is taking place will read the status register. the advantage of a dual bank flash mem- ory is that the application code can be run directly from the flash memory while program or erase oper- ations are taking place. flash memories that do not have two or more banks require the application code (or at least part of it) to be copied to another memory (such as dram) during program or erase operations. dq15aC1. (read dq15a minus 1). the dq15aC1 pin is a special pin on flash memories that can be configured for byte or word data bus sizes. when the flash memory is accessed in byte mode (the byte/ word organization select pin, byte , is low, v il ) dq15aC1 is an input address pin; if v il is applied to dq15aC1 during a read operation then the byte output is the value that would be output on dq0 to dq7 in word mode; if v ih is applied to dq15aC1 during a read operation then the byte output is the value that would be output on dq8 to dq15 in word mode. when the flash memory is accessed in word mode (the byte/word organization select pin, byte , is high, v ih ) dq15aC1 is a data pin. dual plane. see dual bank.
13/16 AN1187 - application note electronic signature. the electronic signature of a flash memory consists of the manufacturer code and device code. the manufacturer code for stmicroelectronics is 20h; each type of flash memory made by stmicroelectronics has a different device code, for example the m29f040b has a device code of e2h. the electronic signature can be read through special bus operations, by using the auto select command or by using the read electronic signature command. embedded algorithm. the embedded algorithms are executed by the program/erase controller. the algorithms determine the sequence of pulses to apply to each cell or block, ensuring that the flash mem- ory is programmed or erased correctly. erase suspend. because it takes a long time (in the order of seconds) to erase it is often useful to be able to suspend the block erase operation and read data from another block. the erase suspend com- mand can be executed at any time during an block erase operation. data from blocks that are not being erased can be read and, on some flash memories, data can be programmed too. the erase operation can be resumed using the erase resume command. hardware reset. a hardware reset is executed when the power is applied to the flash memory or when the reset/block temporary unprotect pin is low. a hardware reset leaves the flash memory in read mode where the data in the flash memory can be read like a rom or eprom. hardware reset opera- tions during program or erase operations should be avoided since they can leave the contents of the af- fected memory cells in an indeterminate state. a hardware reset will always stop any operations on the flash memory and return to read mode; by contrast software resets (through the read/reset command) will not abort all operations. identification voltage. also known as v id . the identification voltage is the voltage that should be ap- plied to some of the pins in the flash memory (usually a9) to read the electronic signature (device code or manufacturer code). the data sheets describe reading these codes in the special bus operations sec- tion. the identification voltage is used by flash programmers to find out what type of flash memory is fitted automatically, the user does not need to select the device in flash programmers that use this fea- ture. the identification voltage is also used for other purposes; raising the reset/block temporary unpro- tect pin to the identification voltage temporarily unprotects all of the protected blocks so their content can be changed; the identification voltage is also required to protect a block or unprotect all blocks. main block. also known as main sector. there are usually more main blocks in a flash memory than any other type of block. they form the bulk of the memory size. usually main blocks are 64 kbytes (32 kwords) in size. main blocks are typically used for code storage, data storage, flash file systems, etc. main sector. see main block. manufacturer code. see electronic signature. parallel memory. the term parallel memory is used to describe the access mechanism for getting data in and out of the memory. a parallel memory has fully parallel address and data buses (or a fully parallel multiplexed address/data bus). several control lines (chip enable, output enable and write enable) indi- cate the type of access (bus read or bus write). this is the method used to map the memory to an ad- dress in the microprocessor address space. parallel memories have fast random access to the data in the memory. other access mechanisms include serial memories (with i 2 c or spi interfaces) and serial nand memories. parameter block. also known as parameter sector. a parameter block is a block that is smaller than the normal block size for the flash memory. parameter blocks are useful for storing user parameters in the flash memory. their small size is designed to be large enough to hold all the user parameters, but, because they are smaller than the main blocks they erase faster, giving a better response time to user requests. usually parameter blocks appear in pairs. when the user changes one or more values it is a simple procedure to copy the data from one parameter block to the other, changing the data as it is cop- ied. the old parameter block can then be erased. a flag can be used to mark the most recent parameter block.
AN1187 - application note 14/16 parameter sector. also see parameter block. p/e.c. abbreviation for program/erase controller. program/erase controller. the program/erase controller is responsible for programming the contents of a flash memory cell and erasing blocks. to program a cell correctly the program/erase controller has to pulse each cell until the state of the cell is within the correct margins. too many pulses damage the cell, reducing the number of program/erase cycles the block can survive. erase operations have to program all of the cells so they are in the same state (their contents will be 0) before erasing all of the cells in one go. if the cells are not all programmed to the same state then damage can occur during the erase opera- tion. the number of program/erase cycles that a flash memory can tolerate depends, in part, on the pro- gram/erase controller executing its pulses correctly. program time. this is the time it takes to program a byte or a word. typically it takes between 8 m s and 10 m s to program. on stmicroelectronics memories programming a byte takes the same time as program- ming a word; it is worthwhile programming by word if you have a lot of addresses to program. reset/block temporary unprotect pin. also known as rp . the reset/block temporary unprotect pin can be used to cause a hardware reset to the flash memory or temporarily unprotect all of the pro- tected blocks. not all flash memories have this pin. the pin should be low, v il , when the microprocessor is reset. to cause a hardware reset the pin should always be held low for at least t plpx . during normal operation the pin should be high, v ih . to temporarily unprotect all of the protected blocks (thereby al- lowing changes to their content to be made) the pin should be raised to the identification voltage, v id . rp . see reset/block temporary unprotect pin. sector. see block. sector erase time. see block erase time. sector protection. see block protection. sector protection status. see block protection status. serial memory. the term serial memory is used to describe the access mechanism for getting data in and out of the memory. serial memories use a serial bus, such as spi, to communicate with the memory and transfer the data to and from the memory. other access mechanisms include parallel memories and serial nand memories. serial nand memory. the term serial nand memory is used to describe the access mechanism for getting data in and out of the memory. the term nand is the technology used in the flash memory cell that stores the data. nand memories are read, programmed and erased one page at a time. it takes in the order of 10 m s to select the page in the memory, after that the data can be read with an access time in the order of 50ns. the bus is usually 8 bits wide with some extra control signals. the address and data are written and read on the same 8 bits. other access mechanisms include parallel memories and serial memories. small main block. also known as small main sector. the small main block(s) in a flash memory are a result of the top or bottom block being divided into boot blocks and parameter blocks. the small main block usually occupies the remaining space. if the memory is being used for code storage then the appli- cation code can start in the small main block and continue into the next main block(s). small main sector. see small main block. software reset. a software reset is executed by issuing the read/reset command. after a software reset the flash memory will return to read mode, unless a program or erase operation is taking place. software resets during program and erase operations should be avoided since they can leave the flash memory cells in an indeterminate state. different flash memories behave differently when a software re- set is issued during program or erase operations, some ignore the command, others will abort the opera- tion. refer to the data sheet of each flash memory for information on how it behaves. hardware resets, by contrast, will always abort any program or erase operation.
15/16 AN1187 - application note status register. the status register reports the progress of a program or erase operation. the status register is used to identify if a program or erase operation is still taking place, or if it has completed. error bits in the status register are used to identify if an error has occurred during program or erase operations. m28 series flash memories and m29 series flash memories have different status register bit definitions. see the data sheets for information on the definitions of the status register bits. temporary block unprotect. also known as temporary sector unprotect. some memories have a reset/block temporary unprotect pin (rp ) that, when raised to the identification voltage, v id , allows all protected blocks to be programmed or erased. when the pin returns to normal cmos voltage levels the protected blocks can no longer be changed. temporary sector unprotect. see temporary block unprotect. three hex codes. see 3 hex codes at the start of the glossary. uniform block. also known as uniform sector. a flash memory will be described as a uniform block flash memory if all of the blocks in it are the same size. for example, the m29f040b is a uniform block flash memory because all of the blocks are 64 kbytes in size. uniform sector. also see uniform block. unlock bypass command. the unlock bypass command is used to reduce the number of bus write operations that are required to program a flash memory. some flash programmers have long access times (due to their flexibility, they need to set each pin individually). when programming a flash memory considerable time can be spent writing the coded cycles before each program command. to avoid need- ing to do this and speed up the programming of the flash memory the unlock bypass command can be issued, reducing the number of bus write operations per program command from 4 to 2. speed increases of 30% can be obtained using this technique. for embedded systems with fast access times there is little benefit in using the unlock bypass command. v ih . v ih is the definition of a high voltage or logic level 1. the data sheet defines its range of values in the dc characteristics. v il . v il is the definition of a low voltage or logic level 0. the data sheet defines its range of values in the dc characteristics.
AN1187 - application note 16/16 if you have any questions or suggestion concerning the matters raised in this document please send them to the following electronic mail address: ask.memory@st.com (for general enquiries) please remember to include your name, company, location, telephone number and fax number. information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2000 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com

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