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| specification for lcd module model no. TM128160CKFWG prepared by: date: checked by : date: verified by : date: approved by: date: tianma microelectronics co., ltd ver. 1.0
1/25 revision record date ver. ref. page revision no. revision items 2/25 1. general specifications: 1.1 display type: color stn 1.2 display color* 1 : display color: 65k color background* 2 : black (red, green, blue dots are off state) 1.3 polarizer mode: transmissive/negative 1.4 viewing angle: 6:00 1.5 driving method: 1/160 duty 1/10 bias 1.6 backlight type: led (3 lamps) backlight color: white 1.7 controller: hcd667a66 1.8 data transfer: 8 bit parallel 1.9 operating temperature: -20----+70 ?? storage temperature: -30----+80 ?? 1.10 power supply voltage: vdd= 3.0v 1.11 lcd operating voltage: vlcd= 16.8v 1.12 outline dimensions: refer to outline drawing on next page 1.13 dot matrix: 128 x 3 (rgb) x 160 dots 1.14 dot size: 0.221(r+g+b) ? 0.221(mm 2 ) 1.15 dot pitch: 0.231 ? 0.231 (mm 2 ) 1.16 weight: tbd * 3 * 1 color tone is slightly changed by temperature and driving voltage. * 2 color tone will be changed by backlight. * 3 tbd: to be determined. 3/25 2. outline drawing 4/25 3. lcd module part numbering system tm 128160 c k f w g ic package g: cog temprature range w: wide temperature range backlight type f: transmissive, led backlight lcd type k: color stn mode negative module series module type digits indicating: 128 (rgb) columns x 160 rows t: tianma m: module 5/25 4. circuit block diagram 6/25 5. absolute maximum ratings ta= 25 ?? item symbol min. max. unit remark power supply voltage v dd - v ss -0.3 +4.6 lcd driving voltage v lcd -0.3 +20.0 v operating temperature range t op -20 +70 storage temperature range t st -30 +80 ?? no condensation 7/25 6. electrical specifications and instruction code 6.1 electrical characteristics vss= 0v , ta= 25 ?? item symbol min. typ. max. unit supply voltage (logic) v dd -vss +2.91 +3.0 +3.09 v supply voltage (lcd drive) v lcd - 16.8 - v high v ih ? v dd =3.0 ? 0.8v dd - v dd v input signal voltage low v il ? v dd =3.0 ? 0 - 0.2 v dd v supply current (logic) i dd (v dd - v ss =3.0v) - - 2.5 ma operating current i op - - 60 ma oscillator frequency range f osc 220 - 330 khz supply voltage (led) v led - 9.9 - v supply current (led) i led 15.0 20.0 ma 8/25 6.2 interface signals 6.2.1 cn1 6.2.2 cn2 pin no. symbol level description 1, 2 cathode 0v led cathode 3, 4 anode 9.9v led anode pin no. symbol level description 1 gnd 0v ground 2 db7 h/l data bus bit 7 3 db6 h/l data bus bit 6 4 db5 h/l data bus bit 5 5 db4 h/l data bus bit 4 6 db3 h/l data bus bit 3 7 db2 h/l data bus bit 2 8 db1 h/l data bus bit 1 9 db0 h/l data bus bit 0 10 rd h/l signal to select data read operation(80-system) 11 wr h/l signal to select data write operation(80-system) 12 rs h/l index register / data command select 13 cs h/l chip select: low active 14 vcc 3.0v logic circuit power supply 15 vcc 3.0v logic circuit power supply 16 gnd 0v ground 17 gnd 0v ground 18 reset h/l reset pin: low active 19 vcc 3.0v logic circuit power supply 20 gnd 0v ground 9/25 6.3 interface timing chart twrf twrr tdsw th w r t d h r v o h1 vil vih vil rs wr * rd* vih vil vih vil tas tah vil vih pwlw, pwlr pwhw, pwhr tcycw, tcycr vih vih vil vih vil db0 to db15 db0 to db15 wrire data read data v o h1 v o l1 v o l1 tddr 10/25 80 -system bus interface timing characteristics normal write mode (hwm=0) (vcc = 2 .2 to 2.4 v) item symbol unit test condition min typ max write t cycw n s figure 2 60 0 ? ? bus cycle time read t cycr ns figure 2 8 00 ? ? write low -level pulse width pw lw ns figure 2 90 ? ? read low -level pulse width pw lr ns figure 2 3 50 ? ? write high-level pulse width pw hw ns figure 2 30 0 ? ? read high -level pulse width pw hr ns figure 2 4 00 ? ? write/read rise/fall time t wrr, wrf ns figure 2 ? ? 25 set up time (rs to cs* , wr*, rd* ) t as ns figure 2 10 ? ? address hold time t ah ns figure 2 5 ? ? write data setup time t dsw ns figure 2 60 ? ? write data hold time t h ns figure 2 15 ? ? read data delay time t ddr ns figure 2 ? ? 200 read data hold time t dhr ns figure 2 5 ? ? high-speed write mode (hwm=1) (vcc = 2 . 2 to 2 . 4 v) item symbol unit test condition min typ max write t cyc w ns figure 2 2 00 ? ? bus cycle time read t cycr ns figure 2 8 00 ? ? write low -level pulse width pw lw ns figure 2 90 ? ? read low -level pulse width pw lr ns figure 2 3 50 ? ? write high -level pulse width pw hw ns figure 2 9 0 ? ? read high -level pulse width pw hr ns figure 2 40 0 ? ? write/read rise/fall time t w rr , w rf ns figure 2 ? ? ? set up time (rs to cs* , wr*, rd* ) t as ns figure 2 10 ? ? address hold time t ah ns figure 2 5 ? ? write data set up time t dsw ns figure 2 60 ? ? write data hold time t h ns figure 2 15 ? ? read data delay time t ddr ns figure 2 ? ? ? read data hold time t dhr ns figure 2 5 ? ? 11/25 normal write mode (hwm= 0 ) (vcc = 2.4 to 3.6 v) table 50 item symbol unit test condition min typ max bus cycle time write t cycw ns figure 2 2 00 ? ? read t cycr ns figure 2 3 00 ? ? write low-level pulse width pw lw ns figure 2 40 ? ? read low-level pulse width pw lr ns figure 2 1 50 ? ? write high -level pulse width pw hw ns figure 2 100 ? ? read high -level pulse width pw hr ns figure 2 1 00 ? ? write/read rise/fall time t wrr , wrf ns figure 2 ? ? 25 set up time (rs to cs*, wr*, rd*) t as ns figure 2 10 ? ? address hold time t ah ns figure 2 2 ? ? write data set up time t dsw ns figure 2 60 ? ? write data hold time t h ns figure 2 2 ? ? read data delay time t ddr ns figure 2 ? ? 2 00 read data hold time t dhr ns figure 2 5 ? ? high-speed write mode (hwm=1) (vcc = 2. 4 to 3.6 v) item symbol unit test condition min typ max write t cyc w ns figure 2 1 00 ? ? bus cycle time read t cycr ns figure 2 3 00 ? ? write low -level pulse width pw lw ns figure 2 40 ? ? read low -level pulse width pw lr ns figure 2 1 50 ? ? write high -level pulse width pw hw ns figure 2 4 0 ? ? read high -level pulse width pw hr ns figure 2 1 0 0 ? ? write/read rise/fall time t w rr , w rf ns figure 2 ? ? 25 set up time (rs to cs* , wr*, rd* ) t as ns figure 2 10 ? ? address hold time t ah ns figure 2 2 ? ? write data set up time t dsw ns figure 2 60 ? ? write data hold time t h ns figure 2 2 ? ? read data delay time t ddr ns figure 2 ? ? 1 00 read data hold time t dhr ns figure 2 5 ? ? 12/25 6.4 instruction code instruction list upper code lower code reg. no. register name r/ w rs db 15 db 14 db 13 db 12 db 11 db 10 db 9 db 8 db 7 db 6 db 5 db 4 db 3 db 2 db 1 db 0 description exe cu- tion cyc le ir index 0 0 * * * * * * * * * id6 id5 id4 id3 id2 id1 id0 sets the index register value. 0 note1 sr status read 1 0 l7 l6 l5 l4 l3 l2 l1 l0 0 c6 c5 c4 c3 c2 c1 c0 reads the driving raster-row position (l7 ? 0) and contrast setting (c6 ? 0). 0 r00h start oscillation 0 1 * * * * * * * * * * * * * * * 1 starts the oscillation mode. 10 ms note1 device code read 1 1 0 0 0 0 0 1 1 1 0 1 1 0 0 1 1 0 reads 0766h. 0 r01h driver output control 0 1 0 0 0 0 0 0 cm s sgs 0 0 0 nl4 nl3 nl2 nl1 nl0 sets the common driver shift direction (cms), segment driver shift direction (sgs) and driving duty ratio (nl4 ? 0). 0 r02h lcd- driving- waveform control 0 1 0 0 0 0 0 rst b/c eor 0 0 nw 5 nw 4 nw 3 nw 2 nw 1 nw 0 sets lcd drive ac waveform (b/c), and eor output (eor) or the number of n-raster-rows (nw5 ? 0) at c-pattern ac drive. 0 r03h power control 1 0 1 bs3 bs2 bs1 bs0 bt3 bt2 bt1 bt0 0 dc2 dc1 dc0 ap1 ap0 slp stb sets the sleep mode (slp), standby mode (stb), lcd power on (ap1 ? 0), boosting cycle (dc2 ? 0), boosting output multiplying factor (bt 2 ? 0), operation of voltage inverting circuit (bt3) and lcd drive bias value (bs3 ? 0). 0 r04h contrast control 0 1 0 0 0 0 0 vr2 vr1 vr0 0 ct6 ct5 ct4 ct3 ct2 ct1 ct0 sets the regulator adjustment (vr2 ? 0) and contrast adjustment (ct6 ? 0). 0 r05h entry mode 0 1 spr 0 0 0 0 0 hwm 0 0 0 i/d1 i/d0 am lg2 lg1 lg0 specifies ac counter mode (am), increment/decrement mode (i/d1 ? 0), high-speed write mode (hwm). 0 note2 r06h compare resister 0 1 cp1 5 cp1 4 cp1 3 cp1 2 cp1 1 cp1 0 cp9 cp8 cp7 cp6 cp5 cp4 cp3 cp2 cp1 cp0 specifies the compare resister (cp15-0), 0 r07h display control 0 1 0 0 0 0 0 vle2 vle1 spt 0 0 0 0 b/w rev d1 d0 specifies display on (d1-0), black- and-white reversed display (rev), pixel on/off mode ( al b), screen division driving (spt) and vertical scroll .(vle2-1) 0 r0bh frame frequency control 0 1 0 0 0 0 0 0 div 1 div 0 0 0 0 0 rtn 3 rtn 2 rtn 1 rtn 0 specifies the line retrace period (rtn3 ? 0) and operating clock frequency division ratio (div1 ? 0). 0 r0ch power control 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 vc2 vc1 vc0 sets the adjustment factor for the vci voltage (vc2 ? 0). 0 r11h vertical scroll control 0 1 vl2 7 vl2 6 vl2 5 vl2 4 vl2 3 vl2 2 vl2 1 vl2 0 vl1 7 vl1 6 vl1 5 vl1 4 vl1 3 vl1 2 vl1 1 vl1 0 sets the 1 st screen display start raster - row (vl17-10) and 2 nd screen display start raster - row (vl27-20) . 0 r14h 1 st screen driving position 0 1 se 17 se 16 se 15 se 14 se 13 se 12 se 11 se 10 ss 17 ss 16 ss 15 ss 14 ss 13 ss 12 ss 11 ss 10 sets the 1 st screen driving start position (ss17 ? 10) and 1 st screen driving end position (se17 ? 10). 0 r15h 2 nd screen driving position 0 1 se 27 se 26 se 25 se 24 se 23 se 22 se 21 se 20 ss 27 ss 26 ss 25 ss 24 ss 23 ss 22 ss 21 ss 20 sets 2 nd screen driving start position (ss27 ? 20) and 2 nd screen driving end position (se27 ? 20). 0 r16h horizontal ram address position 0 1 he a 7 hea 6 hea 5 hea 4 hea 3 hea 2 hea 1 hea 0 hsa 7 hsa 6 hsa 5 hsa 4 hsa 3 hsa 2 hsa 1 hsa 0 sets start (hsa7 ? 0) and end (hea 7 ? 0) of the horizontal ram address range. 0 r17h vertical ram address position 0 1 vea 7 vea 6 vea 5 vea 4 vea 3 vea 2 vea 1 vea 0 vsa 7 vsa 6 vsa 5 vsa 4 vsa 3 vsa 2 vsa 1 vsa 0 sets start (vsa7 ? 0) and end (vea7 ? 0) of the vertical ram address range. 0 r20h ram write data mask 0 1 wm 15 wm 14 wm 13 wm 12 wm 11 wm 10 wm 9 wm 8 wm 7 wm 6 wm 5 wm 4 wm 3 wm 2 wm 1 wm 0 specifies write data mask (wm1 5 ? 0) at ram write. 0 13/25 instruction list (cont.) upper code lower code reg. no. register name r/ w rs db 15 db 14 db 13 db 12 db 11 db 10 db 9 db 8 db 7 db 6 db 5 db 4 db 3 db 2 db 1 db 0 description execu- tion cycle r21h ram address set 0 1 ad15 ? 8 (upper) ad 6 ? 0 (lower) initially set the ram address to the address counter (ac). 0 r22 ram data write 0 1 write data (upper) write data (lower) writes data to the ram. 0 ram data read 1 1 read data (upper) read data (lower) reads data from the ram. 0 r30h grayscale palette control (1) 0 1 0 0 pk15 pk14 pk13 pk12 pk11 pk10 0 0 pk 05 pk04 pk03 pk02 pk01 pk00 specifies the grayscale palette. 0 r31h g rayscale palette control (2) 0 1 0 0 pk35 pk34 pk33 pk32 pk31 pk30 0 0 pk25 pk24 pk23 pk22 pk21 pk20 specifies the grayscale palette. 0 r32h g rayscale palette control (3) 0 1 0 0 pk55 pk54 pk53 pk52 pk51 pk50 0 0 pk45 pk44 pk43 pk42 pk41 pk40 specifies the grayscale palette. 0 r33h g rayscale palette control (4) 0 1 0 0 pk75 pk74 pk73 pk72 pk71 pk70 0 0 pk65 pk64 pk63 pk62 pk61 pk60 specifies the grayscale palette. 0 r34h grayscale palette control ( 5 ) 0 1 0 0 pk95 pk94 pk93 pk92 pk91 pk90 0 0 pk85 pk84 pk83 pk82 pk81 pk80 specifies the grayscale palette. 0 r35h grayscale palette control ( 6 ) 0 1 0 0 pk 115 pk 114 pk 113 pk 112 pk 111 pk 110 0 0 pk 105 pk 104 pk 103 pk 102 pk 101 pk 100 specifies the grayscale palette. 0 r36h grayscale palette control ( 7 ) 0 1 0 0 pk 135 pk 134 pk 133 pk 132 pk 131 pk 130 0 0 pk 125 pk 124 pk 123 pk 122 pk 121 pk 120 specifies the grayscale palette. 0 r37h grayscale palette control ( 8 ) 0 1 0 0 pk 155 pk 154 pk 153 pk 152 pk 151 pk 150 0 0 pk 145 pk 144 pk 143 pk 142 pk 141 pk 140 specifies the grayscale palette. 0 r3 8 h grayscale palette control ( 9 ) 0 1 0 0 pk 175 pk 174 pk 173 pk 172 pk 171 pk 170 0 0 pk 165 pk 164 pk 163 pk 162 pk 161 pk 160 specifies the grayscale palette. 0 r39h grayscale palette control ( 10 ) 0 1 0 0 pk 195 pk 194 pk 193 pk 192 pk 191 pk 190 0 0 pk 185 pk 184 pk 183 pk 182 pk 181 pk 180 specifies the grayscale palette. 0 r3ah grayscale palette control ( 11 ) 0 1 0 0 pk 215 pk 214 pk 213 pk 212 pk 211 pk 210 0 0 pk 205 pk 204 pk 203 pk 202 pk 201 pk 200 specifies the grayscale palette. 0 r3bh grayscale palette control ( 12 ) 0 1 0 0 pk 235 pk 234 pk 233 pk 232 pk 231 pk 230 0 0 pk 2 2 5 pk 224 pk 223 pk 222 pk 221 pk 220 specifies the grayscale palette. 0 r3ch grayscale palette control ( 13 ) 0 1 0 0 pk 255 pk 254 pk 253 pk 252 pk 251 pk 250 0 0 pk 255 pk 244 pk 243 pk 242 pk 241 pk 240 specifies the grayscale palette. 0 r3dh grayscale palette control ( 14 ) 0 1 0 0 pk 275 pk 274 pk 273 pk 272 pk 271 pk 270 0 0 pk 265 pk 264 pk 263 pk 262 pk 261 pk 260 specifies the grayscale palette. 0 r3eh grayscale palette control ( 15 ) 0 1 0 0 pk 295 pk 294 pk 293 pk 292 pk 291 pk 290 0 0 pk 28 5 pk 284 pk 283 pk 282 pk 281 pk 280 specifies the grayscale palette. 0 r3fh grayscale palette control ( 16 ) 0 1 0 0 pk 315 pk 314 pk 313 pk 312 pk 311 pk 310 0 0 pk 305 pk 304 pk 303 pk 302 pk 301 pk 300 specifies the grayscale palette. 0 note: 1 . ? * ? means doesn ? t matter. 2. high-speed write mode is available only for the ram writing. 14/25 7. optical characteristics 7.1 optical characteristics v lcd =16.8v ta=25 ?? item symbol condition min. typ. max. unit | x | y =0 ?? -40 -- +35 viewing angle | y c r 2 | x =0 ?? -30 -- +30 deg contrast ratio c r | x =0 ?? | y =0 ?? 15 - - turn on t on - - 200 response time turn off t off | x =0 ?? | y =0 ?? - - 200 ms y - tbd - cd/m 2 x - tbd - red y | x =0 ?? | y =0 ?? - tbd - y - tbd - cd/m 2 x - tbd - green y | x =0 ?? | y =0 ?? - tbd - y - tbd - cd/m 2 x - tbd - color of cie coord- inate blue y | x =0 ?? | y =0 ?? - tbd - 15/25 7.2 definition of optical characteristics 7.2.1 definition of viewing angle top top bottom bottom 7.2.2 definition of contrast ratio brightness state selected brightness state unselected = b2/b1 = ratio contrast measuring conditions: 1) ambient temperature: 25 ?? ; 2) frame frequency: 70.0hz 7.2.3 definition of response time turn on time: t on = t d + t r turn off time: t off = t d + t f measuring condition: 1) operating voltage: 16.8v 2) frame frequency: 70.0hz 16/25 7.3 brightness characteristic item symbol condition min. typ. max. unit brightness bp 65 - - cd/m 2 uniformity ? bp ta=25 ?? 3 ?? 30-80%rh - - 60 % note: 1. the data is measured after ccfl s are turned on for 5 minutes. 2. testing conditions ccfl: v cf = 270 v (ac) lcd: all dots are on (white color) 3. brightness in the center of the lcd panel. 4. definition of uniformity ( ? bp) ? bp = bp (min.) / bp (max.) x 100 (%) bp (max.) = maximum brightness in 9 measurement spots bp (min.) = minimum brightness in 9 measurement spots 17/25 8. reliability 8.1 content of reliability test ta=25 ?? no. test item content of test test condition 1 high temperature storage endurance test applying the high storage temperature for a long time 80 ?? 2 ?? 240h restore 4h at 25 ?? 2 low temperature storage endurance test applying the low storage temperature for a long time -30 ?? 2 ?? 240h restore 4h at 25 ?? 3 high temperature /humidity storage endurance test applying the high temperature and high humidity storage for a long time 70 ?? 2 ?? 90%rh 240h restore 4h at 25 ?? 4 temperature cycle endurance test applying the low and high temperature cycle -30 ????? 25 ????? 80 ????? 25 ?? 30min 5min 30min 5min ??????????????? 1 cycle -30 ?? /80 ?? 10 cycles restore 4h at 25 ?? 5 vibration test (package state) endurance test applying the vibration during transportation 10hz~150hz, 100m/s 2 , 120min 6 shock test (package state) endurance test applying the shock during transportation half- sine wave, 300m/s 2 , 18ms 7 atmospheric pressure test endurance test applying the atmospheric pressure during transportation by air 25kpa 16h restore 2h 18/25 8.2 failure judgment criterion test item no. criterion item 12 3 4 56789 failure judgement criterion basic specification out of the basic specification electrical specification out of the electrical specification mechanical specification out of the mechanical specification optical characteristic out of the optical specification note for test item refer to 8.1 remark basic specification = optical specification + mechanical specification 19/25 9. quality level inspection examination or test at t a =25 ?? (unless otherwise stated) min. max. unit il aql external visual inspection under normal illumination and eyesight condition, the distance between eyes and lcd is 25cm. see appendix a ii major 1.0 minor 2.5 display defects under normal illumination and eyesight condition, display on inspection. see appendix b ii major 1.0 minor 2.5 note: major defects: open segment or common, short, serious damages, leakage miner defects: others sampling standard conforms to gb2828 20/25 10. precautions for use of lcd modules 10.1 handling precautions 10.1.1 the display panel is made of glass. do not subject it to a mechanical shock by dropping it from a high place, etc. 10.1.2 if the display panel is damaged and the liquid crystal substance inside it leaks out, be sure not to get any in your mouth, if the substance comes into contact with your skin or clothes, promptly wash it off using soap and water. 10.1.3 do not apply excessive force to th e display surface or the adjoining areas since this may cause the color tone to vary. 10.1.4 the polarizer covering the display surface of the lcd module is soft and easily scratched. handle this polarizer carefully. 10.1.5 if the display surface is contamin ated, breathe on the surface and gently wipe it with a soft dry cloth. if still not completely clear, moisten cloth with one of the following solvents: ?a isopropyl alcohol ?a ethyl alcohol solvents other than those mentioned above may damage the polarizer. especially, do not use the following: ?a water ?a ketone ?a aromatic solvents 10.1.6 do not attempt to disassemble the lcd module. 10.1.7 if the logic circuit power is off, do not apply the input signals. 10.1.8 to prevent destruction of the elemen ts by static electricity, be careful to maintain an optimum work environment. a. be sure to ground the body when handling the lcd modules. b. tools required for assembly, such as soldering irons, must be properly ground. c. to reduce the amount of static electricity generated, do not conduct assembly and other work under dry conditions. d. the lcd module is coated with a film to protect the display surface. be care when peeling off this protecti ve film since static electricity may be generated. 21/25 10.2 storage precautions 10.2.1 when storing the lcd modules, avoid exposure to direct sunlight or to the light of fluorescent lamps. 10.2.2 the lcd modules should be stored under the storage temperature range. if the lcd modules will be stored for a long time, the recommend condition is: temperature : 0 ?? ?? 40 ?? relatively humidity: ? 80% 10.2.3 the lcd modules should be stored in the room without acid, alkali and harmful gas. 10.3 the lcd modules should be no falling and violent shocking during transportation, and also should avoid excessive press, water, damp and sunshine. 22/25 appendix a inspection items and criteria for appearance defects items contents criteria leakage not permitted rainbow according to the limit specimen wrong polarizer attachment not permitted not counted max. 3 defects allowed polarizer bubble between polarizer and glass <0.3mm 0.3mm ? ? 0.5mm scratches of polarizer according to the limit specimen not counted max. 3 spots allowed x<0.2mm 0.2mm ? x ? 0.5mm black spot (in viewing area) x=(a+b)/2 not counted max. 3 lines allowed black line (in viewing area) a<0.02mm 0.02mm ? a ? 0.05mm b ? 2.0mm max. 3 spots (lines) allowed progressive cracks not permitted 23/25 appendix a inspection item and criteria for appearance defects (continued) items contents criteria a b c ? 3mm ? w/5 ? t / 2 cracks on pads ? 2mm ? w/5 t/2 25/25 appendix b inspection items and criteria for display defects (continued) items content criteria not counted max. 2 defects allowed x ? 0.1mm 0.1mm ? x ? 0.2mm x=(a+b)/2 not counted max. 1 defects allowed a ? 0.1mm 0.1mm ? a ? 0.2mm d>0 max.3 defects allowed transfor- mation of segment max.2 defects allowed 0.8w ? a ? 1.2w a=measured value of width w=nominal value of width |
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