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  tpa6203a1 slos364 ? march 2002 1.25-w mono fully differential audio power amplifier features  1.25 w into 8 ? from a 5-v supply at thd = 1% (typ)  low supply current: 1.7 ma typ  shutdown control < 1 a  only five (1) external components ? improved psrr (90 db) and wide supply voltage (2.5 v to 5.5 v) for direct battery operation ? fully differential design reduces rf rectification ? improved cmrr eliminates two input coupling capacitors ? c (bypass) is optional due to fully differential design and high psrr applications  designed for wireless or cellular handsets and pdas description t he tpa6203a1 is a 1.25-w mono fully differential amplifier designed to drive a speaker with at least 8- ? impedance while consuming less than 37 mm 2 total printed-circuit board (pcb) area in most applications. this device operates from 2.5 v to 5.5 v, drawing only 1.7 ma of quiescent supply current. the tpa6203a1 is available in the space-saving 2 mm x 2 mm microstar junior ? bga package. f eatures like 85-db psrr from 90 hz to 5 khz, improved rf-rectification immunity, and small pcb area makes the tpa6203a1 ideal for wireless handsets. a fast start-up time of 4 s with minimal pop makes the tpa6203a1 ideal for pda applications. application circuit actual solution size 6,9 mm 5,25 mm (1) c b r i r i c s r f r f _ + v dd v o+ v o? gnd a3 b3 a1 b2 to battery c s bias circuitry in? in+ c3 c2 b1 + ? in from dac shutdown r i r i c1 (1) c (bypass) r f r f (1) c ( bypass ) is optional please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas i nstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. www.ti.com copyright ? 2002, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. microstar junior is a trademark of texas instruments.
tpa6203a1 slos364 ? march 2002 www.ti.com 2 these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foa m during storage or handling to prevent electrostatic damage to the mos gates. absolute maximum ratings over operating free-air temperature range unless otherwise noted (1) tpa6203a1 unit supply voltage, v dd ? 0.3 to 5.5 v input voltage, v i ? 0.3 to v dd +0.3 v continuous total power dissipation see dissipation rating table operating free-air temperature, t a ? 40 to 85 c junction temperature, t j ? 40 to 150 c storage temperature, t stg ? 65 to 150 c lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c (1) stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions min typ max unit supply voltage, v dd 2.5 5.5 v high-level input voltage, v ih shutdown 2 v low-level input voltage, v il shutdown 0.8 v operating free-air temperature, t a ? 40 85 c dissipation ratings package t a 25 c power rating derating factor t a = 70 c power rating t a = 85 c power rating gqv 1.10 w 8.8 w/ c 704 mw 572 mw ordering information packaged devices microstar junior ? (gqv) device TPA6203A1GQV symbolization aadi note: the gqv is available taped and reeled. to order taped and reeled parts, add the suffix r to the part number (TPA6203A1GQVr)
tpa6203a1 slos364 ? march 2002 www.ti.com 3 electrical characteristics t a = 25 c, gain = 1 v/v parameter test conditions min typ max unit |v oo | output offset voltage (measured differentially) v i = 0 v, v dd = 2.5 v to 5.5 v 9 mv psrr power supply rejection ratio v dd = 2.5 v to 5.5 v ? 90 ? 70 db v ic common-mode input voltage v dd = 2.5 v, 5.5 v, cmrr ? 60 db 0.5 v dd ? 0.8 v cmrr common mode rejection ratio v dd = 3.6 v to 5.5 v, v ic = 0.5 v to v dd ? 0.8 ? 70 ? 65 db cmrr common-mode rejection ratio v dd = 2.5 v, v ic = 0.5 v to 1.7 v ? 62 ? 60 db r l = 8 ? , v dd = 5.5 v 0.30 0.46 v ol low-level output voltage r l = 8 ? ? = 0 v or v dd = 3.6 v 0.22 v v ol low level out ut voltage v in+ v dd , v in ? 0 v or v in+ = 0 v, v in ? = v dd v dd = 2.5 v 0.19 0.26 v r l = 8 ? , v dd = 5.5 v 4.8 5.12 v oh high-level output voltage r l = 8 ? ? = 0 v or v dd = 3.6 v 3.28 v v oh high level out ut voltage v in+ v dd , v in ? 0 v or v in+ = 0 v, v in ? = v dd v dd = 2.5 v 2.1 2.24 v |i ih | high-level input current v dd = 5.5 v, v i = 5.8 v 1.2 a |i il | low-level input current v dd = 5.5 v, v i = ? 0.3 v 1.2 a i dd supply current v dd = 2.5 v to 5.5 v, no load, shutdown = 2 v 1.7 2 ma i dd(sd) supply current in shutdown mode shutdown = 0.8 v, v dd = 2.5 v to 5.5 v, no load 0.01 0.9 a operating characteristics t a = 25 c, gain = 1 v/v, r l = 8 ? parameter test conditions min typ max unit v dd = 5 v 1.25 p o output power thd + n= 1%, f = 1 khz v dd = 3.6 v 0.63 w p o out ut ower thd + n 1%, f 1 khz v dd = 2.5 v 0.3 w v dd = 5 v, p o = 1 w, f = 1 khz 0.06% thd+n total harmonic distortion plus noise v dd = 3.6 v, p o = 0.5 w, f = 1 khz 0.07% thd+n total harmonic distortion lus noise v dd = 2.5 v, p o = 200 mw, f = 1 khz 0.08% c (bypass) = 0.47 f, v dd = 3.6 v to 5.5 v, inputs ac-grounded with c i = 2 f f = 217 hz to 2 khz, v ripple = 200 mv p ? p ? 87 k svr supply ripple rejection ratio c (bypass) = 0.47 f, v dd = 2.5 v to 3.6 v, inputs ac-grounded with c i = 2 f f = 217 hz to 2 khz, v ripple = 200 mv p ? p ? 82 db c (bypass) = 0.47 f, v dd = 2.5 v to 5.5 v, inputs ac-grounded with c i = 2 f f = 40 hz to 20 khz, v ripple = 200 mv p ? p ? 74 snr signal-to-noise ratio v dd = 5 v, p o = 1 w 104 db v output voltage noise f 20hzto20khz no weighting 17 v v n output voltage noise f = 20 hz to 20 khz a weighting 13 v rms cmrr common mode rejection ratio v dd = 2.5 v to 5.5 v, f = 20 hz to 1 khz ? 85 db cmrr common-mode rejection ratio v dd = 2 . 5 v to 5 . 5 v , v icm = 200 mv p ? p f = 20 hz to 20 khz ? 74 db z i input impedance 2 m ? shutdown attenuation f = 20 hz to 20 khz ? 80 db
tpa6203a1 slos364 ? march 2002 www.ti.com 4 (side view) microstar junior  (gqv) package (top view) shutdown in+ v dd v o+ gnd v o ? in ? a b c 12 3 bypass terminal functions terminal i/o description name no. i/o description bypass c1 i mid-supply voltage. connect a capacitor to gnd for bypass voltage filtering. bypass capacitor is optional. gnd b2 i high-current ground in ? c3 i negative differential input in+ c2 i positive differential input shutdown b1 i shutdown terminal. pull this pin low ( 0.8 v) to place the device in shutdown and pull it high ( 2 v) for active mode. v dd a3 i supply voltage terminal v o+ b3 o positive btl output v o ? a1 o negative btl output
tpa6203a1 slos364 ? march 2002 www.ti.com 5 typical characteristics table of graphs figure p o output power vs supply voltage 1 p o output power vs load resistance 2, 3 p d power dissipation vs output power 4, 5 maximum ambient temperature vs power dissipation 6 vs output power 7, 8 total harmonic distortion + noise vs frequency 9, 10, 11, 12 total harmonic distortion + noise vs common-mode input voltage 13 supply voltage rejection ratio vs frequency 14, 15, 16, 17 supply voltage rejection ratio vs common-mode input voltage 18 gsm power supply rejection vs time 19 gsm power supply rejection vs frequency 20 cmrr common mode rejection ratio vs frequency 21 cmrr common-mode rejection ratio vs common-mode input voltage 22 closed loop gain/phase vs frequency 23 open loop gain/phase vs frequency 24 i supply current vs supply voltage 25 i dd supply current vs shutdown voltage 26 start-up time vs bypass capacitor 27
tpa6203a1 slos364 ? march 2002 www.ti.com 6 typical characteristics figure 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2.5 3 3.5 4 4.5 5 v dd ? supply voltage ? v ? output power ? w output power vs supply voltage p o r l = 8 ? f = 1 khz gain = 1 v/v thd+n = 1% thd+n = 10% figure 2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 8 13182328 v dd = 5 v v dd = 3.6 v v dd = 2.5 v r l ? load resistance ? ? output power vs load resistance ? output power ? w p o f = 1 khz thd+n = 1% gain = 1 v/v 32 figure 3 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 8 13182328 v dd = 5 v v dd = 3.6 v v dd = 2.5 v r l ? load resistance ? ? output power vs load resistance ? output power ? w p o f = 1 khz thd+n = 10% gain = 1 v/v 32 figure 4 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 0.2 0.4 0.6 0.8 8 ? 16 ? p o ? output power ? w ? power dissipation ? w power dissipation vs output power p d v dd = 3.6 v figure 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 8 ? 16 ? p o ? output power ? w ? power dissipation ? w power dissipation vs output power p d v dd = 5 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 figure 6 0 10 20 30 40 50 60 70 80 90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 p d ? power dissipation ? w maximum ambient temperature ? maximum ambient temperature vs power dissipation c figure 7 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 m 3 100 m 1 2 p o ? output power ? w thd+n ? total harmonic distortion + noise ? % total harmonic distortion + noise vs output power 2.5 v 3.6 v 5 v figure 8 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 m 100 m 1 2 p o ? output power ? w thd+n ? total harmonic distortion + noise ? % total harmonic distortion + noise vs output power 2.5 v 5 v 3.6 v r l = 16 ? f = 1 khz c i = 2 f c (bypass) = 0 to 1 f gain = 1 v/v figure 9 v dd = 5 v c i = 2 f r l = 8 ? c (bypass) = 0 to 1 f gain = 1 v/v 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 20 k 100 200 1 k 2 k 10 k f ? frequency ? hz total harmonic distortion + noise vs frequency thd+n ? total harmonic distortion + noise ? % 50 mw 250 mw 1 w
tpa6203a1 slos364 ? march 2002 www.ti.com 7 typical characteristics figure 10 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz total harmonic distortion + noise vs frequency thd+n ? total harmonic distortion + noise ? % 25 mw 125 mw 500 mw v dd = 3.6 v c i = 2 f r l = 8 ? c (bypass) = 0 to 1 f gain = 1 v/v figure 11 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz total harmonic distortion + noise vs frequency thd+n ? total harmonic distortion + noise ? % 15 mw 200 w 75 mw v dd = 2.5 v c i = 2 f r l = 8 ? c (bypass) = 0 to 1 f gain = 1 v/v figure 12 v dd = 3.6 v c i = 2 f r l = 16 ? c (bypass) = 0 to 1 f gain = 1 v/v 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz total harmonic distortion + noise vs frequency thd+n ? total harmonic distortion + noise ? % 25 mw 250 mw 125 mw figure 13 0.01 0.10 1 10 0 0.5 1 1.5 2 2.5 3 3.5 v dd = 2.5 v v dd = 3.6 v f = 1 khz p o = 200 mw v ic ? common mode input voltage ? v total harmonic distortion + noise vs common mode input voltage thd+n ? total harmonic distortion + noise ? % figure 14 ? 100 0 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k v dd = 3.6 v v dd = 5 v v dd =2. 5 v f ? frequency ? hz ? supply voltage rejection ratio ? db supply voltage rejection ratio vs frequency k svr c i = 2 f r l = 8 ? c (bypass) = 0.47 f v p-p = 200 mv inputs ac-grounded gain = 1 v/v figure 15 ? 100 0 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz ? supply voltage rejection ratio ? db supply voltage rejection ratio vs frequency k svr v dd = 3.6 v v dd = 5 v v dd =2. 5 v gain = 5 v/v c i = 2 f r l = 8 ? c (bypass) = 0.47 f v p-p = 200 mv inputs ac-grounded figure 16 ? 100 0 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz ? supply voltage rejection ratio ? db supply voltage rejection ratio vs frequency k svr v dd =2. 5 v v dd = 5 v v dd = 3.6 v c i = 2 f r l = 8 ? inputs floating gain = 1 v/v figure 17 v dd = 3.6 v c i = 2 f r l = 8 ? inputs ac-grounded gain = 1 v/v ? 100 0 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz ? supply voltage rejection ratio ? db supply voltage rejection ratio vs frequency k svr c (bypass) = 0.1 f c (bypass) = 0 c (bypass) = 0.47 f c (bypass) = 1 f figure 18 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 0123 45 v ic ? common mode input voltage ? v supply voltage rejection ratio vs common-mode input voltage f = 217 hz c (bypass) = 0.47 f r l = 8 ? gain = 1 v/v v dd = 2.5 v v dd = 3.6 v v dd = 5 v ? supply voltage rejection ratio ? db k svr
tpa6203a1 slos364 ? march 2002 www.ti.com 8 typical characteristics c1 frequency 217.41 hz c1 ? duty 20 % c1 high 3.598 v c1 pk ? pk 504 mv voltage ? v ch1 100 mv/div ch4 10 mv/div 2 ms/div t ? time ? ms v dd v o gsm power supply rejection vs time figure 19 f ? frequency ? hz 0 ? 50 ? 100 0 200 400 600 800 1k 1.2k ? output voltage ? dbv 1.4k 1.6k 1.8k 2k ? 150 ? 150 ? 100 0 ? 50 v o ? supply voltage ? dbv v dd v dd shown in figure 19 c i = 2 f, c (bypass) = 0.47 f, inputs ac-grounded gain = 1v/v gsm power supply rejection vs frequency figure 20 figure 21 ? 100 0 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k f ? frequency ? hz common-mode rejection ratio vs frequency cmrr ? common mode rejection ratio ? db v dd = 2.5 v to 5 v v cm = 200 mv p ? p r l = 8 ? gain = 1 v/v figure 22 ? 100 ? 90 ? 80 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 r l = 8 ? gain = 1 v/v v ic ? common mode input voltage ? v common-mode rejection ratio vs common-mode input voltage cmrr ? common mode rejection ratio ? db v dd = 3.6 v v dd = 5 v v dd = 2.5 v figure 23 ? 70 ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 0 10 20 30 40 10 100 10 k 100 k 1 m 10 m ? 220 ? 180 ? 140 ? 100 ? 60 ? 20 20 60 100 140 180 220 1 k f ? frequency ? hz gain ? db phase ? degrees gain phase v dd = 3.6 v r l = 8 ? gain = 1 v/v closed loop gain/phase vs frequency figure 24 ? 200 ? 150 ? 100 ? 50 0 50 100 150 200 100 1 k 10 k 100 k 1 m ? 200 ? 150 ? 100 ? 50 0 50 100 150 200 f ? frequency ? hz gain ? db open loop gain/phase vs frequency phase ? degrees gain phase v dd = 3.6 v r l = 8 ? 10 m
tpa6203a1 slos364 ? march 2002 www.ti.com 9 typical characteristics figure 25 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v dd ? supply voltage ? v ? supply current ? ma supply current vs supply voltage i dd figure 26 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 v dd = 2.5 v v dd = 3.6 v v dd = 5 v voltage on shutdown terminal ? v supply current vs shutdown voltage ? supply current ? ma i dd 0.2 0 1 2 3 4 5 6 0 0.5 1 1.5 2 c (bypass) ? bypass capacitor ? f start-up time ? ms start-up time (1) vs bypass capacitor (1) start-up time is the time it takes (from a low-to-high transition on shutdown ) for the gain of the amplifier to reach ? 3 db of the final gain. figure 27
tpa6203a1 slos364 ? march 2002 www.ti.com 10 application information fully differential amplifier the tpa6203a1 is a fully differential amplifier with differential inputs and outputs. the fully differential amplifier consists of a differential amplifier and a common-mode amplifier. the differential amplifier ensures that the amplifier outputs a differential voltage that is equal to the differential input times the gain. the common-mode feedback ensures that the common-mode voltage at the output is biased around v dd /2 regardless of the common-mode voltage at the input. advantages of fully differential amplifiers  input coupling capacitors not required: a fully differential amplifier with good cmrr, like the tpa6203a1, allows the inputs to be biased at voltage other than mid-supply. for example, if a dac has mid-supply lower than the mid-supply of the tpa6203a1, the common-mode feedback circuit adjusts for that, and the tpa6203a1 outputs are still biased at mid-supply of the tpa6203a1. the inputs of the tpa6203a1 can be biased from 0.5 v to v dd ? 0.8 v. if the inputs are biased outside of that range, input coupling capacitors are required.  mid-supply bypass capacitor, c (bypass) , not required: the fully differential amplifier does not require a bypass capacitor. this is because any shift in the mid-supply affects both positive and negative channels equally and cancels at the differential output. however, removing the bypass capacitor slightly worsens power supply rejection ratio (k svr ), but a slight decrease of k svr may be acceptable when an additional component can be eliminated (see figure 17).  better rf-immunity: gsm handsets save power by turning on and shutting off the rf transmitter at a rate of 217 hz. the transmitted signal is picked-up on input and output traces. the fully differential amplifier cancels the signal much better than the typical audio amplifier. application schematics figure 28 through figure 31 show application schematics for differential and single-ended inputs. typical values are shown in table 1. table 1. typical component values component value r i 10 k ? r f 10 k ? c (bypass) (1) 0.22 f c s 1 f c i 0.22 f (1) c (bypass) is optional ? c (bypass) is optional _ + v dd v o+ v o ? gnd a3 b3 a1 b2 to battery c s bias circuitry in ? in+ c3 c2 b1 + ? in from dac shutdown r i r i c1 c (bypass) r f r f ? figure 28. typical differential input application schematic
tpa6203a1 slos364 ? march 2002 www.ti.com 11 _ + v dd v o+ v o ? gnd a3 b3 a1 b2 to battery c s bias circuitry in ? in+ c3 c2 b1 + ? in shutdown r i r i c1 c (bypass) r f r f ? ? c (bypass) is optional c i c i figure 29. differential input application schematic optimized with input capacitors _ + v dd v o+ v o ? gnd a3 b3 a1 b2 to battery c s bias circuitry in ? in+ c3 c2 b1 in shutdown r i c1 c (bypass) r f c i ? c (bypass) is optional ? figure 30. single-ended input application schematic optimized for reduced component count _ + v dd v o+ v o ? gnd a3 b3 a1 b2 to battery c s bias circuitry in ? in+ c3 c2 b1 in shutdown r i c1 c (bypass) r f ? ? c (bypass) is optional c i c i r i r f figure 31. single-ended input application schematic optimized for performance
tpa6203a1 slos364 ? march 2002 www.ti.com 12 selecting components resistors (r f and r i ) the input (r i ) and feedback resistors (r f ) set the gain of the amplifier according to equation 1. gain = r f /r i r f and r i should range from 1 k ? to 100 k ? . most graphs were taken with r f = r i = 20 k ? . resistor matching is very important in fully differential amplifiers. the balance of the output on the reference voltage depends on matched ratios of the resistors. cmrr, psrr, and the cancellation of the second harmonic distortion diminishes if resistor mismatch occurs. therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. bypass capacitor (c bypass ) and start-up time the internal voltage divider at the bypass pin of this device sets a mid-supply voltage for internal references and sets the output common mode voltage to v dd /2. adding a capacitor to this pin filters any noise into this pin and increases the k svr . c (bypass) also determines the rise time of v o+ and v o ? when the device is taken out of shutdown. the larger the capacitor, the slower the rise time. although the output rise time depends on the bypass capacitor value, the device passes audio 4 s after taken out of shutdown and the gain is slowly ramped up based on c (bypass) . input capacitor (c i ) the tpa6203a1 does not require input coupling capacitors if using a differential input source that is biased from 0.5 v to v dd ? 0.8 v. use 1% tolerance or better gain-setting resistors if not using input coupling capacitors. in the single-ended input application an input capacitor, c i , is required to allow the amplifier to bias the input signal to the proper dc level. in this case, c i and r i form a high-pass filter with the corner frequency determined in equation 2. f c  1 2  r i c i ? 3 db f c the value of c i is important to consider as it directly affects the bass (low frequency) performance of the circuit. consider the example where r i is 10 k ? and the specification calls for a flat bass response down to 100 hz. equation 2 is reconfigured as equation 3. c i  1 2  r i f c in this example, c i is 0.16 f, so one would likely choose a value in the range of 0.22 f to 0.47 f. a further consideration for this capacitor is the leakage path from the input source through the input network (r i , c i ) and the feedback resistor (r f ) to the load. this leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. for this reason, a ceramic capacitor is the best choice. when polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications, as the dc level there is held at v dd /2, which is likely higher than the source dc level. it is important to confirm the capacitor polarity in the application. decoupling capacitor (c s ) the tpa6203a1 is a high-performance cmos audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (thd) is as low as possible. power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. for higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series- resistance (esr) ceramic capacitor, typically 0.1 f to 1 f, placed as close as possible to the device v dd lead works best. for filtering lower frequency noise signals, a 10- f or greater capacitor placed near the audio power amplifier also helps, but is not required in most applications because of the high psrr of this device. using low-esr capacitors low-esr capacitors are recommended throughout this applications section. a real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. the voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. the lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor. differential output versus single- ended output figure 32 shows a class-ab audio power amplifier (apa) in a fully differential configuration. the tpa6203a1 amplifier has differential outputs driving both ends of the load. there are several potential benefits to this differential drive configuration, but initially consider power to the load. the differential drive to the speaker means that as one side (1) (2) (3)
tpa6203a1 slos364 ? march 2002 www.ti.com 13 is slewing up, the other side is slewing down, and vice versa. this in effect doubles the voltage swing on the load as compared to a ground referenced load. plugging 2 v o(pp) into the power equation, where voltage is squared, yields 4 the output power from the same supply rail and load impedance (see equation 4). v (rms)  v o(pp) 22  power  v (rms) 2 r l r l 2x v o(pp) v o(pp) ? v o(pp) v dd v dd figure 32. differential output configuration in a typical wireless handset operating at 3.6 v, bridging raises the power into an 8- ? speaker from a singled-ended (se, ground reference) limit of 200 mw to 800 mw. in sound power that is a 6-db improvement ? which is loudness that can be heard. in addition to increased power there are frequency response concerns. consider the single-supply se configuration shown in figure 33. a coupling capacitor is required to block the dc offset voltage from reaching the load. this capacitor can be quite large (approximately 33 f to 1000 f) so it tends to be expensive, heavy, occupy valuable pcb area, and have the additional drawback of limiting low-frequency performance of the system. this frequency limiting effect is due to the high pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 5. f c  1 2  r l c c for example, a 68- f capacitor with an 8- ? speaker would attenuate low frequencies below 293 hz. the btl configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. low-frequency performance is then limited only by the input network and speaker response. cost and pcb space are also minimized by eliminating the bulky coupling capacitor. r l c c v o(pp) v o(pp) v dd ? 3 db f c figure 33. single-ended output and frequency response increasing power to the load does carry a penalty of increased internal power dissipation. the increased dissipation is understandable considering that the btl configuration produces 4 the output power of the se configuration. fully differential amplifier efficiency and thermal information class-ab amplifiers are known to be inefficient. the primary cause of these inefficiencies is voltage drop across the output stage transistors. there are two components of the internal voltage drop. one is the headroom or dc voltage drop that varies inversely to output power. the second component is due to the sinewave nature of the output. the total voltage drop can be calculated by subtracting the rms value of the output voltage from v dd . the internal voltage drop multiplied by the average value of the supply current, i dd (avg), determines the internal power dissipation of the amplifier. an easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. to accurately calculate the rms and average values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see figure 34). (4) (5)
tpa6203a1 slos364 ? march 2002 www.ti.com 14 v (lrms) v o i dd i dd(avg) figure 34. voltage and current waveforms for btl amplifiers although the voltages and currents for se and btl are sinusoidal in the load, currents from the supply are very different between se and btl configurations. in an se application the current waveform is a half-wave rectified shape, whereas in btl it is a full-wave rectified waveform. this means rms conversion factors are different. keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the btl device only draws current from the supply for half the waveform. the following equations are the basis for calculating amplifier efficiency. efficiency of a btl amplifier  p l p sup where: p l  v l rms 2 r l , and v lrms  v p 2  , therefore, p l  v p 2 2r l p l = power delivered to load p sup = power drawn from power supply v lrms = rms voltage on btl load r l = load resistance v p = peak voltage on btl load i dd avg = average current drawn from the power supply v dd = power supply voltage btl = efficiency of a btl amplifier and p sup  v dd i dd avg and i dd avg  1    0 v p r l sin(t) dt  1   v p r l [ cos(t) ]  0  2v p  r l therefore, p sup  2v dd v p  r l substituting p l and p sup into equation 6, efficiency of a btl amplifier  v p 2 2r l 2v dd v p  r l   v p 4v dd v p  2p l r l  where:  btl   2p l r l  4v dd therefore, (6) (7)
tpa6203a1 slos364 ? march 2002 www.ti.com 15 table 2. efficiency and maximum ambient temperature vs output power in 5-v 8- ? btl systems output power (w) efficiency (%) internal dissipation (w) power from supply (w) max ambient temperature ( c) 0.25 31.4 0.55 0.75 87 0.50 44.4 0.62 1.12 78 1.00 62.8 0.59 1.59 82 1.25 70.2 0.53 1.78 89 table 2 employs equation 7 to calculate efficiencies for four different output power levels. note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. note that the internal dissipation at full output power is less than in the half power range. calculating the efficiency for a specific system is the key to proper power supply design. for a 1.25-w audio system with 8- ? loads and a 5-v supply, the maximum draw on the power supply is almost 1.8 w. a final point to remember about class-ab amplifiers is how to manipulate the terms in the efficiency equation to the utmost advantage when possible. note that in equation 7, v dd is in the denominator. this indicates that as v dd goes down, efficiency goes up. a simple formula for calculating the maximum power dissipated, p dmax , may be used for a differential output application: p dmax  2v 2 dd  2 r l p dmax for a 5-v, 8- ? system is 634 mw. the maximum ambient temperature depends on the heat sinking ability of the pcb system. the derating factor for the 2 mm x 2 mm microstar junior ? package is shown in the dissipation rating table (see page 2). converting this to ja : ja  1 derating factor  1 0.088  113 c  w given ja , the maximum allowable junction temperature, and the maximum internal dissipation, the maximum ambient temperature can be calculated with the following equation. the maximum recommended junction temperature for the tpa6203a1 is 150 c. t a max  t j max  ja p dmax  150  113 ( 0.634 )  78.4 c equation 10 shows that the maximum ambient temperature is 78.4 c at maximum power dissipation with a 5-v supply. table 2 shows that for most applications no airflow is required to keep junction temperatures in the specified range. the tpa6203a1 is designed with thermal protection that turns the device off when the junction temperature surpasses 150 c to prevent damage to the ic. also, using more resistive than 8- ? speakers dramatically increases the thermal performance by reducing the output current. (8) (9) (10)
tpa6203a1 slos364 ? march 2002 www.ti.com 16 pcb layout in making the pad size for the bga balls, it is recommended that the layout use solder-mask-defined (smd) land. with this method, the copper pad is made larger than the desired land area, and the opening size is defined by the opening in the solder mask material. the advantages normally associated with this technique include more closely controlled size and better copper adhesion to the laminate. increased copper also increases the thermal performance of the ic. better size control is the result of photo imaging the stencils for masks. small plated vias should be placed near the center ball connecting ball b2 to the ground plane. added plated vias and ground plane act as a heatsink and increase the thermal performance of the device. figure 35 shows the appropriate diameters for a 2mm x 2mm microstar junior ? bga layout. it is very important to keep the tpa6203a1 external components very close to the tpa6203a1 to limit noise pickup. the tpa6203a1 evaluation module (evm) layout is shown in the next section as a layout example. c1 c2 c3 b1 b3 a1 a3 0.25 mm 0.28 mm 0.38 mm solder mask past mask (stencil) copper trace b2 vias to ground plane figure 35. microstar junior ? bga recommended layout
tpa6203a1 slos364 ? march 2002 www.ti.com 17 tpa6203a1 evm pcb layers the following illustrations depict the tpa6203a1 evm pcb layers and silkscreen. these drawings are enlarged to better show the routing. gerber plots can be obtained from any ti sales office. fi g ure 36. tpa6203a1 evm to p la y er ( not to scale ) only required circuitry for most applications figure 37. tpa6203a1 evm bottom layer (not to scale)
tpa6203a1 slos364 ? march 2002 www.ti.com 18 mechanical data gqv (s-pbga-n8) plastic ball grid array 0,50 0,08 0,50 m ? 0,05 4201040/c 11/00 2,10 1,90 1,00 max 0,25 0,35 1 seating plane 1,00 typ a 1,00 typ 0,21 0,11 23 b c 0,68 0,62 sq (bottom view) notes:a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. microstar junior ? configuration d. falls within jedec mo-225 microstar junior is a trademark of texas instruments.
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti ? s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti ? s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third ? party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2002, texas instruments incorporated


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