integrated silicon solution, inc. ? 1-800-379-4774 1 rev. a 06/01/00 issi reserves the right to make changes to its products at any time without notice in order to improve design and supply the be st possible product. we assume no responsibility for any errors which may appear in this publication. ? copyright 2000, integrated silicon solution, inc. is62lv5128l is62lv5128ll issi ? description the issi is62lv5128l and is62lv5128ll is a low voltage, 524,288 words by 8 bits, cmos sram. it is fabricated using iss i?s low voltage, six transistor (6t), cmos technology. the device is targeted to satisfy the demands of the state-of-the-art technologies such as cell phones and pagers. when ce is high (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with cmos input levels. additionally, easy memory expansion is provided by using chip enable and output enable inputs, ce and oe . the active low write enable ( we ) controls both writing and reading of the memory. the is62lv5128l and is62lv5128ll are available in a 36-pin mini bga package. functional block diagram 512k x 8 low power and low vcc cmos static ram features access times of 70, 85 and 100 ns cmos low power operation: ? 120 mw (typical) operating ? 6 w (typical) standby low data retention voltage: 2v (min.) output enable ( oe ) and chip enable ( ce ) inputs for ease in applications ttl compatible inputs and outputs fully static operation: ? no clock or refresh required single 2.5v to 3.3v power supply available in 36-pin mini bga may 2000 a0-a18 oe we 512k x 8 memory array decoder column i/o control circuit gnd vcc i/o data circuit i/o0-i/o7 ce
2 integrated silicon solution, inc. ? 1-800-379-4774 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? truth table mode we ce oe i/o operation vcc current not selected x h x high-z i sb 1 , i sb 2 output disabled h l h high-z i cc read h l l d out i cc write l l x d in i cc pin descriptions a0-a18 address inputs ce chip enable input oe output enable input we write enable input i/o0-i/o7 input/output nc no connection vcc power gnd ground pin configuration 36-pin mini bga (b) operating range range ambient temperature v cc commercial 0 c to +70 c 2.5v to 3.3v industrial ? 40 c to +85 c 2.5v to 3.3v 1 2 3 4 5 6 a b c d e f g h a0 i/o4 i/o5 gnd vcc i/o6 i/o7 a9 a1 a2 oe a10 nc we nc a18 ce a11 a3 a4 a5 a17 a16 a12 a6 a7 a15 a13 a8 i/o0 i/o1 vcc gnd i/o2 i/o3 a14
integrated silicon solution, inc. ? 1-800-379-4774 3 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? absolute maximum ratings (1) symbol parameter value unit v term terminal voltage with respect to gnd ? 0.5 to vcc + 0.5 v v cc vcc related to gnd ? 0.3 to +4.0 v t bias temperature under bias ? 40 to +85 c t stg storage temperature ? 65 to +150 c p t power dissipation 1 w note: 1. stress greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. capacitance (1,2) symbol parameter conditions max. unit c in input capacitance v in = 0v 6 pf c out output capacitance v out = 0v 8 pf notes: 1. tested initially and after any design or process changes that may affect these parameters. 2. test conditions: t a = 25 c, f = 1 mhz, vcc = 3.0v. dc electrical characteristics (over operating range) symbol parameter test conditions min. max. unit v oh output high voltage v cc = 3.3v, i oh = ? 1.0 ma 2.2 ? v v cc = 2.5v, i oh = ? 0.5 ma 2.0 ? v ol output low voltage v cc = 3.0v, i ol = 2.1 ma ? 0.4 v v cc = 2.5v, i ol = 0.5 ma ? 0.4 v ih input high voltage 2.2 v cc + 0.3 v v il input low voltage (1) ? 0.2 0.4 v i li input leakage gnd v in v cc ? 11a i lo output leakage gnd v out v cc , o utputs disabled ? 11a note: 1. v il = ? 3.0v for pulse width less than 10 ns.
4 integrated silicon solution, inc. ? 1-800-379-4774 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? is62lv5128l power supply characteristics (1) (over operating range) -70 -85 -100 symbol parameter test conditions min. max. min. max. min. max. unit i cc vcc dynamic v cc = max., ce = v il com. ? 45 ? 40 ? 35 ma operating i out = 0 ma, f = f max ind. ? 50 ? 45 ? 40 supply current i cc 1 operating supply v cc = max., com. ? 5 ? 5 ? 5ma current i out = 0 ma, f = 0 ind. ? 5 ? 5 ? 5 i sb 1 ttl standby v cc = max., com. ? 0.4 ? 0.4 ? 0.4 ma current v in = v ih or v il , ind. ? 1.0 ? 1.0 ? 1.0 (ttl inputs) ce1 v ih or ce2 v il , f = 0 i sb 2 cmos standby v cc = max., f = 0 com. ? 15 ? 15 ? 15 a current ce1 v cc ? 0.2v, ind. ? 15 ? 15 ? 15 (cmos inputs) ce2 0.2v, or v in v cc ? 0.2v, v in 0.2v note: 1. at f = f max , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. is62lv5128ll power supply characteristics (1) (over operating range) -70 -85 -100 symbol parameter test conditions min. max. min. max. min. max. unit i cc vcc dynamic v cc = max., ce = v il com. ? 45 ? 40 ? 35 ma operating i out = 0 ma, f = f max ind. ? 50 ? 45 ? 40 supply current i cc 1 operating supply v cc = max., com. ? 5 ? 5 ? 5ma current i out = 0 ma, f = 0 ind. ? 5 ? 5 ? 5 i sb 1 ttl standby v cc = max., com. ? 0.4 ? 0.4 ? 0.4 ma current v in = v ih or v il , ind. ? 1.0 ? 1.0 ? 1.0 (ttl inputs) ce1 v ih or ce2 v il , f = 0 i sb 2 cmos standby v cc = max., f = 0 com. ? 5 ? 5 ? 5a current ce1 v cc ? 0.2v, ind. ? 5 ? 5 ? 5 (cmos inputs) ce2 0.2v, or v in v cc ? 0.2v, v in 0.2v note: 1. at f = f max , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
integrated silicon solution, inc. ? 1-800-379-4774 5 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? read cycle switching characteristics (1) (over operating range) -70 -85 -100 symbol parameter min. max. min. max. min. max. unit t rc read cycle time 70 ? 85 ? 100 ? ns t aa address access time ? 70 ? 85 ? 100 ns t oha output hold time 10 ? 15 ? 15 ? ns t ace ce access time ? 70 ? 85 ? 100 ns t doe oe access time ? 35 ? 40 ? 50 ns t hzoe (2) oe to high-z output ? 25 ? 25 ? 30 ns t lzoe (2) oe to low-z output 5 ? 5 ? 5 ? ns t lzce (2) ce to low-z output 10 ? 10 ? 10 ? ns t hzce (2) ce to high-z output 0 25 0 25 0 30 ns notes: 1. test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3v, input pulse levels of 0.4v t o 2.2v and output loading specified in figure 1. 2. tested with the load in figure 2. transition is measured 500 mv from steady-state voltage. not 100% tested. ac test conditions parameter unit input pulse level 0.4v to 2.2v input rise and fall times 5 ns input and output timing 1.5v and reference level output load see figures 1 and 2 ac test loads 3070 ? 5 pf including jig and scope 3150 ? output 2.8v 3070 ? 30 pf including jig and scope 3150 ? output 2.8v figure 1 figure 2
6 integrated silicon solution, inc. ? 1-800-379-4774 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? data valid t aa t oha t oha t rc dout address t rc t oha t aa t doe t lzoe t ace t lzce t hzoe high-z data valid t hzce address oe ce dout notes: 1. we is high for a read cycle. 2. the device is continuously selected. oe , ce = v il . 3. address is valid prior to or coincident with ce low transitions. read cycle no. 2 (1,3) ac waveforms read cycle no. 1 (1,2)
integrated silicon solution, inc. ? 1-800-379-4774 7 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? write cycle switching characteristics (1,3) (over operating range, standard and low power) -70 -85 -100 symbol parameter min. max. min. max. min. max. unit t wc write cycle time 70 ? 85 ? 100 ? ns t sce ce to write end 65 ? 70 ? 80 ? ns t aw address setup time to write end 65 ? 70 ? 80 ? ns t ha address hold from write end 0 ? 0 ? 0 ? ns t sa address setup time 0 ? 0 ? 0 ? ns t pwe (4) we pulse width 60 ? 60 ? 80 ? ns t sd data setup to write end 30 ? 35 ? 40 ? ns t hd data hold from write end 0 ? 0 ? 0 ? ns t hzwe (2) we low to high-z output ? 33 ? 35 ? 40 ns t lzwe (2) we high to low-z output 5 ? 5 ? 5 ? ns notes: 1. test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3v, input pulse levels of 0.4v to 2.2v and output loading specified in figure 1. 2. tested with the load in figure 2. transition is measured 500 mv from steady-state voltage. not 100% tested. 3. the internal write time is defined by the overlap of ce low and we low. all signals must be in valid states to initiate a write, but any one can go inactive to terminate the write. the data input setup and hold timing are referenced to the rising or falling edge of the signal that terminates the wri te. 4. tested with oe high. data-in valid data undefined t wc t sce t aw t ha t pwe (4) t hzwe high-z t lzwe t sa t sd t hd address ce we dout din ac waveforms write cycle no. 1 ( ce controlled, oe = high or low)
8 integrated silicon solution, inc. ? 1-800-379-4774 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? write cycle no. 2 ( we controlled: oe is high during write cycle) data-in valid data undefined t wc t sce t aw t ha t pwe1, 2 t hzwe high-z t lzwe t sa t sd t hd address oe ce we dout din data-in valid data undefined t wc t sce t aw t ha t pwe1, 2 t hzwe high-z t lzwe t sa t sd t hd address oe ce we dout din write cycle no. 3 ( we controlled: oe is low during write cycle)
integrated silicon solution, inc. ? 1-800-379-4774 9 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? data retention switching characteristics symbol parameter test condition min. max. unit v dr vcc for data retention see data retention waveform 2.0 3.6 v i dr data retention current vcc = 2.0v, ce vcc ? 0.2v com. ? 2a ind. ? 5a t sdr data retention setup time see data retention waveform 0 ? ns t rdr recovery time see data retention waveform t rc ? ns data retention waveform ( ce controlled) v cc ce v cc - 0.2v t sdr t rdr v dr ce gnd 3.0v 2.2v data retention mode
10 integrated silicon solution, inc. ? 1-800-379-4774 rev. a 06/01/00 is62lv5128l is62lv5128ll issi ? issi ? integrated silicon solution, inc. 2231 lawson lane santa clara, ca 95054 tel: 1-800-379-4774 fax: (408) 588-0806 e-mail: sales@issi.com www.issi.com ordering information is62lv5128l commercial range: 0 c to +70 c speed (ns) order part no. package 70 is62lv5128l-70b mini bga (6mm x 8mm) 85 IS62LV5128L-85B mini bga (6mm x 8mm) 100 is62lv5128l-10b mini bga (6mm x 8mm) industrial range: ? 40 c to +85 c speed (ns) order part no. package 70 is62lv5128l-70bi mini bga (6mm x 8mm) 85 IS62LV5128L-85Bi mini bga (6mm x 8mm) 100 is62lv5128l-10bi mini bga (6mm x 8mm) is62lv5128ll commercial range: 0 c to +70 c speed (ns) order part no. package 70 is62lv5128ll-70b mini bga (6mm x 8mm) 85 is62lv5128ll-85b mini bga (6mm x 8mm) 100 is62lv5128ll-10b mini bga (6mm x 8mm) industrial range: ? 40 c to +85 c speed (ns) order part no. package 70 is62lv5128ll-70bi mini bga (6mm x 8mm) 85 is62lv5128ll-85bi mini bga (6mm x 8mm) 100 is62lv5128ll-10bi mini bga (6mm x 8mm)
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