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for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 1-800-835-8769. general description the max3325 integrates a two-transmitter, two-receiver rs-232 transceiver with an lcd supply plus tempera- ture-compensated contrast control. it is intended for small 3v instruments requiring a 5v supply for either logic or an lcd display, an adjustable bias signal for contrast, lcd temperature compensation, and an rs-232 interface for serial communications. the 5v supply is a regulated charge pump followed by a low-dropout (ldo) linear regulator capable of supply- ing 11ma for the 5v lcd power. the max3325 has an internal 6-bit digital-to-analog converter (dac) providing 64 contrast levels, plus an internal temperature sensor that compensates the lcds contrast for changes in ambient temperature. the lcd contrast can be designed for any voltage range from -5v to +2v. the max3325s 250kbps rs-232 transceiver meets all eia-232e specifications with input voltages from +3.0v to +3.6v. both the rs-232 section and the lcd supply circuitry can be independently placed in shutdown, tai- loring power consumption for battery-powered equip- ment. the max3325 is available in 28-pin ssop and narrow dip packages. applications pdas and palmtop computers handy terminals gps receivers hand-held medical equipment industrial test equipment features ? +3.0v to +3.6v single-supply operation ? provides 5.0v regulated output at 11ma in 3v systems ? 6-bit dac with up/down interface for lcd contrast adjustment ? selectable positive or negative lcd bias ? meets eia-232e specifications at 250kbps guaranteed ? 1a shutdown mode ? uses small 0.22f capacitorsno inductors required ? temperature sensor for lcd contrast compensation ? simple, flexible design procedure for a broad range of lcd displays max3325 3v dual rs-232 transceiver with lcd supply and contrast controller ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 c1+ v+ v dd gnd c1- reg up t1out t2out t1in t2in sd232 sdlcd down dac ref+ fb ref- temp lcd v l r2out r1out r1in r2in v- c2- c2+ ssop/dip top view max3325 19-1573; rev 0; 10/99 typical operating circuit appears at end of data sheet. pin configuration ordering information part max3325cai max3325cni max3325eai -40c to +85c 0c to +70c 0c to +70c temp. range pin-package 28 ssop 28 narrow plastic dip 28 ssop MAX3325ENI -40c to +85c 28 narrow plastic dip
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd = +3.0v to +3.6v, v l = +3.3v, circuit and components of figure 1, t a = t min to t max , unless otherwise noted. typical values are at v dd = +3.3v, t a = +25c.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd , v l to gnd ........................................................-0.3v to +6v lcd, ref-, temp to gnd .............................-6v to (v dd + 0.3v) v+ to gnd (note 1) ..................................................-0.3v to +7v v- to gnd (note 1) ...................................................+0.3v to -7v v+ to |v-| (note 1) ................................................................+13v ref+, fb, r_out to gnd ............................-0.3v to (v l + 0.3v) input voltages t_out, sdlcd , sd232 , up , down to gnd.......-0.3v to +6v r_in to gnd ....................................................................25v output voltages t_out to gnd.................................................................13v r_out to gnd..........................................-0.3v to (v l + 0.3v) reg to gnd .........................................................-0.3v to +6v short-circuit duration (t_out, ref+, ref-) .............continuous continuous output current reg.................................................................................75ma lcd .................................................................................40ma continuous power dissipation 28-pin ssop (derate 9.52mw/c above +70c) .........762mw 28-pin ndip (derate 14.3mw/c above +70c) ........1143mw operating temperature range max3325c_i .......................................................0c to +70c max3325e_i ....................................................-40c to +85c storage temperature range .............................-65c to +150c lead temperature (soldering, 10sec) .............................+300c note 1: v+ and v- can have maximum magnitudes of +7v, but their absolute difference cannot exceed 13v. v fb = 0, cmos input 3v < v dd < 3.6v 1 transmitter loaded with 5k , t a = +25c i temp < 22a t a = +25c guaranteed monotonic no load no load, v dd = v l = 3.3v, t a = +25c no load, v dd = v l = 3.3v, t a = +25c conditions na -10 0 10 input leakage current (note 2) mv -20 0 20 feedback regulation point ma 50 short-circuit current mv 650 line regulation 4.7 5 5.3 mv/c -18 temp voltage temperature coefficient v -3.2 temp output k 35 50 65 output impedance mv -15 0 10 zero-scale voltage v 1.13 1.2 1.27 full-scale voltage bits 6 a 0.5 10 v l supply current ma 24 v dd supply current units min typ max parameter sd232 , sdlcd = gnd; all input pins = gnd or v dd ; v dd = v l = 3.3v; t a = +25c a 0.5 10 v dd shutdown supply current v lcd = -4.0v, load = 0 to -3ma mv 20 lcd load regulation (note 3) v 5 reg output voltage 0 < v dac < v ref +, i dac 10a no load v cc 3 3.15v, i reg = 0 to 11ma v cc 3 3.0v, i reg = 0 to 7ma dc characteristics digital-to-analog converter temperature sensor positive linear regulator negative linear regulatorlcd bias resolution
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +3.0v to +3.6v, v l = +3.3v, circuit and components of figure 1, t a = t min to t max , unless otherwise noted. typical values are at v dd = +3.3v, t a = +25c.) conditions units min typ max parameter lcd line regulation 3v < v dd < 3.6v, v lcd = -4.0v 10 mv lcd adjustment range load = -3ma -5 +2 v output voltage r ref + = 10k 1.16 1.21 1.26 v load regulation load = 12a to 62a (sourcing current) 4 mv short-circuit current 5 ma output voltage no load -1.14 -1.21 -1.28 v load regulation load = 0 to 50a (sinking current) 35 mv short-circuit current 0.125 ma logic threshold high 2 v logic threshold low 0.8 v input current v in = gnd or v dd -1 1 a output voltage low i sink = 1.6ma 0.4 v output voltage high i source = 1.0ma 0.8 v l v input voltage range -25 +25 v input threshold low t a = +25c, v dd = 3.3v 0.6 v input threshold high t a = +25c, v dd = 3.3v 2.4 v input hysteresis 0.3 v input resistance -15v < v r_in < +15v, t a = +25c 357 k output voltage swing all outputs loaded with 3k to ground 5 5.4 v output resistance v dd = v l = v+ = v- = 0, v out = 2v 300 10m short-circuit current 35 60 ma output leakage current v dd = 0 or 3v to 3.6v, v out = 12v, transmitters disabled 25 a positive reference voltage negative reference voltage logic inputs ( sd232 , sdlcd , t1in, t2in, up , down ) transmitter outputs receiver inputs receiver outputs
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller 4 _______________________________________________________________________________________ -6 -2 -4 2 0 4 6 0 2000 1000 3000 4000 5000 transmitter output voltage vs. load capacitance max3325toc01 load capacitance (pf) transmitter output voltage (v) t1 transmitting at 250kbps t2 transmitting at 15.6kbps -5 -1 -3 3 1 5 v out+ v out- 0 4 2 8 6 12 10 14 0 2000 1000 3000 4000 5000 slew rate vs. load capacitance max3325toc02 load capacitance (pf) slew rate (v/ m s) for data rates up to 250kbps 0 10 30 20 40 50 0 1000 2000 3000 4000 5000 supply current vs. load capacitance (t1 = 20kbps) max3325toc03 load capacitance (pf) supply current (ma) t2 = 120kbps t2 = 250kbps t2 = 20kbps typical operating characteristics (v dd = v l = +3.3v, circuit and components of figure 1, all transmitters loaded with 3k ,t a = +25c, unless otherwise noted.) timing characteristics (v dd = +3.0v to +3.6v, v l = +3.3v, circuit and components of figure 1, t a = t min to t max , unless otherwise noted. typical values are at v dd = +3.3v, t a = +25c.) note 2: guaranteed by design and not production tested. note 3: no load on reg or transmitter outputs. t plh 300 parameter symbol min typ max units transition-region slew rate 630 v/s transmitter skew | t plh - t phl | 200 ns receiver propagation delay maximum data rate 250 kbps t phl 300 ns receiver skew | t plh - t phl | 300 ns conditions v dd = 3.3v, t a = +25c, r l = 3k to 7k , c l = 150pf to 1000pf, measured from +3v to -3v or -3v to +3v r l = 3k , c l = 1000pf, one transmitter switching receiver input to receiver output, c l = 150pf
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller _______________________________________________________________________________________ 5 40 m s/div sd232 t2out t1out 5v/div 0 2v/div 0 v cc = 3.3v c1?4 = 0.1 m f transmitter outputs exiting shutdown or powering up max3325toc04 c l = 2500pf 2 m s/div loopback waveforms at 120kbps t1in 5v/div t1out/ r1in 5v/div r1out 5v/div max3325toc05 c l = 1000pf 1 m s/div loopback waveforms at 250kbps t1in 5v/div t1out/ r1in 5v/div r1out 5v/div max3325toc06 c l = 1000pf 0 2 1 4 3 5 6 020 10 30 40 v reg vs. load current max3325toc07 load current (ma) v reg (v) v dd = +3v v dd = +3.3v v dd = +3.6v 0 2 1 4 3 5 6 020 10 30 40 v reg vs. load current and temperature max3325toc08 load current (ma) v reg (v) t a = +25? t a = +85? t a = -40? -4.5 -3.5 -4.0 -2.5 -3.0 -2.0 -1.5 -40 0 20 -20 40 60 80 100 temp output voltage vs. temperature max3325toc09 temperature (?) temp output voltage (v) typical operating characteristics (continued) (v dd = v l = +3.3v, circuit and components of figure 1, all transmitters loaded with 3k and c l , t a = +25c, unless otherwise noted.)
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller 6 _______________________________________________________________________________________ name function 1 c2+ positive terminal of voltage-inverting charge-pump capacitor. connect c2+ to c2- with a 0.22f capacitor. 2 c2- negative terminal of voltage-inverting charge-pump capacitor. connect c2- to c2+ with a 0.22f capacitor. pin 3 v- output of negative charge pump. bypass v- to gnd with a 0.22f capacitor. 4, 5 r_in rs-232 receiver inputs 10 temp output of temperature sensor. connect temp to fb with a series resistor to compensate lcd contrast for changing temperature. bypass temp with a 0.22f capacitor to gnd. 9 lcd output of negative regulator. connect lcd to fb with a series resistor. bypass with a 0.47f capacitor to gnd. 8 v l supply input for receiver outputs. connect v l to the system logic supply voltage. 6, 7 r_out ttl/cmos receiver outputs 15 up dac adjust input. a falling edge on up increments the internal 6-bit dac counter. 14 dac output of internal 6-bit dac. connect dac to fb with a series resistor to adjust lcd voltage. 13 ref+ output of positive reference, +1.2v. bypass ref+ with a 0.22f capacitor to gnd. 12 fb feedback input for negative regulator. regulates when fb is at zero (0). 11 ref- output of negative reference, -1.2v. bypass ref- with a 0.22f capacitor to gnd. pin description 16 down dac adjust input. a falling edge on down decrements the internal 6-bit dac counter. 17 sdlcd active-low shutdown-control input for both regulators, references, dac, and temperature sensors. drive sdlcd low to disable all analog circuitry. drive high to enable the analog circuitry. 26 v dd +3.0v to +3.6v supply voltage. bypass v dd with a 0.22f capacitor to gnd. 25 gnd ground 24 c1- negative terminal of voltage-doubling charge-pump capacitor. connect c1- to c1+ with a 0.22f capacitor. 18 sd232 active-low shutdown-control input for transmitter outputs. drive sd232 low to disable the rs-232 transmitters. drive high to enable the transmitters. 23 reg output of positive regulator. bypass reg with a 4.7f capacitor to gnd. 21, 22 t_out rs-232 transmitter outputs 19, 20 t_in ttl/cmos transmitter inputs 28 c1+ positive terminal of voltage-doubling charge-pump capacitor. connect c1+ to c1- with a 0.22f capacitor. 27 v+ output of positive charge pump. bypass v+ to v dd with a 0.22f capacitor.
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller _______________________________________________________________________________________ 7 c4 0.22 m f c5 0.22 m f up c1 0.22 m f c1+ c1- c2+ c2- gnd c2 0.22 m f v dd v+ lcd fb dac ref+ ref- temp reg v- down max3325 0.22 m f 0.47 m f r fb r out r ref+8 * r ref- * r temp c3 0.22 m f 4.7 m f 0.22 m f 10k t1in t2in v l c l r l c l r l 0.22 m f 0.22 m f 6-bit dac sdlcd sd232 t1out r1out r2out 5k 5k t2out r1in r2in lcd display *resistors r ref + and r ref - are both shown, but only one or the other is used in application. figure 1. application circuit
detailed description dual charge-pump voltage converter the max3325s internal power supply consists of a reg- ulated dual charge pump that provides output voltages of +5.5v (doubling charge pump) and -5.5v (inverting charge pump) over the 3.0v to 3.6v v dd range. the charge pump operates in discontinuous mode; if the output voltages are less than 5.5v, the charge pump is enabled; if the output voltages exceed 5.5v, the charge pump is disabled. each charge pump requires a flying capacitor (c1, c2) and a reservoir capacitor (c3, c4) to generate the v+ and v- supplies (figure 1). rs-232 transmitters the transmitters are inverting level translators that con- vert logic levels to 5.0v eia/tia-232 levels. the max3325 transmitters guarantee a 250kbps data rate with worst-case loads of 3k in parallel with 1000pf, providing compatibility with pc-to-pc communication software (such as laplink?). the max3325s transmitters are disabled and the out- puts are forced into a high-impedance state when the rs-232 circuitry is in shutdown ( sd232 = low). the max3325 permits the outputs to be driven up to 13v in shutdown. the transmitter inputs do not have pull-up resistors. connect unused inputs to gnd or v dd . rs-232 receivers the receivers convert rs-232 signals to logic output levels. the v l pin controls the logic output high voltage. the receiver outputs are always active, regardless of the shutdown state. positive voltage regulator the max3325 has a regulated +5v output suitable for powering +5v lcd modules or other circuits. the out- put of the boost charge pump is regulated with an ldo linear regulator. the reg output sources up to 11ma of current to external circuitry. adjustable lcd supply the lcd output provides a flexible output voltage to adjust the contrast of lcd modules. the output voltage range is determined by the external circuitry connected to lcd, fb, dac, ref+ (or ref-, depending on con- trast polarity). additionally, the temp output can be used to automatically compensate the contrast adjust- ment for temperature variance. the lcd output is a linear regulator powered by the neg- ative charge pump. it is capable of sinking up to 3ma of current. although the lcd regulator can be adjusted to positive voltages, it is not capable of sourcing current. a minimum output current of 100a is required. 6-bit dac the max3325s dac output is an unbuffered inverted r2r structure with an output voltage range of 0 to +1.2v. the dac output impedance is typically 50k , and can be connected through a series resistor to the fb input of the lcd regulator. an internal power-on reset circuit sets the dac to midscale on power-up. dac control inputs the dac code is controlled by up and down to adjust the contrast of the lcd module. these inputs are intended to interface to digital signals, but do not include debounce circuitry. see the applications sec- tion. see table 1 for the truth table. temperature compensation the max3325s temp output is used to minimize devia- tion in lcd contrast level due to temperature changes. the temp output is capable of sinking or sourcing up to 22a to the external resistor network. shutdown mode supply current falls below 1a in shutdown mode ( sdlcd = sd232 = low). when shut down, the devices charge pumps are shut off, v+ is pulled down to v dd , v- is pulled to ground, and the transmitter outputs are disabled (high impedance). the lcd section is also powered down. the reg, lcd, and both reference out- puts become high impedance. the time required to exit shutdown is typically 100s, as shown in the typical operating characteristics . however, the temp output requires 50ms to fully stabilize. connect sdlcd and sd232 to v dd if the shutdown mode is not used. see table 2. max3325 3v dual rs-232 transceiver with lcd supply and contrast controller 8 _______________________________________________________________________________________ laplink is a trademark of traveling software. x = dont care table 1. dac truth table table 2. shutdown truth table up 0 1 down 0 1 function dac set to midscale dac register decrements 1 count dac register increments 1 count sdlcd 0 1 x sd232 0 x 1 function low-power shutdown mode lcd bias and reg outputs enabled rs-232 transmitters enabled
applications information capacitor selection the capacitor type used for c1Cc4 is not critical for proper operation; polarized or nonpolarized capacitors can be used. ceramic chip capacitors with an x7r dielectric provide the best combination of performance, cost, and size. the charge pump requires 0.22f capacitors for 3.3v operation. do not use values small- er than those listed in figure 1. increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs, slightly reduces power consump- tion, and increases the available output current from v reg and v lcd . c2, c3, and c4 can be increased without changing c1s value. however, do not increase c1 without also increasing the values of c2, c3, c4, and c5 to maintain the proper ratios. when using the minimum required capacitor values, make sure the capacitor value does not degrade exces- sively with temperature or voltage. this is typical of y5v and z5u dielectric ceramic capacitors. if in doubt, use capacitors with a larger nominal value, or specify x7r dielectric. the capacitors equivalent series resistance (esr), which usually rises at low temperatures, influences the amount of ripple on v+ and v-. power-supply decoupling in most circumstances, a 0.22f v dd bypass capacitor (c5) is adequate. choosing larger values for c5 increases performance and decreases the induced rip- ple on the v dd supply line. note that capacitor c2, con- nected to v+, is returned to c5. this connection also improves the performance of the max3325. locate all bypass capacitors as close as possible to the ic. keep metal traces as wide as possible. return all capacitor ground connections directly to a solid-copper ground plane. transmitter outputs when exiting shutdown the typical operating characteristics show the max3325 transmitter outputs when exiting shutdown mode. as they become active, the two transmitter out- puts are shown going to opposite rs-232 levels (one transmitter input is high, the other is low). each trans- mitter is loaded with 3k in parallel with 2500pf. the transmitter outputs display no ringing or undesirable transients as they come out of shutdown. note that the transmitters are enabled only when the magnitude of v- exceeds approximately -3v. high data rates the max3325 maintains the rs-232 5.0v minimum transmitter output voltage even at high data rates. figure 1 shows a transmitter loopback test circuit. the typical operating characteristics show loopback test results at 120kbps and 250kbps. for 120kbps, all trans- mitters were driven simultaneously at 120kbps into rs- 232 loads in parallel with 1000pf. for 250kbps, a single transmitter was driven at 250kbps, and all transmitters were loaded with an rs-232 receiver in parallel with 1000pf. interconnection with lower logic voltages the max3325 provides a separate supply for the logic interface to optimize input and output levels. connect v l to the systems logic supply voltage, and bypass it with a 0.1f capacitor to gnd. if the logic supply is the same as v dd , connect v l to v dd . the v l pin can be operated from +1.8v to +5.0v to accommodate various logic levels. setting v lcd output voltage the lcd output can be configured in a variety of ways to suit the requirements of the lcd display. first, deter- mine the nominal voltage range that the lcd will require for adequate contrast adjustment. if the display requires temperature compensation for contrast, include the temp output in all calculations. the output voltage is defined by: where code is the current digital code in the dac, and r o is the nominal dac output impedance (50k ). the other terms in the equation are due to external resis- tances connected to the indicated pins. a spreadsheet program is an excellent tool for helping to select compo- nents and evaluate their effect on the output voltage range. although the above equation has terms for both ref+ and ref- offset resistors, only one or the other is used. design example the first step in designing for a particular display is to obtain the manufacturers device specifications for the nominal values as well as the temperature characteristics. for example, consider the optrex dmc series of dot matrix lcd modules. the manufacturer specifies a nomi- nal contrast bias voltage of 6v at +25c, where bias volt- age is v reg - v lcd . the temperature coefficient needed v =-r code v r + r v r v r -3.3v - v (t - 25 c) r lcd fb dac o dac ref+ ref+ ref- ref- temp temp () ++ + ? ? ? ? ? ? ? ? max3325 3v dual rs-232 transceiver with lcd supply and contrast controller _______________________________________________________________________________________ 9
to maintain the nominal contrast is -16mv/c. in this case, data for a spread of nominal bias voltages is not avail- able, so a range of 1v is chosen by experimentation. feedback resistor (r fb ) the first step in designing the max3325 lcd bias is to select a feedback resistor. this can be arbitrary, but values between 220k to 1m are a good starting point. we will choose 330k . if the design cant reach its target range in later calculations, the feedback resis- tor can be adjusted accordingly. dac output resistor (r out ) given the above criterion of a 1v output range, the dacs output should be multiplied by the ratio of the desired output swing (1v) divided by the available output from the dac (0 to 1.2v). assuming that weve used a 330k feedback resistor, this corresponds to a total dac resistance of 200k . because the dac has an intrinsic output impedance of 50k , set r out to 200k - 50k = 150k . temperature compensation resistor (r temp ) next, the temperature compensation resistor is select- ed. because the max3325 regulates fb to virtual ground, adding or removing the remaining resistors in this design does not affect the transfer function set in the previous section. the temp output has a tempera- ture coefficient of -17.5mv per c, and the lcds is -16mv/c. to scale these two values, multiply the feed- back resistor (330k ) by the ratio of the temp coeffi- cient divided by the displays coefficient. for this example, the result is 360k . reference resistance (r ref_ ) to complete the design, the dc output is biased to the final desired value at dac midscale. because the previous steps concentrated on the transfer function only, we now have a large offset of +1.94v. this is cal- culated from the entire equation, where the reference resistors are assumed to be infinite, the dac voltage is +0.6v, and v temp is -3.2v. connecting a 130k resis- tor from ref+ to fb forces v lcd to -1.1v, resulting in a nominal contrast voltage (v reg - v lcd ) of +6.1v. this is close to the target value of +6v. actual performance the graph in figure 2 shows the actual lcd displays data curve, along with the max3325s performance with various dac codes. note that changing the dac code does not affect the slope of the temperature com- pensation. if a wider scale of contrast adjustments is desired, change the dac output resistor, and readjust the offset voltage. interfacing to the up and down inputs the up and down inputs to the max3325 are edge- triggered digital inputs. for proper operation, the sig- nals must be standard logic signals. mechanical switch outputs, (toggle or membrane types) are unsuitable and require proper debouncing before connecting to the max3325. the best solution is to use the max6817 dual switch debouncer. this sends the correct signal levels to the up and down inputs, and provides a robust interface to the switch inputs. the up and down inputs can be driven directly from a micro- processor. system considerations because the max3325 is the temperature transducer for the lcd bias compensation, optimal performance is obtained by placing the ic as close as possible to the lcd. max3325 3v dual rs-232 transceiver with lcd supply and contrast controller 10 ______________________________________________________________________________________ 3 5 7 9 -40 0 20 -20 40 60 80 temperature (?) contrast voltage (v reg - v lcd ) max3325 lcd bias circuitry actual display dac code = 63 dac code = 32 dac code = 0 figure 2. design example for optrex dmc display chip information transistor count: 1957
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller ______________________________________________________________________________________ 11 0.22 m f 0.22 m f 3v input up v+ v dd v cc lcd display module v ee v ss c1- c1+ c2- reg lcd gnd fb dac ref+ ref- temp t c2+ v- down 0.22 m f max3325 0.22 m f 0.22 m f 0.33 m f 0.33 m f 4.7 m f 0.47 m f 10k t1in t2in v l 6-bit dac sdlcd sd232 pos reg neg reg -1 t1out rs-232 outputs rs-232 inputs ttl/cmos outputs ttl/cmos inputs r1out r2out t2out r1in r2in 5v at 15ma output lcd bias (0 to -5v) typical operating circuit
max3325 3v dual rs-232 transceiver with lcd supply and contrast controller maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 1999 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information ssop.eps

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