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edge high-performance products 1 www.semtech.com edge672 500 mhz pin electronics window comparator and load description features functional block diagram preliminary revision 1/ june 13, 2000 the edge672 is a monolithic ate pin electronics comparator and load solution manufactured in a high- performance complementary bipolar process. in automatic test equipment, the edge672 incorporates a dynamic load and window comparator suitable for very fast, bidirectional channels in memory, vlsi, and mixed- signal test systems. the three-statable load is capable of sourcing and sinking 35 ma over an 11v common mode range. source and sink currents are independently programmable. the load is configurable to support a clamping function, a termination function, plus any custom load configurations. the comparator is capable of tracking very fast edges and passing sub-ns pulses over a 11v common mode range while maintaining excellent timing accuracy. the differential digital outputs are adjustable to accommodate ecl levels, pecl levels, or custom levels to interface directly with a cmos asic. the inclusion of a high performance load and comparator in a 32 pin tqfp (7 mm x 7 mm) package offers a highly integrated solution traditionally implemented with multiple integrated circuits or discrete components. 11v common mode range programmable to 35 ma comparator input tracking > 6 v/ns with < 25 ps dispersion low leakage (l+c) < 1 a comparator input power down mode (for extremely low leakage operation < 250 na) small footprint (32 pin tqfp) a C + b C + isink x C40 isource x 40 iscin vcmout vcmin bridge source bridge sink iskin lden lden* qa* qa ipd qb qb* pecl load cva vinp cvb
2 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary pin description e m a n n i p# n i pn o i t p i r c s e d d a o l n i m c v8 2. e g a t l o v g n i t a t u m m o c e h t s m a r g o r p t a h t t u p n i g o l a n a n i c s i n i k s i 1 3 9 2 . s t n e r r u c k n i s d n a e c r u o s d a o l e h t m a r g o r p t a h t s t u p n i t n e r r u c g o l a n a n e d l * n e d l 1 2 . f f o d n a n o d a o l e h t n r u t t a h t s n i p t u p n i l a i t n e r e f f i d e g a t l o v e d i w p m o c m c v7 2 . d e t c e n n o c e b d l u o h s d n u o r g o t r o t i c a a c r e t a e r g r o f 1 0 . a . n i p t u p n i g o l a n a d a o l1 2. t u p t u o e g d i r b e d o i d d a o l t u o m c v6 2. e g d i r b e d o i d e h t s e v i r d h c i h w e g a t l o v g o l a n a e c r u o s e g d i r b k n i s e g d i r b 5 2 4 2 . e g d i r b e d o i d e h t f o ) y l e v i t c e p s e r ( f l a h r e w o l d n a r e p p u r o t a r a p m o c p n i v9 1 f o h t o b o t s t c e n n o c p n i v e h t . r o t a r a p m o c w o d n i w e h t r o f t u p n i e g a t l o v g o l a n a . s r o t a r a p m o c e h t f o s t u p n i ) + ( g n i t r e v n i n o n e h t * a q / a q * b q / b q 5 , 4 7 , 8 . r o t a r a p m o c w o d n i w e h t m o r f s n i p t u p t u o l a i t n e r e f f i d b v c , a v c6 1 , 5 1 w o d n i w e h t r o f s l e v e l w o l d n a h g i h e h t t e s o t d e s u s n i p t u p n i g o l a n a . r o t a r a p m o c d p i4 1 w o d n i w e h t f o e d o m n w o d r e w o p t u p n i e h t s e t a v i t c a h c i h w t u p n i e l b i t a p m o c l t t . r o t a r a p m o c r e w o p e e v2 3 , 3 2 , 8 1 , 6. y l p p u s r e w o p e v i t a g e n c c v0 2 , 7 1 , 9 , 3. y l p p u s r e w o p e v i t i s o p d n g0 3 , 2 2 , 0 1. d n u o r g e c i v e d l c e p1 1. s l e v e l t u p t u o r o t a r a p m o c e h t s t e s h c i h w y l p p u s r e w o p g o l a n a s n i p t s e t e d o h t a c e d o n a 2 1 3 1 e i d e h t r o t i n o m o t d e s u s e d o i d f o s e i r e s a f o s d n e e d o n a d n a e d o h t a c . e r u t a r e p m e t
3 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 pin description (continued) bridge sink vee gnd load vcc vinp vee vcc ld en ld en* vcc qa qa* vee qb* qb vee iscin gnd iskin vcmin vcm comp vcm out bridge source vcc gnd pecl cathode anode ipd cva cvb 32 25 17 9 1
4 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary circuit description load introduction the load section is capable of sourcing and sinking up to 35 ma, both statically and dynamically, or being placed in a high impedance state. load enable the load is controlled by the load enable input (lden / lden*). if lden is more positive than lden*, the output diode bridge will be active. if lden is more negative than lden*, the load pin will be placed in a high impedance state. source and sink levels the amount of current that the diode bridge can source and sink is adjustable from 0 ma to 35 ma. the source and sink levels are separate and independent. iscin is a current input node which programs the bridge source current. there is a gain of 40 between the iscin current and the bridge source current. iskin is a current input node that programs the bridge sink current. there is a gain of 40 between the iskin current and the bridge sink current. isource = 40 * iscin isink = 40 * iskin caution: the iskin and iscin inputs are designed for positive current between 0 ma and .875 ma flowing into the edge672. care should be taken to insure that current is never required to flow out of the edge672 on these two nodes. figure 3. commutating voltage compensation commutating voltage vcmin is a high input impedance voltage input node that sets the voltage level at which the diode bridge switches from sourcing to sinking currents. if load is more positive than vcmin, the bridge will sink current from the dut into the edge672 (see figure 1). if load is more negative than vcmin, the bridge will source current from the edge672 into the dut (see figure 2). figure 1. load > vcmin the edge 672 sinks dut current. figure 2. load < vcmin the edge 672 sources dut current. commutating voltage compensation the vcmout pin is the actual commutation voltage seen by the load diode bridge (see figure 3). this node requires a fixed .01 f capacitor (with good high frequency characteristics) to ground. the vcmcomp pin is an analog output pin that requires a fixed .01 f chip capacitor (with good high frequency characteristics) to ground (see figure 3). this capacitor is used to compensate an internal node on the on-chip op amp used to buffer the commutating voltage input. vcmcomp vcmin vcmout bridge sink bridge source load .01 f .01 f vcmin dut load i source i sink vcmin dut load i source i sink
5 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 circuit description (continued) load configuration the load is flexible in that vcmout, bridge sink, and bridge source are all brought out to separate pins. this flexibility allows the load to be configured in several different ways. the standard load topology, where vcmout, bridge sink, and bridge source are all connected together (see figure 4), behaves like the traditional active load. figure 4. standard active load configuration vcmin vcmout bridge sink bridge source load vcmin (v clamp lo) vcmout bridge sink bridge source load vcmin clamping function the load can also act as set of programmable clamps that can absorb any dut overshoot that would normally be present when the pin electronics are receiving a dut signal. by connecting vcmout and bridge sink together, and then bringing in an externally buffered voltage to bridge source (see figure 5), vcmin becomes the low voltage clamp and the external voltage becomes the high voltage clamp. figure 5. load as a programmable clamp
6 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary circuit description (continued) window comparator introduction the edge672 has two comparators connected on-chip as a window comparator to determine whether the dut is in a high, low, or indeterminate state. functionality the vinp pin is tied to the positive inputs of both comparators (see figure 6). input condition output condition vinp > cva qa = high; qa* = low vinp < cva qa = low; qa* = high vinp > cvb qb = high; qb* = low vinp < cvb qb = low; qb* = high figure 6. comparator functionality thresholds cva and cvb are the two comparator threshold levels. these inputs are high impedance voltage controlled inputs that determine at which vinp input voltage the comparator will change states. hysteresis hysteresis is a measure of the change in threshold voltage as a function of the comparator output state (see figure 7). typically, hysteresis is used to prevent multiple comparator output transitions due to slow input slew rates in a noisy environment. these slower inputs remain in the transition region for longer periods of time, allowing any noise present to cause repeated threshold crossings. the edge672 is designed with 4 mv of hysteresis. this hysteresis is nonadjustable and requires no external support. the amount of hysteresis was chosen to allow stable and reliable transitions in most system environments, without noticeably affecting the comparator performance. figure 7. hysteresis the effects of hysteresis are visible in two categories - offset voltage and propagation delay. the amount of hysteresis must be large enough to overcome the system noise floor, yet small enough not to increase offset voltage effects significantly. input protection the vinp pin has an internal 50 ? series resistor and two over-voltage diodes capable of shunting up to 100 ma (see figure 8) and, therefore, requires no external protection circuitry. the over-voltage input range that the comparator can withstand is determined by the power supply rails and the following equations: vee .7 (100 ma * 50 ? ) < vinp < vcc + .7 + (100 ma * 50 ? ) or vee 5.7v < vinp < vcc + 5.7v. qa* vinp cva cvb qa qb qb* C + C + actual threshold voltage programmed threshold voltage 2 mv 4 mv
7 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 circuit description (continued) figure 8. input protection for a wider protected input range, an additional external series resistor may be added. comparator pecl output capability pecl is a variable analog voltage power supply that determines the common mode voltage of the comparator digital outputs. with pecl connected to ground, the outputs generate standard differential ecl levels. however, the outputs will track the pecl input, remaining one diode drop below it as pecl is varied between ground and +5v. by setting pecl appropriately, a fully differential comparator output may interface directly to a cmos asic without any translators. input power down the comparator has a mechanism where it can drastically reduce the input bias current flowing into the vinp pin, while still maintaining a functional comparator. in this mode, however, the comparator slows down significantly and can no longer track fast edges, in particular, fast falling edges. the ipd pin is a ttl compatible input which controls the two modes. with ipd = low, the comparator is in its normal high speed mode, supporting maximum ac performance. with ipd = high, the comparator is in power down mode. the input bias current decreases to < 250 na. the comparator still functions, but can track edges only up to 25 mv/ns. thermal monitor an on-chip thermal monitor is accessible through the cathode and anode pins. these nodes connect to five diodes in series (see figure 9) and may be used to accurately measure the junction temperature at any time. an external bias current of 100 a is injected through the string, and the measured voltage corresponds to a specific junction temperature with the following equation: tj[ c] = {(anode - cathode)/5 - .7} / (-.00208). figure 9. thermal diode string vinp vcc vee C + C + 50 bias current temperature coefficient = C10 mv/ ? c anode cathode
8 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary circuit description (continued) delay dispersion given a constant temperature and voltage environment (within the bounds of the recommended operating conditions), the propagation delay dispersion (tsd) indicates how much variation in propagation delay time can be expected for one comparator over a wide range of input conditions. thus, the propagation delay of a comparator can be described as: tpd tsd where tpd is the nominal delay that will vary with temperature and voltage, and part-to-part. in many ate applications, tpd is calibrated or compensated for on a channel-by-channel basis. tsd includes factors that normally may be difficult to calibrate, and therefore directly impact overall system timing accuracy. propagation delay dispersion is defined as the maximum deviation of the propagation delay taken at the eight measurement points (see figure 10) for 1v and 3 v input signals described below. the parameters of interest are: slew rate edge direction overdrive common mode voltage. low dispersion numbers indicate the accuracy of a system under a variety of input conditions, and are an important figure of merit for any comparator. while not production tested, the edg672 is designed specifically to exhibit low dispersion. the typical edge672 will show less than 25 ps tpd dispersion. figure 10. dispersion measurement conditions 3 v 2.7 v .3 v 0 v -0.8 v -1.0 v -1.6 v -1.8 v 1v / ns slew rate input threshold levels 3v / ns slew rate 1v 1v / ns slew rate input threshold levels 3v / ns slew rate 3 v
9 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 package information pin descriptions b d 3 4 4 e n / 4 tips 4 x e / 2 d / 2 see detail "a" e 0.20 c a C b d top view d1 e1 5 7 5 7 4 x d1 / 2 e1 / 2 0.20 h a C b d bottom view c o o 32-pin tqfp 7 mm x 7 mm
10 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary package information (continued) 3 detail "a" e / 2 b 0 min. 0.08 / 0.20 r. gauge plane 0.25 0 C 7 l c.08 r. min. 0.20 min. 1.00 ref. datum plane C h C a1 0.05 a2 C s detail "b" 9 999 58 &"9 %,##&+(!,' 1 / 1 1 / 14 6 6 3 / 1 // 77 1 +++
notes: 1. all dimensions and tolerances conform to ansi y14.5-1982. 2. datum plane -h- located at mold parting line and coincident with lead, where lead exits plastic body at bottom of parting line. 3. datums a-b and -d- to be determined at centerline between leads where leads exit plastic body at datum plane -h-. 4. to be determined at seating plane -c-. 5. dimensions d1 and e1 do not include mold protrusion. 6. n is the total # of terminals. 7. these dimensions to be determined at the datum plane -h-. 8. package top dimensions are smaller than bottom dimensions and top of package will not overhang bottom of package. 9. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. 10. controlling dimension: millimeter. 11. maximum allowable die thickness to be assembled in this package family is 0.30 millimeters. 12. this outline conforms to jedec publication 95, registration mo-136, variations ac, ae, and af. c a m y sn i mm o nx a me t o n a0 6 . 1 1 a5 0 . 00 1 . 05 1 . 0 2 a5 3 . 10 4 . 15 4 . 1 dc s b 0 0 . 94 1 dc s b 0 0 . 78 , 7 ec s b 0 0 . 94 1 ec s b 0 0 . 78 , 7 l5 4 . 00 6 . 05 7 . 0 m5 1 . 0 n2 3 ec s b 0 8 . 0 b0 3 . 07 3 . 05 4 . 09 1 b0 3 . 05 3 . 00 4 . 0 c c c0 1 . 0 d d d0 2 . 0 jedec variation
11 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 recommended operating conditions absolute maximum ratings r e t e m a r a pl o b m y sn i mp y tx a ms t i n u y l p p u s r e w o p e v i t i s o pc c v5 . 85 . 1 10 . 2 1v y l p p u s r e w o p e v i t a g e ne e v5 . 8 -2 . 5 -5 . 4 -v y l p p u s g o l a n a l a t o te e v - c c v0 . 3 17 . 6 10 . 7 1v y l p p u s e v i t i s o p t u p t u o r o t a r a p m o cl c e p03 . 30 . 5v e r u t a r e p m e t n o i t c n u jj t0 1 1 + o c r e t e m a r a pl o b m y sn i mp y tx a ms t i n u ) d n g o t e v i t a l e r ( y l p p u s e v i t i s o p ) d n g o t e v i t a l e r ( y l p p u s e v i t a g e n y l p p u s r e w o p l a t o t y l p p u s e v i t i s o p t u p t u o r o t a r a p m o c c c v e e v e e v - c c v l c e p 0 0 . 9 - 0 0 . 3 1 + 0 0 . 0 2 + 0 . 6 + v v v v s e g a t l o v t u p n i l a t i g i d* n e d l , n e d le e v0 . 6 +v s e g a t l o v t u p n i l a t i g i d l a i t n e r e f f i d* n e d l - n e d l0 . 5 -0 . 5 +v s t n e r r u c t u p t u o l a t i g i d* b q , b q , * a q , a q0 0 5a m d l o h s e r h t o t t u p n i r o t a r a p m o ca v c - p n i v b v c - p n i v 3 1 - 3 1 - 3 1 + 3 1 + v v e g a t l o v g n i t a t u m m o c o t d a o ln i m c v - d a o l0 1 -0 1 +v s e g a t l o v g o l a n an i m c v p n i v , d a o l b v c , a v c e c r u o s e g d i r b k n i s e g d i r b e e v e e v e e v e e v e e v c c v c c v c c v c c v c c v v v v v v s t n e r r u c t u p n i g o l a n an i c s i n i k s i 0 0 0 . 2 0 . 2 a m a m e r u t a r e p m e t g n i t a r e p o t n e i b m a e r u t a r e p m e t e g a r o t s e r u t a r e p m e t n o i t c n u j ) s r u o h 0 3 < ( e r u t a r e p m e t s s e c o r p a t s t j t 5 5 - 5 6 - 5 2 1 + 0 5 1 + 0 5 1 + 0 6 1 + o c o c o c o c stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these, or any other conditions beyond those listed in the operational sections of this specification are not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
12 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary dc characteristics r e t e m a r a pl o b m y sn i mp y tx a ms t i n u d a o l e g a t l o v g n i t a t u m m o c e g n a r d a o l l a i t n e r e f f i d e g n a r e l b a m m a r g o r p e g a t l o v t e s f f o t n e r r u c t u p n i n i m c v n i m c v - d a o l n i m c v n i m c v - t u o c v 0 . 6 - 9 . 2 + e e v 0 0 1 - 0 0 1 -5 0 . 6 + 9 . 2 - c c v 0 0 1 + 0 0 1 + v v v m a y c a r u c c a ) 1 e t o n ( t e s f f o c s i ) 1 e t o n ( t e s f f o k s i ) t n e r r u c g n i c r u o s ( n i a g ) t n e r r u c g n i k n i s ( n i a g s t n e r r u c t u p n i n i c s i / d a o l i n i k s i / d a o l i 4 + 0 5 1 - 5 3 5 3 0 0 0 1 + 0 0 1 - 7 3 9 3 0 5 1 + 4 + 0 4 2 4 5 7 8 . a a a m ) 2 e t o n ( y t i r a e n i ll n i0 0 6 -0 0 6 +a ) 3 e t o n ( ) e s l a f = n e d l ( e g a k a e l z i h1 -1 . 1 +a ) 4 e t o n ( e c n a d e p m i t u p t u ot u o r0 . 55 . 75 1 ? s t u p n i l a t i g i d t n e r r u c t u p n i e g n a r e g a t l o v t u p n i g n i w s t u p n i l a i t n e r e f f i d * n e d l , n e d l 0 0 5 - 0 . 0 5 2 . 0 0 0 5 + 5 . 3 + 0 . 3 + a v v t u p n i t n e r r u c g n i m m a r g o r p ) 5 e t o n ( e c n a i l p m o c e g a t l o v n i c s i _ v , n i k s i _ v0 0 1 -0 0 1 +v m dc test conditions (unless otherwise specified): "recommended operating conditions". note 1: offset is measured with iscin or iskin equal to 6 a, producing an absolute output current of 100 a nominal. note 2: error = measured iout vs. calculated iout. calculated iout = (i * lsb) + offset. lsb = (fullscale offset) / 9. i = index = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9. index iscin, iskin 0 6 a 1 100 a 2 200 a 3 300 a 4 400 a 5 500 a 6 600 a 7 700 a 8 800 a 9 900 a note 3: tested @ 1) load = 3v, vcmin = +3v 2) load = +6.5v, vcmin = +0.5v. note 4: tested @ load = +2v, iout = 5 ma and 15 ma. note 5: tested @ iscin, iskin = 6 a, 50 a, 100 a, 875 a.
13 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 dc characteristics (continued) r e t e m a r a pl o b m y sn i mp y tx a ms t i n u r o t a r a p m o c e g a t l o v d l o h s e r h t e g n a r e g a t l o v t u p n i e g a t l o v l a i t n e r e f f i d t u p n i b v c , a v c p n i v b , a v c - p n i v 9 . 2 + e e v 9 . 2 + e e v 1 1 - 9 . 2 - c c v 9 . 2 - c c v 1 1 + v v v t n e r r u c t u p n i d l o h s e r h t t n e r r u c t u p n i n i p d p i 0 5 - 0 5 1 - 0 5 + 0 1 + a a t n e r r u c t u p n i p n i v ) 1 e t o n ( 0 = d p i n o i t a r e p o l a m r o n v 9 . 3 1 - c c v = b , a v c , v 9 . 2 - c c v = p n i v v 9 . 3 1 + e e v = b , a v c , v 9 . 2 + e e v = p n i v s a i b i s a i b i s a i b i 1 - 3 - 3 - 1 + 3 + 3 + a a a e g a t l o v t e s f f os o v0 5 -0 5 +v m o i t a r n o i t c e j e r e d o m n o m m o c o i t a r n o i t c e j e r y l p p u s r e w o p s i s e r e t s y h r o t a r a p m o c r r m c r r s p 0 6 0 6 4 b d b d v m g n i w s t u p t u o l a t i g i d| * a q - a q | | * b q - b q | 0 0 6 0 0 6 0 0 7 0 0 7 0 0 0 , 1 0 0 0 , 1 v m v m e g a t l o v e d o m n o m m o c2 / ) * a q + a q ( 2 / ) * b q + b q ( 5 . 1 - l c e p 5 . 1 - l c e p 1 . 1 - l c e p 1 . 1 - l c e p v v ) p m o c + d a o l ( y l p p u s r e w o p t n e r r u c y l p p u s e v i t i s o p t n e r r u c y l p p u s e v i t a g e n t n e r r u c y l p p u s l c e p c c i e e i d d i 5 3 5 5 5 3 0 5 5 7 5 5 5 7 5 9 0 9 a m a m a m dc test conditions (unless otherwise specified): "recommended operating conditions". note 1: tested @ vinp = +7.0v and 1.0v.
14 ? 2000 semtech corp. www.semtech.com edge high-performance products edge672 preliminary ac characteristics r e t e m a r a pl o b m y sn i mp y tx a ms t i n u d a o l y a l e d n o i t a g a p o r p ) 2 e t o n ( t u o i o t t i b i h n i ) 2 e t o n ( t i b i h n i o t t u o i ) n o ( d p t ) f f o ( d p t 0 . 1 0 . 1 0 . 3 0 . 3 0 . 5 0 . 5 s n s n e c n a t i c a p a c t u p t u o e v i t c a d a o l f f o d a o l t u o c t u o c 5 . 5 5 . 2 f p f p r o t a r a p m o c ) 2 , 1 s e t o n ( y a l e d n o i t a g a p o r pd p t0 . 10 . 20 . 4s n ) 2 e t o n ( n o i s r e p s i d y a l e d n o i t a g a p o r p v m 0 0 8 v 3 v 5 0 0 1 - 0 0 1 - 0 0 1 - 5 2 < 5 2 < 5 2 < 0 0 1 + 0 0 1 + 0 0 1 + s p s p s p ) 2 e t o n ( g n i k c a r t e t a r w e l s t u p n i 0 = d p i 1 = d p i 0 . 5 5 2 0 . 6s n / v s n / v m e c n a t i c a p a c t u p n in i c5 . 1f p ) % 0 8 o t % 0 2 ( s e m i t l l a f d n a e s i r t u p t u of t , r t0 5 2s p ) 2 e t o n ( h t d i w e s l u p m u m i n i m 5 . 1s n dc test conditions (unless otherwise specified): "recommended operating conditions". note 1: assumes normal operating mode of ipd = 0. note 2: guaranteed by characterization. this parameter is not production tested.
15 ? 2000 semtech corp. www.semtech.com edge high-performance products preliminary edge672 ordering information contact information semtech corporation edge high-performance division 10021 willow creek rd., san diego, ca 92131 phone: (858)695-1808 fax (858)695-2633 r e b m u n l e d o me g a k c a p f t b 2 7 6 ep f q t m m 7 x m m 7 n i p - 2 3 f t b 2 7 6 m v ee l u d o m n o i t a u l a v e

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