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| Datasheet File OCR Text: |
| white electronic designs ! " # ! $ % &'" ( )(* + , # ()&- $ " # , ./01$ 2 / 2 / 3" " $ ) " " 3 ,$ " 45 / $6 " .771$! " # $ " , $ ) # )" $ address bus (sa 0 sa 19 ) dqa, dqb dqpa, dqpb dqc, dqd dqpc, dqpd dqa dqd dqpa dqpd 1m x 18 1m x 18 clk cke adv lbo cs1 cs2 cs2 oe we zz clk cke adv lbo ce1 ce2 ce2 oe we zz clk cke adv lbo cs1 cs2 cs2 oe we zz bwd bwa bwc bwb 8 , 9':; '': ';; (-- (:; (&&53 8 9'$- '$* &$; &$: &$* <$' 8! 9'$- '$* &$; &$: &$* <$' ='$:>?:@ ab! .> > 1 3 " a # , ab! . # "1 c , 9 d ((e" + , / # " ! ! ! ! ! ! ! ! ! ! " ! ##$% "& ' ! ()* white electronic designs '7/&-( 2 / (;;@ " " " # #$ . ) ! / ! 771 3 , $ " > $ "f " " " " # .>1$> " # / # " ) $ , ".01 " $ 0 # # #$2 / ) 0 > # ,$ ! ".!1 " " # $ , 0 # " # > # $ " , $ , # $ ! " # # # f $ ! " #$ % & # ' # ,$ g 9h " " $ 2 / 3(;;@ " $ , f $ "f " >5 " " $ " # " ) $ " $ " f " / ! $ "f $ a # " f $ 77" # $ 77 # c ' $ # $ 77 ' ,$ !" #$ %& '!( )& & *& +,-. &&#( & &&&&&&&&#( & &&&&&&& #( & &&&&&&& #( & / / / / & + +,- &&#( & &&&&&&&#( &&&&&&&&&#( &&&&&&&&#( & / / / / white electronic designs 0 ! "# " $! % " $! % ! &&%$! &&%$! ! "# " % " % ' ' # ( & '( )* +, "'- .'!" / 0 1 2'3 " / 4 /" ' 5'6789 6" " 6787: 3' 6789 7 " 678 7: 3' ;'" / / !" ' <',4"/" ! /, $, , ' $! "%! "%' "% "% "% ' & '( )* +, "'- .'3 ! ! " !" / ,= ' ! ()* white electronic designs 1 >&" " "! ! ")3 ? 4 7 " ! '! " " / " /! ! " !" " "! ! ! " /! / '4 " 4 " / "4 " //" ' & '3 "/" @&& a* .'! " b $ 0 ! !"' & '8 / #! "" " #!/ " ' 8 " #!/ " " " ' .' " " .';@$.;c,$ d ' & '! " " ' ! " # $ ) !)! ! *+,- ./*012 , 3 ) 0 )) !)! ! 4 *+,- ./*012 5 6 ) 0 !)! ! *+,- ./*012 , 3 ) 0 ( !)! ! *+,- ./*012 7 , ) 0 / // (2!+3 +4 5674" 4 %+ +4 ( 53 8 8 8 8 + ( 4 ( ! " #$ $% "& % !$ ' ( )' *( + , &- .&/ 0+10 2" % 123% & ! " #$ $% 123% "& 4 5 6 ) ) ) ) + &- .&7! 85% "& .$%9 &$!1% ! " #$ $% "& % !$ : : : : + &- & 0+10 2" % 123% &% 85 $;< &&&/ " #$ $% 123% "& * : 6 + .&7! & 45 85%!$ 0+10 2" % !# 8)) %$ ! 9 :;<7 =7<5 4 :;<7 =7<5 ) :;<7 =7<5 8 !#&) ! "> :,,- =0+,- 8 ) 0;;& " " # $ ) ## 0 !# 0<3 =;<7 0 )?# ; !# :;<7 ;<3 0 )!(!# ; :, , @ + )!(!# ) !' a; :, , @ ) # !# *:0<;& +<; 0 ) ? !# *0<;& ; white electronic designs '33 " ! / ! / " " 0 ,= #!3*@ # ,4 '3 !" !" ! / ! #! "! ! ' .',! !" /,= #!3*@ # " ' 2'3#" / 6 #! " " ! 3*@ #'37 / 6 !# !3*@ #' ! ! ' 9 9 9 9 dout zo=50 ? rl=50 ? vl=1.25v 30pf* dout 1538 ? 5pf* +2.5v 1667 ? !"#$ !"#$ % ) 9 ;+<, )$ ! ! &1! !+;c6;c 0<; )! ) & #$/ 9 0<+, )! 8)! &&&&&&&&& 5674" / 8 8 // 8 8 / 8 8 #!#6 ! + #: + #: + #: + #: + #: + #: + ( $;0+ :5 :5: *5 )5 )5= =5* & $;$$0+ 88 5) 885(88658865*8865(88:5 & &.7 ... 88 5) 885(88658865*8865(88:5 & $;>/ 8 5* 88 5*88 5*88 5*88 5*88 5*88 & > ?+ $; >/ 5* 88 5*88 5*88 5*88 5*88 5*88 & &.7 8 5 88 588588588588588 & &.7 >/ >/ 8 88 5) 885(8865886588658865* & $;>/ >/ 8 88 5) 885(8865886588658865* & $;>/ 5= 88 588588588588588 & $; 5= 88 588588588588588 & $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & .. $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & #.&$ $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & $ $;>/ 5 88 5:88 5:88 5*88 5*88 5*88 & > $; / 56 88 5:885:885*885*885*88 & > $;>/ 56 88 5:885:885*885*885*88 & ..> $;>/ 56 88 5:885:885*885*885*88 & > $;>/ 56 88 5:885:885*885*885*88 & #.&$ $;>/ 56 88 5:885:885*885*885*88 & $> $;>/ 56 88 5:885:885*885*885*88 & >/ & 88 88 88 88 88 88 $!$ @ 88 88 88 88 88 88 $!$ ! ()* white electronic designs 2!!7! 4 6 # a '7$ 2!!7 ! " 7 5a+5$ # 2!!7! ) 77 " $77 #5a+5 # 2!!7!$ 77" 5a+5 a '7 77$ a # 2!!7 ! $ 2!!7! " # $ 9 zz i supply clock all inputs (except zz) output (q) t zz t zzi t rzz t rzzi high-z deselect or read only i isb2z dont care " " # $ #8d1 dd # 0; & dd! 9 ) # +e 0 dd ! 9 )!&) +e 0 dd ! 9 2 +e 0 dd ! 9 2 0 white electronic designs clock cke address write adv oe data out t ch t cl t ces t ceh t as t ah a1 a2 a3 t ws t wh t css t csh t oe t hzoe t lzoe t cd t oh t hzc q3-4 q3-3 q3-2 q3-1 q2-4 q2-3 q2-2 q2-1 q1-1 don t care undefined t cyc t advs t advh cex notes: write = l means we = l, and bwx = l cex refers to the combination of ce1, ce2 and ce2. ! ()* white electronic designs clock address write adv data in t ch t cl a2 a3 d2-1 d1-1 d2-2 d2-3 d2-4 d3-1 d3-2 d3-3 oe data out t ds t dh don t care undefined t cyc cke a1 d3-4 t ces t ceh q0-4 t hzoe q0-3 cex notes: write = l means we = l, and bwx = l cex refers to the combination of ce1, ce2 and ce2. white electronic designs cloc address write adv oe data in t ch t cl t ds t dh data out a2 a4 a5 d2 t oe t lzoe q1 don t care undefined t cyc cke t ces t ceh a1 a3 a7 a6 q3 q4 q7 q6 d5 a9 a8 cex k notes: write = l means we = l, and bwx = l cex refers to the combination of ce1, ce2 and ce2. ! ()* white electronic designs clock address write adv oe data in t ch t cl data out a1 a2 a3 a4 a5 t ces t ceh don t care undefined t cyc cke t ds t dh d2 q4 q1 t cd t lzc t hzc q3 a6 cex notes: write = l means we = l, and bwx = l cex refers to the combination of ce1, ce2 and ce2. white electronic designs clock address write adv oe data in t ch t cl data out a1 a2 a3 a4 a5 don t care undefined t cyc cke d5 q4 t ces t ceh q1 q2 t oe t lzoe d3 t cd t lzc t hzc t dh t ds cex notes: write = l means we = l, and bwx = l cex refers to the combination of ce1, ce2 and ce2. ! ()* white electronic designs $% & % ' () ("*) +d75018+5" 01 75 +<5 +,; +d75018+6" 01 75 +<6 ++, +d750187;" 01 75 7<; +;; +d750187," 01 75 7<, 055 +d7501876" 01 75 7<6 0,; +d75018b+" 01 75 b<+ 077 3837*8?&8&378?88?7&3*e37 8,3f88, & 2.79 (0.110) max 0.711 (0.028) max 1.27 (0.050) typ 1.27 (0.050) typ a b c d e f g h j k l m n p r t u 17.00 (0.669) typ a1 corner 20.32 (0.800) typ 23.00 (0.905) typ 7.62 (0.300) typ r 1.52 (0.060) max (4x) ! / " a3 0 <.d " "'e " 0 / ' $% & % ' () ("*) +d75018+5"f 01 75 +<5 +,; +d75018+6" 01 75 +<6 ++, +d750187;" 01 75 7<; +;; +d750187," 01 75 7<, 055 +d7501876" 01 75 7<6 0,; +d75018b+" 01 75 b<+ 077 >, / "/ " ' |
Price & Availability of WED2ZL361MS-BC
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