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november 2006 rev 1 1/12 12 L9857 high voltage high-side driver features high voltage rail up to 450v dv/dt immunity 50v/nsec in full temperature range driver current capability: 500ma source, 500ma sink switching times 100ns ri se/fall with 2.5nf load cmos/ttl schmitt trigger inputs with hysteresis and pull down under voltage lock out clamping on v cc non inverting input reset circuitry so8 package description the L9857 is an high voltage device, manufactured with the bcd "off-line" technology. it has the capability of driving n channel power mos transistors. the upper (floating) section is enabled to work with voltage rail up to 450v. the logic inputs are cmos/ttl compatible for ease of interfacing with controlling devices.. order codes so-8 part number op. temp range, cpackage packing L9857 -40 to +125 so-8 tube L9857-tr -40 to +125 so-8 tape & reel www.st.com
content L9857 2/12 content 1 block diagram & pin de scription . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.5 reset functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
L9857 block diagram & pin description 3/12 1 block diagram & pin description 1.1 block diagram figure 1. block diagram 1.2 pin description figure 2. pin connection (top view) logic pulse filter level shifter "on" level shifter "off" undervoltage reset vb to vs pulse filter flip flop break before make undervoltage reset vcc to gnd v cc v b v s h o res- in gnd table 1. pin function pin # pin name description 1v cc driver supply, typically 17v 2 in driver control signal input (positive logic) 3 gnd ground 4 reset- driver enable signal input (negative logic) 5 nc no connection (no bondwire) 6v s mosfet source connection 7h o mosfet gate connection 8v b driver output stage supply v cc in gnd reset- 1 3 2 4nc v s h o v b 8 7 6 5
electrical specifications L9857 4/12 2 electrical specifications 2.1 thermal data 2.2 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to gnd, all currents are defined positive into any lead. this is a stress only rating and operation of the device at these or any conditions exceeding those indicated in the operational sections of this specifications is not implied. table 2. thermal data symbol parameter value unit r th(j-amb) thermal resistance junction to ambient max. 150 c/w table 3. absolute maximum ratings parameter value units symbol definition min. max. v bs high side floating supply voltage -0.3 20 v v b high side driver output stage voltage -0.3 300 v v s high side floating supply offset voltage v b ? 20 300 v vh o output voltage gate connection v s - 0.3 v b + 0.3 v v cc supply voltage -0.3 20 v v in input voltage -0.3 v cc + 0.3 v i in input injection current. full function, no latch-up; (guaranteed by design). test at 10v and 17v on eng. samples. --- +1 ma v res reset input voltage -0.3 v cc + 0.3 v v esd electrostatic discharge voltage (human body model) 2k v v cdm charge device model cdm, eos/esd ass. std 5.3. number of discharges per pin: 6 500 v dv/dt allowable offset voltage slew rate -50 50 v/nsec t j junction temperature -55 150 c t stg storage temperature -55 150 t l lead temperature (soldering, 10 seconds) 3 times bosch soldering profil acc. to bosch soldering conditions, gen. spec. - 300
L9857 electrical specifications 5/12 2.3 recommended operating conditions for proper operations the device should be used within the recommended conditions. 2.4 electrical characteristics table 4. recommended operating conditions parameter value units symbol definition min. max. v b high side driver output stage voltage -5v transient 0.1s vs+10 (1) 1. reset-logic functional for v b -v s =2v, independent from vcc-level vs+18 v v s high side floating supply offset voltage - 20v transient 0.1s -5 300 v vh o output voltage gate connection v s v b v v cc supply voltage 10 18 v v in input voltage 0 v cc v v res reset input voltage 0 v cc v f s switching frequency 200 khz t amb ambient temperature -40 125 c table 5. electrical characteristics unless otherwise specified, v cc = 15v, v bs = 15v, v s = 0v, in = 0v, res = 5v, load r = 50 , c = 2.5nf. unless otherwise noted, these specifications apply for an operating junction temperature range of -40c t j 125c. symbol parameter test condition min. typ. max. unit v cc supply v ccuv v cc supply undervoltage v cc rising from 0v v cc dropping from 10v 7.2 9.6 v v ccuvhy s v cc supply undervoltage lockout hysteresis 0.02 0.2 0.4 v t d uvcc undervoltage lockout response time v cc steps either from 10v to 6v or from 6v to 10v 0.5 20 s i qcc v cc supply current 400 a v bs supply v bsuv v bs supply undervoltage v bs rising from 0v v bs dropping from 10v 7.2 9.6 v td uvbs undervoltage lockout response time v bs steps either from 10v to 6v or from 6v to 10v 0.5 20 s v bsuvhy s v bs supply undervoltage lockout hysteresis 0.02 0.2 0.4 v
electrical specifications L9857 6/12 i qbs1 v bs supply current static mode, v bs = 10v, in = 0v or 5v 100 a i qbs2 v bs supply current static mode, v bs = 18v, in = 0v or v cc 200 a v bs v bs drop due to output turn-on v bs = 17v, c bs = 1 f, td ig-in = 3 s, t test = 100 s 210 mv gate driver characteristics i pkso1 peak output source current v bs = 10v, t j = 25c pw 10s 120 250 ma i pkso2 peak output source current v bs = 10v pw 10s 70 150 i pkso3 peak output source current v bs = 17v, t j = 25c pw 10s 250 500 i pkso4 peak output source current v bs = 17v, pw 10s 150 300 ihoh,off hoh off-state leakage current guaranteed by design 1 a t r1 output rise time v bs = 10v, t j = 25c 0.2 0.4 s t r2 output rise time v bs = 10v 0.3 0.5 t r3 output rise time v bs = 17v, t j = 25c 0.1 0.2 t r4 output rise time v bs = 17v 0.15 0.3 i pksi1 peak output sink current in = v cc , t j = 25c v bs = 10v, pw < 10s 120 250 ma i pksi2 peak output sink current in = v cc , v bs = 10v, pw < 10s 70 150 i pksi3 peak output sink current in = v cc , t j = 25c v bs = 17v, pw < 10s 250 500 i pksi4 peak output sink current in = v cc , v bs = 17v, pw < 10s 150 300 t f1 output fall time v bs = 10v, t j = 25c 0.2 0.4 s t f2 output fall time v bs = 10v 0.3 0.5 s t f3 output fall time v bs = 17v, t j = 25c 0.1 0.2 s table 5. electrical characteristics (continued) unless otherwise specified, v cc = 15v, v bs = 15v, v s = 0v, in = 0v, res = 5v, load r = 50 , c = 2.5nf. unless otherwise noted, these specifications apply for an operating junction temperature range of -40c t j 125c. symbol parameter test condition min. typ. max. unit
L9857 electrical specifications 7/12 t f4 output fall time v bs = 17v 0.15 0.3 s t plh input-to-output turn-on propogation delay (50% input level to 10% output level) 0.1 0.3 t phl input-to-output turn-off propogation delay (50% input level to 90% output level) 0.1 0.2 t phl_res res-to-output turn-off propogation delay (50% input level to 90% output levels) 0.1 0.3 t plh_res res-to-output turn-on propogation delay (50% input level to 10% output levels) 0.1 0.8 input characteristics v inh high logic level input threshold 9.5 v v inl low logic level input threshold 6 r in high logic level input resistance (pull-down resistor) 60 300 k i in low logic level input current v in = 0 5 a v h_res high logic level res input threshold reset signal comes from a 5v system! 3.5 v v l_res low logic level res input threshold reset signal comes from a 5v system! 1.4 r res high logic level res input resistance (pull-down resistor) reset signal comes from a 5v system with pull-up resistor 3.8k to 5v. (1) 60 300 k i res low logic level input current v res = 0 5 a 1. 4 hs-driver reset- inputs and other ic with their input pull- down resistors are connected in parallel with the reset wire. the enable input res- is an active low input, that means a logic low turns the external power mosfet off. the input circuitry has to make sure, that the mosf et is off, when the pin is open or floating. in the application the res- pin is tied t o a bipolar open collector transistor or mosf et open drain transistor with pull-up resi stor 3.8k to +5v together with other res- inputs of other ic. table 5. electrical characteristics (continued) unless otherwise specified, v cc = 15v, v bs = 15v, v s = 0v, in = 0v, res = 5v, load r = 50 , c = 2.5nf. unless otherwise noted, these specifications apply for an operating junction temperature range of -40c t j 125c. symbol parameter test condition min. typ. max. unit
electrical specifications L9857 8/12 2.5 reset functional diagram the diagram is guaranteed for the following condition. v cc = 10v; v bs = 10v @-40c, v cc = 17v; v bs = 17v @+25c and 125c figure 3. reset functional diagram in reset - ho-vs: -40c ho-vs: 25c ho-vs: 125c
L9857 timing diagrams 9/12 3 timing diagrams figure 4. input/output timing diagram figure 5. reset timing diagram in res vs t r 10% 90% t f 90% 10% in res hoh,l t phl_res t plh_res
package information L9857 10/12 4 package information in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 6. so-8 mechanical data & package dimensions outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 1.750 0.0689 a1 0.100 0.250 0.0039 0.0098 a2 1.250 0.0492 b 0.280 0.480 0.0110 0.0189 c 0.170 0.230 0.0067 0.0091 d (1) 4.800 4.900 5.000 0.1890 0.1929 0.1969 e 5.800 6.000 6.200 0.2283 0.2362 0.2441 e1 (2) 3.800 3.900 4.000 0.1496 0.1535 0.1575 e 1.270 0.0500 h 0.250 0.500 0.0098 0.0197 l 0.400 1.270 0.0157 0.0500 l1 1.040 0.0409 k0?8?0?8? ccc 0.100 0.0039 notes: 1. dimensions d does not include mold flash, protrusions or gate burrs. mold flash, potrusions or gate burrs shall not exceed 0.15mm in total (both side). 2. dimension ?e1? does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.25mm per side. so-8 0016023 d
L9857 revision history 11/12 5 revision history table 6. document revision history date revision changes 20-nov-2006 1 initial release.
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