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d a t a sh eet objective speci?cation 2003 jul 04 integrated circuits UAA3559HN bluetooth rf transceiver ( datasheet : )
2003 jul 04 2 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN features low cost solution for a bluetooth tm(1) radio fully integrated receiver with high sensitivity integrated low phase noise vco dedicated bluetooth phase-locked loop (pll) synthesizer transmitter preamplifier with programmable output power of up to 9 dbm 3-line serial interface bus low current consumption from 3.0 v supply. applications 2402 to 2480 mhz bluetooth radio transmission and reception in the industrial scientific and medical (ism) band conforming to the bluetooth specification version 1.1 . general description the UAA3559HN bicmos device is a low-power, highly integrated circuit. it features a fully integrated receiver for demodulating the output signal from an external antenna filter, an integrated vco, a synthesizer to implement bluetooth channel frequencies, and a transmitter preamplifier. the output power of the transmitter preamplifier can be programmed in eight steps from - 7.5 dbm to +9 dbm (typical) and drives either an antenna via an external switch diode or an external power amplifier. the synthesizer comprises a reference divider, main divider with prescaler, and a phase comparator. the division ratios of both dividers are programmed by control signals on a 3-wire bus. the main divider accepts a frequency range of 2402 mhz to 2481 mhz from the internal vco. the reference divider accepts either a 12 mhz or 13 mhz signal from an external crystal oscillator. the outputs of both dividers are compared by a phase comparator. a charge-pump in the comparator produces a current pulse output whenever a phase error occurs. the current pulse output signal controls and phase locks the vco frequency. the charge-pump current (phase comparator gain) is set to 4 ma. after the synthesizer is programmed, it is activated about 200 m s before the required channel time slot to allow time for the vco to lock to the channel frequency. the synthesizer is then deactivated just before the desired slot to allow open loop modulation of the vco in transmit mode. the synthesizer is also deactivated just before the desired slot in receive mode. this is required to reduce power consumption and allows adjustment of the vco by an internal carrier follower circuit to maintain an accurate if. the ic is designed to operate from 3.0 v nominal supplies. separate power pins are provided for different parts of the circuit. the ground pins should be connected together externally to prevent large, potentially harmful, currents flowing through the ic. all supply pins must be at the same potential. (1) the bluetooth trademarks are owned by bluetooth sig, inc., u.s.a. and licensed to koninklijke philips electronics n.v. ordering information type number package name description version UAA3559HN hvqfn32 plastic thermal enhanced very thin quad ?at package; no leads; 32 terminals; body 5 5 0.85 mm sot617-1
2003 jul 04 3 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN quick reference data v cc = 3.0 v; t amb =25 c; characteristics for which only a typical value is given are indicative; unless otherwise speci?ed. block diagram symbol parameter conditions min. typ. max. unit v cc supply voltage 2.7 3.0 3.4 v i cc(rx)(guard) receiver supply current during rx guard space vco = on; pll = closed - 20 - ma i cc(rx) receiver supply current vco = on; pll = open; receiver = on - 40 48 ma i cc(tx)(guard) transmitter supply current during tx guard space vco = on; pll = closed - 17 - ma i cc(tx) transmitter supply current vco = on; tx preampli?er = on; bits [12:10] = 100 - 33 40 ma i cc(pd) supply current in power-down mode - 530 m a f lo synthesized local oscillator (lo) frequency 2402 - 2480 mhz f i(xtal) crystal reference input frequency reference divider ratio 12 - 12 - mhz 13 - 13 - mhz f ph(comp) phase comparator frequency - 1 - mhz t amb ambient temperature - 30 +25 +85 c handbook, full pagewidth lna rfa rfb txa txb r_on t_on amp s_clk v cc(rx) s_data refclk cp r_data stctr data m test1 test2 vreg reggnd mdb179 vtune vmod driftcomp v cc(pll) v cc(reg) s_en 9 13 v cc(tx) 22 v dd 3 v ss 5 rssi 1 UAA3559HN 15 14 txgnd 19 rxgnd 16 20 21 17 18 86 2 24 pllgnd 23 30 31 29 32 4 7 11 12 27 26 10 25 vcognd 28 divider by 2 synthesizer control logic vco regulator dc offset extractor afc regulator demodulator fig.1 block diagram.
2003 jul 04 4 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN pinning symbol pin description rssi 1 received signal strength intensity voltage output refclk 2 reference frequency input v dd 3 logic supply voltage r_data 4 digital received data output v ss 5 logic ground s_data 6 3-wire bus data signal input stctr 7 receiver dc extractor and tx preampli?er timing control input s_en 8 3-wire bus enable signal input s_clk 9 3-wire bus clock signal input test1 10 test pin 1; do not connect datam 11 receive data analog decision voltage output test2 12 test pin 2; do not connect v cc(rx) 13 receiver supply voltage rfb 14 received signal input b rfa 15 received signal input a rxgnd 16 received ground r_on 17 receiver pin diode control digital output t_on 18 transmitter pin diode control digital output txgnd 19 transmitter ground txa 20 transmitted signal output a txb 21 transmitted signal output b v cc(tx) 22 transmitter supply voltage pllgnd 23 vco ground v cc(pll) 24 pll supply voltage v cc(reg) 25 regulator supply voltage vreg 26 regulator output voltage reggnd 27 regulator ground vcognd 28 synthesizer ground vtune 29 vco tuning input cp 30 charge-pump output driftcomp 31 vco drift compensation vmod 32 modulation input gnd die pad ground
2003 jul 04 5 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN handbook, full pagewidth UAA3559HN mdb180 8 7 6 5 4 3 2 1 17 18 19 20 21 22 23 24 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 s_clk test1 datam test2 v cc(rx) rfb rfa rxgnd vmod driftcomp cp vtune vcognd reggnd vreg v cc(reg) s_en stctr s_data v ss r_data v dd refclk rssi r_on t_on txgnd txa txb v cc(tx) pllgnd v cc(pll) bottom view fig.2 pin configuration. functional description transmit chain vco; buffer and divider the vco has a fully integrated tank circuit with on-chip inductors, and an on-chip regulator which minimizes any frequency disturbances caused by v cc variations. the vco regulator requires a decoupling capacitor to be connected to pin vreg. the vco operates at twice the bluetooth frequency. the vco signal is buffered and fed into a divide-by-two circuit to produce the required local oscillator (lo) frequencies for either transmit (tx) mode or receive (rx) mode. the large difference between the transmitter and vco frequencies reduces transmitter to oscillator coupling problems. the output of the divide-by-two circuit drives the main divider prescaler in the synthesizer and also drives the tx preamplifier in tx mode, or the rx lo buffer in rx mode. the high isolation between the vco buffer and the main divider ensures that only very small frequency changes occur when the tx preamplifier or the rx section are turned on. in the tx mode, the vco is directly modulated with gfsk data at pin vmod. t ransmit preamplifier the tx preamplifier gain is programmable in seven steps of up to 4 db and can either amplify the rf signal up to a level of 9 dbm (typical), or attenuate the rf signal to - 7.5 dbm (typical), see table 5. the output of the tx preamplifier at pins txa and txb can directly drive an antenna via a pin diode switch and band filter for bluetooth power class 2 and 3 applications. the type of tx preamplifier load can affect the frequency of the vco when the preamplifier powers up. this pulling effect can be counteracted by changing the time at which the preamplifier powers up, and is implemented by selecting one of two possible ramp-up modes: ramp-up mode 0 or ramp-up mode 1. in ramp-up mode 0, the preamplifier powers up on the rising edge of stctr. in ramp-up mode 1, the preamplifier powers up on the falling edge of stctr; see table 3 and timing diagrams figs 3 and 4.
2003 jul 04 6 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN synthesizer m ain divider the main divider is clocked by the rf signal from the vco via the divide-by-two circuit at a frequency in the range 2402 mhz to 2481 mhz. the divider ratio is programmable to any value in the range 2304 to 2559 inclusive; see table 6. r eference divider the reference divider is clocked by the reference signal at either 12 mhz or 13 mhz via pin refclk. the divider ratio is programmable to 12 or 13. the circuit operates in the range 150 mv to 500 mv (rms); see table 4. p hase comparator the outputs of both the main divider and reference divider drive a phase comparator. its charge-pump circuit outputs current pulses at pin cp. the cp signal connects to pin vtune to complete the pll, which controls and phase locks the vco frequency. the duration of a current pulse is equal to the difference in time between the arrival of the leading edges of both dividers outputs. if the leading edge from the main divider arrives first, the charge-pump sinks current. if the leading edge from the reference divider arrives first, the charge-pump sources current. the cp signal current can be integrated by connecting an external rc loop filter to pin vtune as shown in fig.6. an internal drift compensation circuit maintains the vco frequency when the synthesizer is deactivated during open loop modulation. it requires an external capacitor to be connected to pin driftcomp. additional internal circuits ensure that the gain of the phase comparator remains linear even for small phase errors. serial programming bus the ic is programmed by a simple 3-line unidirectional serial bus comprising data (s_data), clock (s_clk) and enable (s_en). the serial data is loaded as a burst that is framed by s_en. the programming clock edges and corresponding data bits are ignored until s_en goes low. the program data is read directly by the main divider when s_en goes high. signals s_data and s_en should change value on the falling edge of s_clk. when inactive, s_clk should be held low. the internal register stores only the last 32 bits of data that are serially clocked into the ic. additional leading bits are ignored, and no check is made on the number of clock pulses received. the allocation of data bits in the ic register is shown in table 1; the first bit entered is bit 31, the last bit is bit 0. signal s_en also controls the operation of the pll by either activating or deactivating the internal synthesizer. the pll opens for a brief interval after the falling edge of s_en. receiver the receiver is a fully integrated bluetooth rf and if strip, and demodulator. it provides all of the channel filtering required over the bluetooth band, and produces either an analog or a digital signal at output r_data. the very few off-chip components required should not require any trim adjustment. the receiver input signal is fed from the rf antenna, via either a band filter or an antenna switch to pins rfa and rfb. a representation of the instantaneous received signal strength is output at pin rssi. the local oscillator frequency is half the vco frequency and must be tuned to 1 mhz above the received channel frequency to produce a 1 mhz if. a dc offset extractor circuit obtains the dc component of the demodulated analog signal. a comparator compares the extracted dc with the demodulated analog signal to produce a digital stream signal at pin r_data. the level of extracted dc at the comparator is carefully adjusted by the occurrence and duration of signal stctr. during the alternating ones and zeroes of the trailer code, pin stctr should normally be set high. the baseband must ensure that stctr is synchronized with the received data. there are two modes for extracting the dc component from the demodulated signal: mode 0 and mode 1. both modes use two methods for dc extraction using a minmax circuit and an rc integrating circuit. the minmax circuit quickly determines the average dc component from the maximum and minimum swings of the demodulated signal. the remaining dc is extracted by one or two rc circuits. the minmax circuit is enabled following the 16 m s delay after the falling edge of s_en. when pin stctr goes high, the minmax circuit is disabled and the rc circuit is enabled. in mode 0, an rc circuit with a fast time constant is enabled. in mode 1 an rc circuit with a slow time constant is enabled. when stctr goes low, in mode 0, the fast time constant rc circuit is disabled and a slow time constant rc circuit is enabled.
2003 jul 04 7 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN in mode 1, the slow time constant rc circuit remains enabled. the slow time constant rc circuit in either mode is disabled on the rising edge of the second s_en pulse. the rc resistors for modes 0 and 1 are internal; an external capacitor has to be connected to pin datam. the timing of these actions is shown in fig.5. operating mode the ic timing is controlled by signal s_en. in tx mode, after the register is programmed via s_data, the transmitter is activated on the falling edge of stctr. the rising edge of s_en activates the pll, closes the loop and powers up the vco regulator. the falling edge of stctr is emulated by the output signal on pin t_on which can be used to activate an external power amplifier or antenna switch. on the falling edge of this first s_en pulse, the loop opens, unless bit 9 (pll) is set; see figs 3 and 4, and table 2. in rx mode (bit trx = 1), the receiver is activated on the falling edge of s_en and is ready to demodulate data 16 m s later. the falling edge of s_en is emulated by the output signal on pin r_on which is suitable for driving an external receiver pin diode. at the end of a time slot period, a second s_en pulse is required to power-down the receiver or transmitter chain and synthesizer. power-down mode in power-down mode, current consumption is reduced to below 60 m a. pins r_on and t_on are in 3-state output mode. the ic enters power-down mode on the falling edge of each s_en pulse that is not preceded by an s_clk signal edge. register description table 1 register bit allocation notes 1. in normal operation, 32 bits are programmed into the register; bit 31 is read in first and bit 0 last. 2. those bits allocated with values are reserved for test purposes and must be programmed with this value. register bit (1) value (2) name 31 1 - 30 0 - 29 1 - 28 to 26 0 - 25 1 - 24 to 23 0 - 22 - afc 21 to 20 1 - 19 - tx ramp-up mode 18 - dc extractor mode 17 0 - 16 1 - 15 0 - 14 - ref1 13 - ref0 12 to 10 - tx output power 9 - pll 8 - trx mode 7 to 0 - main divider programming
2003 jul 04 8 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN table 2 description of register bits table 3 tx ramp-up sequence table 4 reference divider programming bit function description 22 afc automatic frequency control. afc is used to follow transmitter carrier in rx mode. 0 = afc off and 1 = afc on. 19 tx ramp-up mode see table 3 18 dc extractor mode dc extractor mode programming. 0 = mode 0, minmax - fast rc followed by slow rc time constants; 1 = mode 1, minmax - slow rc time constants; see timing diagrams in fig.5. 14 to 13 ref1 and ref0 these bits de?ne the reference divider ratio of the synthesizer; see table 4. 12 to 10 tx output power these bits set the tx preampli?er output power; see table 5. 9 pll pll mode. 1 = pll remains on while the vco is on; 0 = the pll is opened at the start of the active slot period. 8 trx transmit or receive mode. 1 = rx mode selected; 0 = tx mode selected. 7 to 0 main divider programming the main divider ratio is equal to 2304 + n where the binary code for n is given by bits 7 to 0 with bit 7 as the msb; see table 6. tx ramp-up mode bit 19 result logic 0 logic 1 s_en rising edge stctr rising edge tx preampli?er bias stage on stctr rising edge stctr falling edge tx preampli?er output stage on stctr falling edge stctr falling edge pin t_on high s_en rising edge s_en rising edge pll on (closed) s_en falling edge s_en falling edge pll off (open; bit 9 = 0) s_en reset rising edge s_en reset rising edge pll off (closed; bit 9 = 1) s_en reset falling edge s_en reset rising edge tx preampli?er bias stage off s_en reset rising edge s_en reset rising edge tx preampli?er output stage off s_en reset rising edge s_en reset rising edge pin t_on low bit 14 bit 13 reference divider ratio reference frequency input (mhz) 0 0 12 12 1 0 13 13
2003 jul 04 9 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN table 5 transmitter preampli?er output power programming table 6 main divider programming example limiting values in accordance with the absolute maximum rating system (iec 60134); note 1. note 1. all ground pins must be connected together externally on the printed circuit board to prevent a large current flowing through the die. handling inputs and outputs are protected against electrostatic discharge in normal handling. however it is good practice to take normal precautions appropriate to handling mos devices (see handling mos devices ). all pins withstand 1000 v hbm and 50 v mm esd test in accordance with eia/jesd22-a114-b class1 (june 2002) . bit 12 bit 11 bit 10 tx output power, typical target (dbm) 000 - 7.5 001 - 4.5 010 - 0.5 0 1 1 +1.5 1 0 0 +4.5 101+8 110+9 111+9 bit main divider ratio synthesized frequency (mhz) channel 76543210 binary equivalent of n 2304 + n 1.0 (2304 + n) 011000102402 2402 tr ansmit channel 0 011000112403 2403 receive channel 0 101100002480 2480 tr ansmit channel 78 101100012481 2481 receive channel 78 symbol parameter min. max. unit v cc supply voltage - 0.3 +3.6 v v n voltage on any pin 0 v cc v p i(max) maximum power at receiver input - 0 dbm t stg storage temperature - 55 +125 c t amb ambient temperature - 30 +85 c t j junction temperature - 150 c
2003 jul 04 10 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN thermal characteristics characteristics v cc = 3.0 v; t amb =25 c; f dev = 160 khz; characteristics for which only a typical value is given are not tested, unless otherwise speci?ed. symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air, exposed die-pad soldered on a 4 layer fr4 pcb 30 k/w symbol parameter conditions min. typ. max. unit supply v cc supply voltage 2.7 3.0 3.4 v i cc(rx)(guard) receiver supply current during guard space vco = on; pll = closed - 20 - ma i cc(rx) receiver supply current receiver = on; vco = on; pll = open - 40 48 ma i cc(tx)(guard) transmitter supply current during guard space vco = on; pll = closed - 17 - ma i cc(tx) transmitter supply current tx preampli?er = on; vco = on; bits [12:10] = 100 - 33 40 ma i cc(pd) supply current in power-down mode - 530 m a synthesizer main divider d/d main main divider ratio 2402 - 2481 f o(rf) rf output frequency 2402 - 2480 mhz synthesizer reference divider input f i(xtal) crystal reference input frequency reference divider ratio 12 - 12 - mhz 13 - 13 - mhz v i(xtal)(rms) sinusoidal input signal level (rms value) 0.15 - 2v r i resistive part of the input impedance f ref = 13 mhz - 2 - k w c i capacitive part of the input impedance - 2.5 - pf phase detector f ph(comp) phase comparator frequency - 1 - mhz charge-pump output i l charge-pump leakage v cp = 0.5v cc ; note 1 -- 5na i o charge-pump output current v cp = 0.5v cc ; note 1 - 3.5 - ma vco f lo synthesized local oscillator (lo) frequency t amb = - 30 to +85 c; note 2 2402 - 2481 mhz
2003 jul 04 11 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN d f vco(vtune) frequency variation with voltage on pin vtune de?ned at lo frequency; 0.3 < v cp <(v cc - 0.3) - 120 - mhz/v d f (slope)(l) tuning slope low band note 3 - 110 - mhz/v d f (slope)(h) tuning slope high band note 3 - 110 - mhz/v d f vco(mod) frequency variation with modulation input de?ned at lo frequency; v vmod(dc) = 0.9 v 0.8 1.0 1.2 mhz/v tx preampli?er p o output power t amb = - 30 to +85 c; note 2 bits [12:10] = 000 -- 7.5 - dbm bits [12:10] = 001 -- 4.5 - dbm bits [12:10] = 010 -- 0.5 - dbm bits [12:10] = 011 - 1.5 - dbm bits [12:10] = 100 1.5 4.5 7.5 dbm bits [12:10] = 101 - 8 - dbm bits [12:10] = 110 - 9 - dbm bits [12:10] = 111 - 9 - dbm r o resistive part of parallel output impedance balanced; at 2450 mhz - tbf -w c o capacitive part of parallel output impedance balanced; at 2450 mhz - tbf - pf vco (feedthru) vco frequency feedthrough level at tx output referenced to p o at 2450 mhz; note 2 -- 20 - dbc c/n carrier-to-noise ratio at tx output carrier offset is 500 khz -- 107 - 89 dbc/hz carrier offset is 2500 khz -- 126 - dbc/hz receiver section ; notes 5 and 6 f i(rf) rf input frequency 2402 - 2480 mhz v o(rssi) rssi output voltage monotonic over range - 86 to - 36 dbm with - 36 dbm at rf input - 1.6 1.8 v with - 86 dbm at rf input tbf 0.3 0.5 v t wake wake-up time between receiver power-up and correct rssi output no external capacitor on pin rssi - 825 m s d p i(sens) input sensitivity ber 10 - 3 ; with tx carrier frequency offset up to 115 khz for t amb = - 30 to +85 c; note 2 -- 85 - 73 dbm p i(max) maximum useable input level ber 10 - 3 ; note 2 - 23 -- dbm a im intermodulation rejection ber 10 - 3 ; desired channel = - 67 dbm; interfering frequency at 5 and 10 channels away from desired channel; note 2 - 34 - dbc symbol parameter conditions min. typ. max. unit
2003 jul 04 12 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN a co co-channel rejection ber 10 - 3 ; desired channel = - 63 dbm; note 2 - 11 - 10 - dbc a (n 1) adjacent channel rejection (n 1) ber 10 - 3 ; desired channel = - 63 dbm; level of adjacent channel referenced to level of desired channel; note 2 03 - dbc a (n-2) bi-adjacent channel rejection (n - 2) ber 10 - 3 ; desired channel = - 63 dbm; level of bi-adjacent channel referenced to level of desired channel; note 2 30 33 - dbc ir (n+2) image frequency rejection (n + 2) ber 10 - 3 ; desired channel = - 63 dbm; level of image frequency referenced to level of desired channel; note 2 912 - dbc ir (n+3) adjacent image frequency rejection (n + 3) ber 10 - 3 ; desired channel = - 70 dbm; level of adjacent image frequency referenced to level of desired channel; note 2 20 23 - dbc a (n- 3 3)(n+ 3 4) rejection with more than three channels separation 0to(n - 3) and (n + 4) to 78 ber 10 - 3 ; desired channel = - 70 dbm; level of adjacent channel referenced to level of desired channel; note 2 40 43 - dbc a oob(block) rejection of an out-of-band blocking signal ber 10 - 3 ; desired channel = - 70 dbm; level of cw interferer referenced to level of desired channel; range: 2 to 3 ghz; note 2 40 43 - dbc p lo(feedthru) local oscillator feedthrough level f vco = 2450 mhz -- 80 - dbm r i rf resistive part of the parallel input impedance balanced; at 2450 mhz - 76 -w c i rf capacitive part of the parallel input impedance balanced; at 2450 mhz - 0.6 - pf interface logic input and output signal levels; pins s_data, s_clk, s_en, t_on, r_on, r_data and stctr v ih high-level input voltage note 7 1.4 - v cc v v il low-level input voltage -- 0.4 v v oh high-level output voltage for r_data output; note 7 2.4 2.5 - v v ol low-level output voltage for r_data output; note 7 -- 0.4 v i i(bias) input bias current logic 1 or logic 0 - 5 - +5 m a i source(r_on) , i source(t_on) output current source capability on pins r_on and t_on - 4 - ma symbol parameter conditions min. typ. max. unit
2003 jul 04 13 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN notes 1. suitable for a typical locking time of 160 m s including filter calibration. 2. measured and guaranteed only on the philips evaluation board, including printed-circuit board and balun filter, not including the pin diode or band filter loss. 3. the slope for g avg is evaluated with v vtune : 4. tx preamplifier power steps form a monotonic sequence. 5. ber measurement conditions are described in bluetooth ber method . 6. all receiver section parameters are measured at the receiver balun input, and a 3 db loss is assumed for the antenna path. the values expressed in dbc, refer to the level of the interfering signal and are positive for interfering signal levels higher than the desired signal level. 7. the output of pin r_data is designed to interface with pin r_data of the philips baseband ic. f s_clk 3-wire bus frequency -- 7 mhz t s_en s_en pulse duration to enable power-down mode 2 --m s to lock the pll and calibrate 140 160 -m s symbol parameter conditions min. typ. max. unit f d slope () f d v vtune d ------------------------ = handbook, full pagewidth mdb181 guard space open closed s_clk s_data s_en stctr pll refclk preamplifier bias preamplifier out t_on tx power antenna power 3-state 3-state tx data fig.3 tx slot timing; ramp-up mode 0.
2003 jul 04 14 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN handbook, full pagewidth mdb182 guard space open closed s_clk s_data s_en stctr pll refclk preamplifier bias preamplifier out t_on tx power antenna power 3-state 3-state tx data fig.4 tx slot timing; ramp-up mode 1.
2003 jul 04 15 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN handbook, full pagewidth mdb183 preamble 16 m s delay 3-state 3-state guard space sync word trailer code header payload closed open s_clk s_data s_en rssi stctr minmax rcfast rcslow minmax rcslow internal vco on pll internal receiver on refclk r_data r_on dc extract mode 0: minmax-rcfast-rcslow dc extract mode 1: minmax-rcslow fig.5 rx slot timing.
2003 jul 04 16 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN application information the schematic shows a typical application diagram. component values depend on the application. two time constants are set by an external capacitor, the values given are suitable for most applications: when afc is used, c datam is chosen to optimize the afc time constant. the value of c datam is chosen to optimize the time constants of the afc, and dc extractor modes 0 and 1. the typical value of c datam is 10 nf for afc. if afc is not used, c datam adjusts the rc time constant of extractor modes 0 and 1. the value of c driftcomp is chosen to set the time constant of the vco drift compensation. the typical value is 6.8 nf. handbook, full pagewidth UAA3559HN mdb184 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 l/ 4 17 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 refclk v dd v cc s_clk test2 v cc(rx) rfb rfa rxgnd test1 datam r_data rssi v cc(pll) pllgnd v cc(tx) txb txa txgnd t_on r_on v ss s_data vmod driftcomp cp vtune vcognd reggnd vreg v cc(reg) s_en stctr v cc v cc v cc v cc receive balun c datam 10 nf c driftcomp 6.8 nf transmit balun fig.6 application diagram.
2003 jul 04 17 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN package outline 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 5.1 4.9 d h 3.25 2.95 y 1 5.1 4.9 3.25 2.95 e 1 3.5 e 2 3.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot617-1 mo-220 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot617-1 hvqfn32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 916 32 25 24 17 8 1 x d e c b a e 2 terminal 1 index area terminal 1 index area 01-08-08 02-10-18 1/2 e 1/2 e a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
2003 jul 04 18 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: below 220 c (snpb process) or below 245 c (pb-free process) C for all bga and ssop-t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. below 235 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2003 jul 04 19 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the reflow oven. the package body peak temperature must be kept as low as possible. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package (1) soldering method wave reflow (2) bga, lbga, lfbga, sqfp, ssop-t (3) , tfbga, vfbga not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable plcc (5) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (5)(6) suitable ssop, tssop, vso, vssop not recommended (7) suitable
2003 jul 04 20 philips semiconductors objective speci?cation bluetooth rf transceiver UAA3559HN data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands 403506/01/pp 21 date of release: 2003 jul 04 document order number: 9397 750 10911

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