View LT1395CS5_2884353.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 lt1395/lt1396/lt1397 applicatio s u features typical applicatio u descriptio u single/dual/quad 400mhz current feedback amplifier the lt ? 1395/lt1396/lt1397 are single/dual/quad 400mhz current feedback amplifiers with an 800v/ m s slew rate and the ability to drive up to 80ma of output current. the lt1395/lt1396/lt1397 operate on all supplies from a single 4v to 6v. at 5v, they draw 4.6ma of supply current per amplifier. the lt1395cs6 also adds a shut- down pin. when disabled, the lt1395cs6 draws virtually zero supply current and its output becomes high imped- ance. the lt1395cs6 will turn on in only 30ns and turn off in 40ns, making it ideal in spread spectrum and portable equipment applications. the lt1395/lt1396/lt1397 are manufactured on linear technologys proprietary complementary bipolar process. they have standard single/dual/quad pinouts and they are optimized for use on supply voltages of 5v. n 400mhz bandwidth on 5v (a v = 1) n 350mhz bandwidth on 5v (a v = 2, C1) n 0.1db gain flatness: 100mhz (a v = 1, 2 and C1) n high slew rate: 800v/ m s n wide supply range: 2v(4v) to 6v(12v) n 80ma output current n low supply current: 4.6ma/amplifier n lt1395: so-8, sot23-5 and sot23-6 packages lt1396: so-8 and msop packages lt1397: so-14 and ssop-16 packages n cable drivers n video amplifiers n mux amplifiers n high speed portable equipment n if amplifiers unity-gain video loop-through amplifier loop-through amplifier frequency response , ltc and lt are registered trademarks of linear technology corporation. + v out 1395/6/7 ta01 12.1k 0.67pf r f2 255 w 1% resistors for a gain of g: v out = g (v in + ?v in ) r f1 = r f2 r g1 = (5g ?1) r f2 r g2 = trim cmrr with r g1 high input resistance does not load cable even when power is off 1/2 lt1396 r f2 (5g ?1) r g2 63.4 w r f1 255 w r g1 1.02k + 1/2 lt1396 3.01k 3.01k 12.1k v in v in + bnc inputs 0.67pf frequency (hz) 100 ?0 gain (db) ?0 ?0 ?0 ?0 ?0 10 1k 10k 100k 1g 1395/6/7 ta02 1m 10m 100m 0 common mode signal normal signal
2 lt1395/lt1396/lt1397 a u g w a w u w a r b s o lu t exi t i s total supply voltage (v + to v C ) ........................... 12.6v input current (note 2) ....................................... 10ma output current ................................................. 100ma differential input voltage (note 2) ........................... 5v output short-circuit duration (note 3) ........ continuous wu u package / o rder i for atio order part number lt1397cs t jmax = 150 c, q ja = 100 c/w consult factory for industrial and military grade parts. top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a in a +in a v + +in b in b out b out d in d +in d v +in c in c out c + + + + operating temperature range (note 4) . C 40 c to 85 c specified temperature range (note 5) .. C 40 c to 85 c storage temperature range ................ C 65 c to 150 c junction temperature (note 6) ............................ 150 c lead temperature (soldering, 10 sec)................. 300 c (note 1) 1 2 3 4 8 7 6 5 top view nc v + out nc nc ?n +in v s8 package 8-lead plastic so + 1 2 3 4 8 7 6 5 top view v + out b in a +in b out a in a +in a v s8 package 8-lead plastic so + + 1 2 3 4 out a in a +in a v 8 7 6 5 v + out b in a +in b top view ms8 package 8-lead plastic msop + + 1 2 3 4 5 6 7 8 top view gn package 16-lead plastic ssop 16 15 14 13 12 11 10 9 out a in a +in a v + +in b in b out b nc out d in d +in d v +in c in c out c nc + + + + t jmax = 150 c, q ja = 150 c/w order part number lt1396cs8 t jmax = 150 c, q ja = 150 c/w order part number lt1397cgn t jmax = 150 c, q ja = 135 c/w s8 part marking 1396 gn part marking 1397 order part number lt1396cms8 t jmax = 150 c, q ja = 250 c/w ms8 part marking ltdy v ? 2 5 v + 4 ?n out 1 top view s5 package 5-lead plastic sot-23 +in 3 + order part number lt1395cs8 s8 part marking 1395 lt1395cs6 LT1395CS5 t jmax = 150 c, q ja = 230 c/w t jmax = 150 c, q ja = 250 c/w order part number order part number s6 part marking s5 part marking ltmf ltma out 1 v 2 +in 3 6 v + 5 en 4 ?n top view s6 package 6-lead plastic sot-23 +
3 lt1395/lt1396/lt1397 symbol parameter conditions min typ max units v os input offset voltage 1 10 mv l 12 mv d v os / d t input offset voltage drift l 15 m v/ c i in + noninverting input current 10 25 m a l 30 m a i in C inverting input current 10 50 m a l 60 m a e n input noise voltage density f = 1khz, r f = 1k, r g = 10 w , r s = 0 w 4.5 nv/ ? hz +i n noninverting input noise current density f = 1khz 6 pa/ ? hz Ci n inverting input noise current density f = 1khz 25 pa/ ? hz r in input resistance v in = 3.5v l 0.3 1 m w c in input capacitance 2.0 pf v inh input voltage range, high v s = 5v l 3.5 4.0 v v s = 5v, 0v 4.0 v v inl input voltage range, low v s = 5v l C 4.0 C 3.5 v v s = 5v, 0v 1.0 v v outh output voltage swing, high v s = 5v 3.9 4.2 v v s = 5v l 3.7 v v s = 5v, 0v 4.2 v v outl output voltage swing, low v s = 5v C 4.2 C 3.9 v v s = 5v l C 3.7 v v s = 5v, 0v 0.8 v v outh output voltage swing, high v s = 5v, r l = 150 w 3.4 3.6 v v s = 5v, r l = 150 w l 3.2 v v s = 5v, 0v; r l = 150 w 3.6 v v outl output voltage swing, low v s = 5v, r l = 150 w C 3.6 C 3.4 v v s = 5v, r l = 150 w l C 3.2 v v s = 5v, 0v; r l = 150 w 0.6 v cmrr common mode rejection ratio v cm = 3.5v l 42 52 db Ci cmrr inverting input current v cm = 3.5v 10 16 m a/v common mode rejection v cm = 3.5v l 22 m a/v psrr power supply rejection ratio v s = 2v to 5v l 56 70 db +i psrr noninverting input current v s = 2v to 5v 1 2 m a/v power supply rejection l 3 m a/v Ci psrr inverting input current v s = 2v to 5v l 27 m a/v power supply rejection a v large-signal voltage gain v out = 2v, r l = 150 w 50 65 db r ol transimpedance, d v out / d i in C v out = 2v, r l = 150 w 40 100 k w i out maximum output current r l = 0 w l 80 ma i s supply current per amplifier v out = 0v l 4.6 6.5 ma disable supply current en pin voltage = 4.5v, r l = 150 w l 0.1 100 m a (lt1395cs6 only) i en enable pin current (lt1395cs6 only) 30 110 m a l 200 m a sr slew rate (note 7) a v = C 1, r l = 150 w 500 800 v/ m s e lectr ic al c c hara terist ics the l denotes specifications which apply over the specified operating temperature range, otherwise specifications are at t a = 25 c. for each amplifier: v cm = 0v, v s = 5v, en = 0.5v, pulse tested, unless otherwise noted. (note 5)
4 lt1395/lt1396/lt1397 symbol parameter conditions min typ max units e lectr ic al c c hara terist ics the l denotes specifications which apply over the specified operating temperature range, otherwise specifications are at t a = 25 c. for each amplifier: v cm = 0v, v s = 5v, pulse tested, unless otherwise noted. (note 5) note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: this parameter is guaranteed to meet specified performance through design and characterization. it has not been tested. note 3: a heat sink may be required depending on the power supply voltage and how many amplifiers have their outputs short circuited. note 4: the lt1395c/lt1396c/lt1397c are guaranteed functional over the operating temperature range of C 40 c to 85 c. note 5: the lt1395c/lt1396c/lt1397c are guaranteed to meet specified performance from 0 c to 70 c. the lt1395c/lt1396c/lt1397c are designed, characterized and expected to meet specified performance from C40 c and 85 c but is not tested or qa sampled at these temperatures. for guaranteed i-grade parts, consult the factory. note 6: t j is calculated from the ambient temperature t a and the power dissipation p d according to the following formula: LT1395CS5: t j = t a + (p d ? 250 c/w) lt1396cs6: t j = t a + (p d ? 230 c/w) lt1395cs8: t j = t a + (p d ? 150 c/w) lt1396cs8: t j = t a + (p d ? 150 c/w) lt1396cms8: t j = t a + (p d ? 250 c/w) lt1397cs14: t j = t a + (p d ? 100 c/w) lt1397cgn16: t j = t a + (p d ? 135 c/w) note 7: slew rate is measured at 2v on a 3v output signal. note 8: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. the resolution of this equipment is 0.1% and 0.1 . ten identical amplifier stages were cascaded giving an effective resolution of 0.01% and 0.01 . note 9: for lt1395cs6, turn-on delay time (t on ) is measured from control input to appearance of 1v(50%) at the output, for v in = 1v and a v = 2. likewise, turn-off delay time (t off ) is measured from control input to appearance of 1v(50%) on the output for v in = 1v and a v = 2. this specification is guaranteed by design and characterization. small signal small signal small signal v s (v) a v r l ( w )r f ( w )r g ( w ) C 3db bw (mhz) 0.1db bw (mhz) peaking (db) 5 1 100 374 C 400 100 0.1 5 2 100 255 255 350 100 0.1 5 C 1 100 280 280 350 100 0.1 typical ac perfor a ce w u t on turn-on delay time (note 9) r f = r g = 255 w , r l = 100 w , (lt1395cs6 only) 30 75 ns t off turn-off delay time (note 9) r f = r g = 255 w , r l = 100 w , (lt1395cs6 only) 40 100 ns C 3db bw C3db bandwidth a v = 1, r f = 374 w , r l = 100 w 400 mhz a v = 2, r f = r g = 255 w , r l = 100 w 350 mhz 0.1db bw 0.1db bandwidth a v = 1, r f = 374 w , r l = 100 w 100 mhz a v = 2, r f = r g = 255 w , r l = 100 w 100 mhz t r , t f small-signal rise and fall time r f = r g = 255 w , r l = 100 w , v out = 1v p-p 1.3 ns t pd propagation delay r f = r g = 255 w , r l = 100 w , v out = 1v p-p 2.5 ns os small-signal overshoot r f = r g = 255 w , r l = 100 w , v out = 1v p-p 10 % t s settling time 0.1%, a v = C 1, r f = r g = 280 w , r l = 150 w 25 ns dg differential gain (note 8) r f = r g = 255 w , r l = 150 w 0.02 % dp differential phase (note 8) r f = r g = 255 w , r l = 150 w 0.04 deg
5 lt1395/lt1396/lt1397 large-signal transient response (a v = C 1) output (1v/div) time (10ns/div) v s = 5v v in = 2.5v r f = r g = 280 w r l = 100 w 1395/6/7 g06 large-signal transient response (a v = 2) output (1v/div) time (10ns/div) v s = 5v v in = 1.25v r f = r g = 255 w r l = 100 w 1395/6/7 g05 large-signal transient response (a v = 1) output (1v/div) time (10ns/div) v s = 5v v in = 2.5v r f = 374 w r l = 100 w 1395/6/7 g04 cc hara terist ics uw a t y p i ca lper f o r c e psrr vs frequency maximum undistorted output voltage vs frequency 2nd and 3rd harmonic distortion vs frequency frequency (hz) 90 distortion (db) 80 60 40 30 1k 100k 1m 100m 1395/6/7 g07 100 10k 10m 50 70 110 hd2 hd3 t a = 25 c r f = r g = 255 r l = 100 v s = 5v v out = 2vpp frequency (hz) 1m 2 output voltage (v p-p ) 3 4 5 6 8 10m 100m 1395/6/7 g08 7 a v = +1 a v = +2 t a = 25 c r f = 374 (a v = 1) r f = r g = 255 (a v = 2) r l = 100 v s = 5v frequency (hz) 20 psrr (db) 40 50 70 80 10k 1m 10m 100m 1395/6/7 g09 0 100k 60 30 10 + psrr psrr t a = 25 c r f = r g = 255 r l = 100 a v = +2 closed-loop gain vs frequency (a v = 1) 0 C2 C4 C6 gain (db) 1m 10m 1g 100m frequency (hz) v s = 5v v in = C10dbm r f = 374 w r l = 100 w 1395/6/7 g01 closed-loop gain vs frequency (a v = C 1) v s = 5v v in = C10dbm r f = r g = 280 w r l = 100 w gain (db) 1m 10m 1g 100m frequency (hz) closed-loop gain vs frequency (a v = 2) v s = 5v v in = C10dbm r f = r g = 255 w r l = 100 w 6 4 2 0 gain (db) 1m 10m 1g 100m frequency (hz) 1395/6/7 g02 1395/6/7 g03 0 C2 C4 C6
6 lt1395/lt1396/lt1397 capacitive load vs output series resistor supply current vs supply voltage capacitive load (pf) 10 0 output series resistance ( ) 10 20 40 100 1000 1395/6/7 g14 30 r f = r g = 255 v s = 5v overshoot < 2% output voltage swing vs temperature positive supply current per amplifier vs temperature ambient temperature ( c) ?0 ? output voltage swing (v) ? ? ? 0 5 2 0 50 75 1395/6/7 g16 ? 3 4 1 ?5 25 100 125 r l = 150 r l = 100k r l = 150 r l = 100k v s = 5v cc hara terist ics uw a t y p i ca lper f o r c e input voltage noise and current noise vs frequency frequency (hz) 10 input noise (nv/ hz or pa/ hz) 10 100 1000 30 100 300 1k 3k 10k 30k 100k 1395/6/7 g10 1 ? n +i n e n frequency (hz) 10k 0.01 output impedance ( ) 1 100 1m 10m 100k 100m 1395/6/7 g11 0.1 10 r f = r g = 255 r l = 50 a v = +2 v s = 5v output impedance vs frequency maximum capacitive load vs feedback resistor feedback resistance ( ) 300 1 capacitive load (pf) 10 100 1000 900 1500 2100 2700 3300 1395/6/7 g13 r f = r g a v = +2 v s = 5v peaking 5db frequency (hz) 100k 100 output impedance (disabled) ( ) 1k 10k 100k 1m 10m 100m 1395/6/7 g12 r f = 374 a v = +1 v s = 5v supply voltage ( v) 0 0 supply current (ma) 1 3 4 5 2 4 59 1395/6/7 g15 2 13 6 7 8 6 en = v en = 0v, all non-disable devices ambient temperature ( c) ?0 positive supply current per amplifier (ma) 4.75 25 1395/6/7 g18 4.00 3.50 ?5 0 50 3.25 3.00 5.00 4.50 4.25 3.75 75 100 125 en = 5v en = 0v, all non-disable devices v s = 5v lt1395cs6 output impedance (disabled) vs frequency lt1395cs6 enable pin current vs temperature ambient temperature ( c) ?0 ?0 ?0 ?0 25 75 1395/6/7 g17 ?0 ?0 ?5 0 50 100 125 ?0 ?0 ?0 enable pin current ( a) v s = 5v en = 0v en = 5v
7 lt1395/lt1396/lt1397 input bias currents vs temperature propagation delay rise time and overshoot input (100mv/div) output (200mv/div) t pd = 2.5ns time (500ps/div) a v = +2 r l = 100 w r f = r g = 255 w v out (200mv/div) os = 10% t r = 1.3ns time (500ps/div) a v = +2 r l = 100 w r f = r g = 255 w 1395/6/7 g22 1395/6/7 g23 square wave response output (200mv/div) time (10ns/div) 1395/6/7 g21 r l = 100 w r f = r g = 255 w f = 10mhz cc hara terist ics uw a t y p i ca lper f o r c e input offset voltage vs temperature pi n fu n ctio n s uuu LT1395CS5 out (pin 1): output. v C (pin 2): negative supply voltage, usually C5v. +in (pin 3): noninverting input. Cin (pin 4): inverting input. v + (pin 5): positive supply voltage, usually 5v. lt1395cs6 out (pin 1): output. v C (pin 2): negative supply voltage, usually C5v. +in (pin 3): noninverting input. Cin (pin 4): inverting input. en (pin 5): enable pin. logic low to enable. v + (pin 6): positive supply voltage, usually 5v. ambient temperature ( c) ?0 input offset voltage (mv) 2.5 25 1395/6/7 g19 1.0 0 ?5 0 50 0.5 1.0 3.0 2.0 1.5 0.5 75 100 125 v s = 5v ambient temperature ( c) ?0 6 9 i b + i b 15 25 75 1395/6/7 g20 3 0 ?5 0 50 100 125 12 input bias current ( a) v s = 5v
8 lt1395/lt1396/lt1397 pi n fu n ctio n s uuu lt1395cs8 nc (pin 1): no connection. C in (pin 2): inverting input. + in (pin 3): noninverting input. v C (pin 4): negative supply voltage, usually C 5v. nc (pin 5): no connection. out (pin 6): output. v + (pin 7): positive supply voltage, usually 5v. nc (pin 8): no connection. lt1396cms8, lt1396cs8 out a (pin 1): a channel output. C in a (pin 2): inverting input of a channel amplifier. + in a (pin 3): noninverting input of a channel amplifier. v C (pin 4): negative supply voltage, usually C 5v. + in b (pin 5): noninverting input of b channel amplifier. C in b (pin 6): inverting input of b channel amplifier. out b (pin 7): b channel output. v + (pin 8): positive supply voltage, usually 5v. lt1397cs out a (pin 1): a channel output. C in a (pin 2): inverting input of a channel amplifier. + in a (pin 3): noninverting input of a channel amplifier. v + (pin 4): positive supply voltage, usually 5v. + in b (pin 5): noninverting input of b channel amplifier. C in b (pin 6): inverting input of b channel amplifier. out b (pin 7): b channel output. out c (pin 8): c channel output. C in c (pin 9): inverting input of c channel amplifier. + in c (pin 10): noninverting input of c channel amplifier. v C (pin 11): negative supply voltage, usually C 5v. + in d (pin 12): noninverting input of d channel amplifier. C in d (pin 13): inverting input of d channel amplifier. out d (pin 14): d channel output. lt1397cgn out a (pin 1): a channel output. C in a (pin 2): inverting input of a channel amplifier. + in a (pin 3): noninverting input of a channel amplifier. v + (pin 4): positive supply voltage, usually 5v. + in b (pin 5): noninverting input of b channel amplifier. C in b (pin 6): inverting input of b channel amplifier. out b (pin 7): b channel output. nc (pin 8): no connection. nc (pin 9): no connection. out c (pin 10): c channel output. C in c (pin 11): inverting input of c channel amplifier. + in c (pin 12): noninverting input of c channel amplifier. v C (pin 13): negative supply voltage, usually C 5v. + in d (pin 14): noninverting input of d channel amplifier. C in d (pin 15): inverting input of d channel amplifier. out d (pin 16): d channel output. u s a o pp l ic at i wu u i for atio feedback resistor selection the small-signal bandwidth of the lt1395/lt1396/lt1397 is set by the external feedback resistors and the internal junction capacitors. as a result, the bandwidth is a func- tion of the supply voltage, the value of the feedback resistor, the closed-loop gain and the load resistor. the lt1395/lt1396/lt1397 have been optimized for 5v supply operation and have a C 3db bandwidth of 400mhz at a gain of 1 and 350mhz at a gain of 2. please refer to the resistor selection guide in the typical ac performance table.
9 lt1395/lt1396/lt1397 capacitance on the inverting input current feedback amplifiers require resistive feedback from the output to the inverting input for stable operation. take care to minimize the stray capacitance between the output and the inverting input. capacitance on the invert- ing input to ground will cause peaking in the frequency response (and overshoot in the transient response). capacitive loads the lt1395/lt1396/lt1397 can drive many capacitive loads directly when the proper value of feedback resistor is used. the required value for the feedback resistor will increase as load capacitance increases and as closed-loop gain decreases. alternatively, a small resistor (5 w to 35 w ) can be put in series with the output to isolate the capacitive load from the amplifier output. this has the advantage that the amplifier bandwidth is only reduced when the capaci- tive load is present. the disadvantage is that the gain is a function of the load resistance. see the typical perfor- mance characteristics curves. power supplies the lt1395/lt1396/lt1397 will operate from single or split supplies from 2v (4v total) to 6v (12v total). it is not necessary to use equal value split supplies, how- ever the offset voltage and inverting input bias current will change. the offset voltage changes about 2.5mv per volt of supply mismatch. the inverting bias current will typically change about 10 m a per volt of supply mismatch. slew rate unlike a traditional voltage feedback op amp, the slew rate of a current feedback amplifier is not independent of the amplifier gain configuration. in a current feedback ampli- fier, both the input stage and the output stage have slew rate limitations. in the inverting mode, and for gains of 2 or more in the noninverting mode, the signal amplitude between the input pins is small and the overall slew rate is that of the output stage. for gains less than 2 in the noninverting mode, the overall slew rate is limited by the input stage. the input slew rate of the lt1395/lt1396/lt1397 is approximately 600v/ m s and is set by internal currents and capacitances. the output slew rate is set by the value of u s a o pp l ic at i wu u i for atio the feedback resistor and internal capacitance. at a gain of 2 with 255 w feedback and gain resistors and 5v supplies, the output slew rate is typically 800v/ m s. larger feedback resistors will reduce the slew rate as will lower supply voltages. enable/ disable the lt1395cs6 has a unique high impedance, zero supply current mode which is controlled by the en pin. the lt1395cs6 is designed to operate with cmos logic; it draws virtually zero current when the en pin is high. to activate the amplifier, its en pin is normally pulled to a logic low. however, supply current will vary as the voltage between the v + supply and en is varied. as seen in figure 1, +i s does vary with (v + C v en ), particularly when the voltage difference is less than 3v. for normal operation, it is important to keep the en pin at least 3v below the v + supply. if a v + of less than 3v is desired, and the amplifier will remain enabled at all times, then the en pin should be tied to the v C supply. the enable pin current is approxi- mately 30 m a when activated. if using cmos open-drain logic, an external 1k pull-up resistor is recommended to ensure that the lt1395cs6 remains disabled in spite of any cmos drain leakage currents. the enable/disable times are very fast when driven from standard 5v cmos logic. the lt1395cs6 enables in about 30ns (50% point to 50% point) while operating on 5v supplies (figure 2). likewise, the disable time is approximately 40ns (50% point to 50% point) (figure 3). figure 1. + i s vs (v + C v en ) v + ?v en (v) 0 0 +i s (ma) 0.5 1.5 2.0 2.5 5.0 3.5 2 4 5 1395/6/7 f01 1.0 4.0 4.5 3.0 1 3 6 7 t a = 25 c v + = 5v v = 5v v = 0v
10 lt1395/lt1396/lt1397 differential input signal swing to avoid any breakdown condition on the input transis- tors, the differential input swing must be limited to 5v. in normal operation, the differential voltage between the input pins is small, so the 5v limit is not an issue. buffered rgb to color-difference matrix an lt1397 can be used to create buffered color-differ- ence signals from rgb inputs (figure 4). in this applica- tion, the r input arrives via 75 w coax. it is routed to the noninverting input of lt1397 amplifier a1 and to a 845 w resistor r8. there is also an 82.5 w termination resistor r11, which yields a 75 w input impedance at the r input when considered in parallel with r8. r8 connects to the inverting input of a second lt1397 amplifier (a2), which also sums the weighted g and b inputs to create a C0.5 ? y output. lt1397 amplifier a3 then takes the C0.5 ? y output and amplifies it by a gain of C2, resulting figure 2. amplifier enable time, a v = 2 v s = 5v v in = 1v r f = 255 w r g = 255 w r l = 100 w 1395/6/7 f02 output en figure 3. amplifier disable time, a v = 2 v s = 5v v in = 1v r f = 255 w r g = 255 w r l = 100 w 1395/6/7 f03 output en u s a o pp l ic at i wu u i for atio in the y output. amplifier a1 is configured in a noninvert- ing gain of 2 with the bottom of the gain resistor r2 tied to the y output. the output of amplifier a1 thus results in the color-difference output r-y. the b input is similar to the r input. it arrives via 75 w coax, and is routed to the noninverting input of lt1397 amplifier a4, and to a 2320 w resistor r10. there is also a 76.8 w termination resistor r13, which yields a 75 w input impedance when considered in parallel with r10. r10 also connects to the inverting input of amplifier a2, adding the b contribution to the y signal as discussed above. amplifier a4 is configured in a noninverting gain of 2 configuration with the bottom of the gain resistor r4 tied to the y output. the output of amplifier a4 thus results in the color-difference output b-y. the g input also arrives via 75 w coax and adds its contribution to the y signal via a 432 w resistor r9, which is tied to the inverting input of amplifier a2. there is also a 90.9 w termination resistor r12, which yields a 75 w termination when considered in parallel with r9. using superposition, it is straightforward to determine the output of amplifier a2. although inverted, it sums the r, g and b signals in the standard proportions of 0.3r, 0.59g and 0.11b that are used to create the y signal. amplifier a3 then inverts and amplifies the signal by 2, resulting in the y output. figure 4. buffered rgb to color-difference matrix + a2 1/4 lt1397 + a3 1/4 lt1397 + a1 1/4 lt1397 r7 255 r6 127 r5 255 r10 2320 r9 432 r11 82.5 r g b r12 90.9 r13 76.8 all resistors 1% v s = 5v r8 845 75 sources r1 255 r2 255 r4 255 r3 255 b-y y r-y 1395/6/7 f04 + a4 1/4 lt1397
11 lt1395/lt1396/lt1397 u s a o pp l ic at i wu u i for atio buffered color-difference to rgb matrix an lt1395 combined with an lt1396 can be used to create buffered rgb outputs from color-difference sig- nals (figure 5). the r output is a back-terminated 75 w signal created using resistor r5 and amplifier a1 config- ured for a gain of +2 via 255 w resistors r3 and r4. the noninverting input of amplifier a1 is connected via 1k resistors r1 and r2 to the y and r-y inputs respectively, resulting in cancellation of the y signal at the amplifier input. the remaining r signal is then amplified by a1. the b output is also a back-terminated 75 w signal created using resistor r16 and amplifier a3 configured for a gain of +2 via 255 w resistors r14 and r15. the noninverting input of amplifier a3 is connected via 1k resistors r12 and r13 to the y and b-y inputs respec- tively, resulting in cancellation of the y signal at the amplifier input. the remaining b signal is then amplified by a3. the g output is the most complicated of the three. it is a weighted sum of the y, r-y and b-y inputs. the y input is attenuated via resistors r6 and r7 such that amplifier a2s noninverting input sees 0.83y. using superposition, we can calculate the positive gain of a2 by assuming that r8 and r9 are grounded. this results in a gain of 2.41 and a contribution at the output of a2 of 2y. the r-y input is amplified by a2 with the gain set by resistors r8 and r10, giving an amplification of C1.02. this results in a contri- bution at the output of a2 of 1.02y C 1.02r. the b-y input is amplified by a2 with the gain set by resistors r9 and r10, giving an amplification of C 0.37. this results in a contribution at the output of a2 of 0.37y C 0.37b. if we now sum the three contributions at the output of a2, we get: a2 out = 3.40y C 1.02r C 0.37b it is important to remember though that y is a weighted sum of r, g and b such that: y = 0.3r + 0.59g + 0.11b if we substitute for y at the output of a2 we then get: a2 out = (1.02r C 1.02r) + 2g + (0.37b C 0.37b) = 2g the back-termination resistor r11 then halves the output of a2 resulting in the g output. figure 5. buffered color-difference to rgb matrix + a2 lt1395 r7 1k b-y r-y y r10 267 r11 75 r6 205 r2 1k r1 1k r8 261 r9 698 + a3 1/2 lt1396 r14 267 b g r16 75 r12 1k r13 1k r15 267 all resistors 1% v s = 5v + a1 1/2 lt1396 r3 267 r r5 75 r4 267 1395/6/7 f05
12 lt1395/lt1396/lt1397 si plified sche atic ww , each amplifier gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) gn16 (ssop) 1098 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 12 3 4 5 6 7 8 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.189 ?0.196* (4.801 ?4.978) 12 11 10 9 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.0250 (0.635) bsc 0.009 (0.229) ref package descriptio u dimensions in inches (millimeters) unless otherwise noted. +in en (lt1395cs6 only) ?n out v + v 1395/6/7 ss for all non-disable devices
13 lt1395/lt1396/lt1397 package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.95 (0.037) ref 1.50 ?1.75 (0.059 ?0.069) 0.35 ?0.55 (0.014 ?0.022) 0.35 ?0.50 (0.014 ?0.020) five places (note 2) s5 sot-23 0599 2.80 ?3.00 (0.110 ?0.118) (note 3) 1.90 (0.074) ref 0.90 ?1.45 (0.035 ?0.057) 0.90 ?1.30 (0.035 ?0.051) 0.00 ?0.15 (0.00 ?0.006) 0.09 ?0.20 (0.004 ?0.008) (note 2) 2.60 ?3.00 (0.102 ?0.118) note: 1. dimensions are in millimeters 2. dimensions are inclusive of plating 3. dimensions are exclusive of mold flash and metal burr 4. mold flash shall not exceed 0.254mm 5. package eiaj reference is sc-74a (eiaj) ms8 package 8-lead plastic msop (ltc dwg # 05-08-1660) s5 package 5-lead plastic sot-23 (ltc dwg # 05-08-1633) msop (ms8) 1098 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 ?6 typ seating plane 0.007 (0.18) 0.040 0.006 (1.02 0.15) 0.012 (0.30) ref 0.006 0.004 (0.15 0.102) 0.034 0.004 (0.86 0.102) 0.0256 (0.65) bsc 12 3 4 0.193 0.006 (4.90 0.15) 8 7 6 5 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102)
14 lt1395/lt1396/lt1397 s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** 0.95 (0.037) ref 1.50 ?1.75 (0.059 ?0.069) 0.35 ?0.55 (0.014 ?0.022) 0.35 ?0.50 (0.014 ?0.020) six places (note 2) s6 sot-23 0898 2.80 ?3.00 (0.110 ?0.118) (note 3) 1.90 (0.074) ref 0.90 ?1.45 (0.035 ?0.057) 0.90 ?1.30 (0.035 ?0.051) 0.00 ?0.15 (0.00 ?0.006) 0.09 ?0.20 (0.004 ?0.008) (note 2) 2.6 ?3.0 (0.110 ?0.118) note: 1. dimensions are in millimeters 2. dimensions are inclusive of plating 3. dimensions are exclusive of mold flash and metal burr 4. mold flash shall not exceed 0.254mm 5. package eiaj reference is sc-74a (eiaj) s6 package 6-lead plastic sot-23 (ltc dwg # 05-08-1634)
15 lt1395/lt1396/lt1397 package descriptio u dimensions in inches (millimeters) unless otherwise noted. s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
16 lt1395/lt1396/lt1397 ? linear technology corporation 1999 139567fa lt/lcg 0900 2k rev a ? printed in usa u a o pp l ic at i ty p i ca l linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com part number description comments lt1227/lt1229/lt1230 140mhz single/dual/quad current feedback amplifier 1100v/ m s slew rate, single adds shutdown pin lt1252/lt1253/lt1254 low cost video amplifiers single, dual and quad 100mhz current feedback amplifiers lt1398/lt1399 dual/triple current feedback amplifiers 300mhz bandwidth, 0.1db flatness > 150mhz with shutdown lt1675 triple 2:1 buffered video mulitplexer 2.5ns switching time, 250mhz bandwidth lt1363/lt1364/lt1365 70mhz single/dual/quad op amps 1000v/ m s slew rate, voltage feedback related parts figure 6. single supply rgb video amplifier (1 of 4 channels) + a1 lt1395 d1 1n4148 c1 4.7 f d2 1n4148 r9 75 r8 255 v s 6v to 12v r7 255 r5 2.32 r4 75 v in r2 1300 r1 1000 5v r6 84.5 r3 160 v out 1395/6/7 ta03 single supply rgb video amplifier the lt1395 can be used with a single supply voltage of 6v or more to drive ground-referenced rgb video. in figure 6, two 1n4148 diodes d1 and d2 have been placed in series with the output of the lt1395 amplifier a1 but within the feedback loop formed by resistor r8. these diodes effectively level-shift a1s output downward by 2 diodes, allowing the circuit output to swing to ground. amplifier a1 is used in a positive gain configuration. the feedback resistor r8 is 255 w . the gain resistor is cre- ated from the parallel combination of r6 and r7, giving a thevenin equivalent 63.5 w connected to 3.75v. this gives an ac gain of + 5 from the noninverting input of amplifier a1 to the cathode of d2. however, the video input is also attenuated before arriving at a1s positive input. assuming a 75 w source impedance for the signal driving v in , the thevenin equivalent signal arriving at a1s positive input is 3v + 0.4v in , with a source imped- ance of 714 w . the combination of these two inputs gives an output at the cathode of d2 of 2 ? v in with no additional dc offset. the 75 w back termination resistor r9 halves the signal again such that v out equals a buffered version of v in . it is important to note that the 4.7 m f capacitor c1 has been added to provide enough current to maintain the voltage drop across diodes d1 and d2 when the circuit output drops low enough that the diodes might otherwise turn off. this means that this circuit works fine for continuous video input, but will require that c1 charge up after a period of inactivity at the input.

▲Up To Search▲

Price & Availability of LT1395CS5

	To Download LT1395CS5 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .