1 ps8505 11/13/00 product pin configuration functional table logic block diagram 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2510-133E low-noise, phase-locked loop clock driver with 10 clock outputs product description the PI6C2510-133E is a enhanced, low-skew, low-jitter, phase- locked loop (pll) clock driver, distributing high-frequency clock signals for sdram and server applications. by connecting the feedback fb_out output to the feedback fb_in input, the propa- gation delay from the clk_in input to any clock output will be nearly zero. this zero-delay feature allows the clk_in input clock to be distributed, providing one clock input to one bank of ten outputs, with an output enable. this clock driver is designed to meet the pc133 sdram registered dimm specification. for test purposes, the pll can be bypassed by strapping av cc to ground. product features operating frequency up to 150 mhz low-noise phase-locked loop clock distribution that meets 133 mhz registered dimm synchronous dram modules for server/workstation/pc applications allows clock input to have spread spectrum modulation for emi reduction zero input-to-output delay: distribute one clock input to one bank of ten outputs, with an output enable. low jitter: cycle-to-cycle jitter 75ps max. on-chip series damping resistor at clock output drivers for low noise and emi reduction operates at 3.3v v cc package: plastic 24-pin tssop (l) s t u p n is t u p t u o g] 9 : 0 [ yt u o _ b f ll n i _ k l c hn i _ k l cn i _ k l c g 10 clk_in fb_in pll avcc fb_out y[0:9] clk_in av cc v cc y9 y8 gnd gnd y7 y6 y5 v cc fb_in agnd v cc y0 y1 y2 gnd gnd y3 y4 v cc g fb_out 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 24-pin l
PI6C2510-133E low-noise, phase-locked loop clock driver with 10 clock outputs 2 ps8505 11/13/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 e m a n n i pr e b m u n n i pe p y tn o i t p i r c s e d n i _ k l c4 2i . m u r t c e p s d a e r p s s w o l l a n i _ k l c . t u p n i k c o l c e c n e r e f e r n i _ b f3 1i l l p l a n r e t n i e h t o t l a n g i s k c a b d e e f e h t s e d i v o r p n i _ b f . t u p n i k c a b d e e f g1 1i o t d e l b a s i d e r a ] 9 : 0 [ y s t u p t u o , w o l s i g n e h w . e l b a n e k n a b t u p t u o . d e l b a n e e r a ] 9 : 0 [ y s t u p t u o l l a , h g i h s i g n e h w . e t a t s w o l c i g o l a t u o _ b f2 1o . k c a b d e e f l a n r e t x e r o f d e t a c i d e d s i t u o _ b f . t u p t u o k c a b d e e f e m a s e h t f o r o t s i s e r g n i p m a d - s e i r e s d e d d e b m e n a s a h t u o _ b f . ] 9 : 0 [ y s t u p t u o k c o l c e h t s a e u l a v ] 9 : 0 [ y 5 1 , 9 , 8 , 5 , 4 , 3 1 2 , 0 2 , 7 1 , 6 1 o f o s e i p o c w e k s - w o l e d i v o r p s t u p t u o e s e h t . s t u p t u o k c o l c n i _ k l c . . r o t s i s e r g n i p m a d - s e i r e s d e d d e b m e n a s a h t u p t u o h c a e v a c c 3 2r e w o p v a . y l p p u s r e w o p g o l a n a c c r o f l l p e h t s s a p y b o t d e s u o s l a e b n a c v a n e h w . s e s o p r u p t s e t c c d n a d e s s a p y b s i l l p , d n u o r g o t d e p p a r t s s i n i _ k l c. s t u p t u o e c i v e d e h t o t y l t c e r i d d e r e f f u b d n g a1 d n u o r g . y r t i u c r i c g o l a n a e h t r o f e c n e r e f e r d n u o r g e h t s e d i v o r p d n g a . d n u o r g g o l a n a v c c 2 2 , 4 1 , 0 1 , 2r e w o py l p p u s r e w o p d n g9 1 , 8 1 , 7 , 6d n u o r gd n u o r g pin functions
PI6C2510-133E low-noise, phase-locked loop clock driver with 10 clock outputs 3 ps8505 11/13/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 l o b m y sr e t e m a r a p. n i m. x a ms t i n u v i e g n a r e g a t l o v t u p n i 5 . 0 - v c c 5 . 0 + v v o e g n a r e g a t l o v t u p t u o v _ i c de g a t l o v t u p n i c d0 . 5 + i _ o c dt n e r r u c t u p t u o c d0 0 1a m r e w o pt t a n o i t a p i s s i d r e w o p m u m i x a m a 5 5 = o r i a l l i t s n i c0 . 1w t g t s e r u t a r e p m e t e g a r o t s5 6 -0 5 1 o c dc specifications r e t e m a r a ps n o i t i d n o c t s e tv c c . n i m. p y t. x a ms t i n u i c c v i v = c c i ; d n g r o o 0 =v 6 . 30 1 m a c i v i v = c c d n g r o v 3 . 3 4 f p c o v o v = c c d n g r o6 absolute maximum ratings over operating free-air temperature range. note: stress beyond those listed under absolute maximum ratings may cause permanent damage to the device. recommended operating conditions l o b m y sr e t e m a r a p. n i m. x a ms t i n u v c c e g a t l o v y l p p u s0 . 36 . 3 v v h i e g a t l o v t u p n i l e v e l h g i h0 . 2 v l i e g a t l o v t u p n i l e v e l w o l8 . 0 v i e g a t l o v t u p n i0 . 0v c c t a e r u t a r e p m e t r i a - e e r f g n i t a r e p o00 7 o c l o b m y sr e t e m a r a pn o i t i d n o c. n i m. x a ms t i n u i h o t n e r r u c p u - l l u pv t u o v 4 . 2 =6 . 3 1 - a m t n e r r u c p u - l l u pv t u o v 0 . 2 =2 2 - i l o t n e r r u c n w o d - l l u pv t u o v 8 . 0 =9 1 t n e r r u c n w o d - l l u pv t u o v 5 5 . 0 =3 1 electrical characteristics over recommended operating free-air temperature range pull up/down currents of PI6C2510-133E, v cc = 3.0v
PI6C2510-133E low-noise, phase-locked loop clock driver with 10 clock outputs 4 ps8505 11/13/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ac specifications l o b m y sr e t e m a r a p. n i m. x a ms t i n u f k l c y c n e u q e r f k c o l c t u p n i5 20 5 1z h m e l c y c y t u d k c o l c t u p n i0 40 6% p u r e w o p r e t f a e m i t n o i t a z i l i b a t s1s m timing requirements over recommended ranges of supply voltage and operating free-air temperature. switching characteristics over recommended ranges of supply voltage and operating free-air temperature, cl=30pf note: these switching parameters are guaranteed, but not production tested. r e t e m a r a pm o r fo t v c c c 0 7 - 0 , v 3 . 0 v 3 . 3 = s t i n u . n i m. p y t. x a m t u o h t i w d n a h t i w , r o r r e e s a h p t m u r t c e p s d a e r p s n i _ k l c - z h m 3 3 1 t an i _ b f - 0 5 1 C0 5 1 + s p , e l c y c - o t - e l c y c , r e t t i j d a e r p s t u o h t i w d n a h t i w m u r t c e p s t u o _ b f r o t u p t u o y n a k l c n i n z h m 3 3 1 t a r o t u p t u o n i t u o _ b f k l c 1 + n 5 7 C5 7 + z h m 3 3 1 t a , w e k sr o y y n at u o _ b f r o y y n a t u o _ b f 0 5 1 e l c y c y t u d 5 40 55 5% v 0 . 2 o t v 4 . 0 , e m i t - e s i r , r t 0 . 1 s n v 4 . 0 o t v 0 . 2 , e m i t - l l a f , f t 1 . 1
PI6C2510-133E low-noise, phase-locked loop clock driver with 10 clock outputs 5 ps8505 11/13/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com package mechanical information plastic 24-pin thin shrink small-outline package (l package) .303 .311 .047 1.20 .002 .006 seating plane .0256 bsc .018 .030 .004 .008 .252 bsc 1 24 .169 .177 x.xx x.xx denotes controlling dimensions in millimeters 0.05 0.15 6.4 0.45 0.75 0.09 0.20 4.3 4.5 7.7 7.9 0.65 0.19 0.30 .007 .012 max ordering information r e b m u n t r a pe g n a r . q e r f g n i t a r e p on / p g n i r e d r o e 3 3 1 - 0 1 5 2 c 6 i pz h m 0 5 1 - z h m 5 2l e 3 3 1 - 0 1 5 2 c 6 i p
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