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? 2009 semtech corporation power management 1 sc824 single-cell li-ion charger tri-mode with timer and ntc features single input 30v protected charger adapter, usb high, usb low modes charging by current regulation, voltage regulation, and thermal limiting programmable currents from 70ma to 1a fast-charge current regulation 15% at 70ma, 9% at 700ma constant voltage 4.2v, 1% regulation input voltage protection 30v current-limited adapter support capability reduces power dissipation in charger ic usb modes automatically reduce charge current if needed to prevent usb vbus overload instantaneous cc-to-cv transition for faster charging battery temperature ntc thermistor interface multi-stage charge timer for safety and alternative termination, ieee std. 1725-2006 compliant termination on current or timer rst to occur soft-start reduces adapter or usb load transients high operating voltage range permits use of unregulated adapters complies with ccsa yd/t 1591-2006 high-current usb dedicated charger compatible ultra-thin 220.6 (mm) mlpd package lead-free and halogen-free weee and rohs compliant applications mobile phones personal media players personal navigation devices ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the sc824 is a single input triple mode (adapter/usb high, usb low) linear single-cell li-ion battery charger in a 10 lead 22 (mm) mlpd ultra-thin package. charging begins automatically when an input source is applied to the charging input. the input is designed to survive sustained input voltage up to 30v to protect against hot plug overshoot and faulty charging adapters. thermal limiting protects the sc824 from excessive power dissipation. the sc824 provides three modes of charging: adapter mode, usb low power mode, and usb high power mode. adapter mode charges up to 1a with the charging adapter operating either in voltage regulation or in current limit to obtain the lowest possible power dissipation. a single current programming pin is used to program precharge current, termination current, and fast-charge current in xed proportions. the usb modes provide low and high power fast-charge currents. the two usb modes dynami- cally limit the charging load if necessary to automatically prevent overloading the usb vbus supply. the sc824 provides a battery ntc thermistor interface to disable charging when the battery temperature exceeds programmed thresholds. an optional programmable multi-stage charge timer protects against a faulty battery, or terminates charging on timeout if the system load is too great to terminate charging on current. a 45 minute top-off period following termination ensures a fully charged battery. the monitor state restarts a charge cycle if the battery discharges after the charger has turned o . device load battery pack 2.2 f v adapter 2.2 f r iprgm vin stat0 iprgm mode gnd vsys en_ntc bat sc824 mode select cpu gpio rtime stat1 1 f r ntc thermistor r npu typical application circuit october 30, 2009
sc824 2 pin con guration marking information ordering information device package SC824ULTRT (1)(2) mlpd-ut-10 22 sc824evb evaluation board notes: (1) available in tape and reel only. a reel contains 3,000 devices. (2) lead-free packaging only. device is weee and rohs compliant, and halogen-free. top view t 1 2 47 8 3 9 10 en_ntc iprgm stat0 vin rtime gnd stat1 vsys 56 mode bat 824 yw mlpd-ut10; 22, 10 lead ja = 68c/w yw = date code
sc824 3 exceeding the above speci cations may result in permanent damage to the devic e or device malfunction. operation outside of the parameters speci ed in the electrical characteristics section is not recommended. notes: (1) tested according to jedec standard jesd22-a114. (2) operating voltage is the input voltage at which the charger is guaran teed to begin operation. these ranges apply to chargi ng sources operating in voltage regulation. charging sources operating in current limit may be pulled below these ranges by the charging load. maximum operating voltage is the maximum vsupply as defined in eia/jedec standard no. 78, paragraph 2.11. (3) calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer fr4 pcb with thermal vias under the exposed pad per jesd51 standards. absolute maximum ratings vin, stat0, stat1 (v) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +30.0 vsys, bat (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5 mode (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (bat + 0.3) en_ntc, rtime, iprgm (v) . . . . . . . . . . . . . -0.3 to (vsys + 0.3) vin input current (a) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 bat, iprgm short to gnd duration . . . . . . . . . . con tinuous esd protection level (1) (kv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 recommended operating conditions operating ambient tempera ture (c) . . . . . . . . . -40 to +85 vin adapter mode operating voltage (2) (v) . . . 4.36 to 8.20 vin usb modes operating voltage (2) (v) . . . . . . 4.70 to 8.20 thermal information thermal resistance, junction to ambient (3) (c/w) . . . . . 68 maximum junction temperature (c) . . . . . . . . . . . . . . +150 storage temperature range (c) . . . . . . . . . . . . -65 to +150 peak ir reflow temperature (c) . . . . . . . . . . . . . . . . . . . +260 test conditions: v vin = 5.00v (1) , v bat = 3.70v unless speci ed; typ values at 25c; min and max at -40c < t a < 85c, unless speci ed. parameter symbol conditions min typ max units vin under-voltage lockout rising threshold vt uvlo-r 4.16 4.26 4.36 v vin under-voltage lockout falling threshold (2) vt uvlo-f v vin >v bat 2.70 2.85 3.00 v vin ovp rising threshold vt ovp-r 9.3 9.6 v vin ovp falling threshold vt ovp-f 8.2 8.5 v vin ovp hysteresis vt ovp-h vt ovp-r - vt ovp-f 500 800 mv vin charging disabled operating current icc vin_dis v en_ntc = 0v, v rtime = 0v 0.8 1.5 ma vin charging enabled operating current icc vin_en v en_ntc = 2.3v, v rtime = 0v, i bat = 1ma; excluding i bat and i iprgm 1.8 2.5 ma regulation voltage v cv i bat = 50ma, -40c t j 125c 4.16 4.20 4.24 v voltage load regulation v cv_load 1ma i bat 1a, -40c t j 125c -20 mv/a bat re-charge threshold vt req v cv - v bat 60 100 140 mv bat pre-charge threshold (rising) vt preq 2.85 2.90 2.95 v electrical characteristics
sc824 4 parameter symbol conditions min typ max units battery leakage current lbat v0 v bat = v cv , v vin = 0v, v en_ntc = 0v 0.1 1 a lbat dis v bat = v cv , v vin = 5v, v en_ntc = 0v 0.1 1 a lbat mon v bat = v cv , v en_ntc = 2.3v, v rtime = 0v and charging terminated 0.1 1 a iprgm programming resistor r iprgm 2.05 29.4 k i bat fast-charge current, adapter mode or usb high power mode i fq r iprgm = 2.94k, vt preq < v bat < v cv r iprgm = 4.42k, vt preq < v bat < v cv 643 427 694 462 745 497 ma usb low power mode fast-charge current i fq_low r iprgm = 2.94k, vt preq < v bat < v cv r iprgm = 4.42k, vt preq < v bat < v cv 105 69 139 92 173 116 ma i bat pre-charge current i preq r iprgm = 2.94k, 1.8v < v bat < vt preq r iprgm = 4.42k, 1.8v < v bat < vt preq 105 69 139 92 173 116 ma i bat termination current i term r iprgm = 2.94k, v bat = v cv r iprgm = 4.42k, v bat = v cv 59 38 69 46 80 55 ma vin - bat dropout voltage v do i bat = 700ma, 0c t j 125c 0.4 0.6 v iprgm fast-charge regulated voltage v iprgm_fq v vin = 5.0v, vt preq < v bat < v cv 2.04 v iprgm pre-charge regulated voltage v iprgm_pq v bat < vt preq 0.408 v iprgm termination threshold voltage vt iprgm_term v bat = v cv 0.204 v vin usb modes under-voltage load regulation limiting voltage v uvlr 5ma vin supply current limit 500ma, v mode = 2v, r iprgm = 2.94k (694ma) 4.40 4.51 4.70 v thermal limiting threshold temperature t tl 130 c thermal limit rate i t t j > t tl -50 ma/ c vsys output voltage v vsys v vin 5v, i vsys 1ma 4.6 v vsys output current i vsys 1ma en_ntc thresholds rt ntc_dis charger disable/reset (falling) 9 10 11.5 %v vsys rt ntc_hf ntc hot (falling) 29 30 31 %v vsys rt ntc_cr ntc cold (rising) 74 75 76 %v vsys rt ntc_nbr no-battery mode select (rising) 94 95 96 %v vsys en_ntc hysteresis vt ntc_hys v vin = 5v 45 mv en_ntc disable/reset hold time (3) t ntc_dis_h momentary disable resets charger 500 ns electrical characteristics (continued)
sc824 5 electrical characteristics (continued) parameter symbol conditions min typ max units rtime programming resistor r rtime 19.6 200 k rtime regulated voltage v rtime r rtime = 130k to gnd 1.1 v precharge fault time-out t preqf internal timer only 38 45 52 mins constant current (cc) fault time-out t ccf r rtime = 130k to gnd 8.5 10 11.5 hrs r rtime connected to vsys (int. timer) 2.55 3 3.45 hrs constant voltage (cv) time-out t cv internal timer only 2.55 3 3.45 hrs top-o time-out t to internal timer only 38 45 52 mins charge-done status delay t sd internal timer only 17 20 23 s mode input high voltage threshold v ih 1.6 v mode input mid voltage range v im 0.65 1.3 v mode input low voltage threshold v il 0.3 v mode input high-range input current i ih v mode = min v ih 23 75 a mode input mid-range load limit i im input will float to mid range when this load limit is observed. -5 5 a mode input low-range input current i il 0v v mode max v il -25 -12 a mode input monitor state input cur- rent i mode_mon v mode = v bat = v cv , v en_ntc = 2.3v, v rtime = 0v and charging terminated 1a mode input leakage i ileak v vin = 5v and v en_ntc = 0v, or v vin = 0v, v mode = v cv 1a stat0, stat1 output low voltage v stat_lo i statx_sink = 1ma 0.5 v stat0, stat1 output high current i stat_hi v statx = 5v 1 a notes: (1) electrical characteristics apply for v vin = 4.75v to 5.25v, but are tested only at v vin = 5.00v, unless noted. (2) sustained operation to vt uvlo-f v vin is guaranteed only if a current limited charging source applied to vin is pulled below vt uvlo-r by the charging load in adapter mode; forced vin voltage below vt uvlo-r may in some cases result in regulation errors or other unexpected behavior. (3) not tested. guaranteed by design.
sc824 6 typical characteristics cv line regulation cv load regulation cv temperature regulation cc ad or usb high fq line regulation cc ad or usb high fq v bat regulation cc ad or usb high fq temperature regulation 55.566.577.58 4.192 4.196 4.2 4.204 4.208 v vin (v) v bat (v) t a = 25 c, i bat = 50ma 0 100 200 300 400 500 600 700 800 900 1000 4.16 4.17 4.18 4.19 4.2 4.21 4.22 4.23 4.24 i bat (ma) v bat (v) t a = 25 c, v vin = 5v -40 -20 0 20 40 60 80 100 120 4.192 4.196 4.2 4.204 4.208 ambient temperature ( o c) v bat (v) v vin = 5v, i bat = 50ma 4.555.566.577.58 440 480 520 560 600 640 680 720 r iprgm = 2.94k r iprgm = 4.42k v vin (v) i bat (ma) t a = 25 c, v bat = 3.7v 2.9 3.1 3.3 3.5 3.7 3.9 4.1 440 480 520 560 600 640 680 720 v bat (v) i bat (ma) t a = 25 c, v vin = 5v r iprgm = 2.94k r iprgm = 4.42k -40 -20 0 20 40 60 80 100 120 440 480 520 560 600 640 680 720 ambient temperature ( o c) i bat (ma) v vin = 5v, v bat = 3.7v r iprgm = 2.94k r iprgm = 4.42k
sc824 7 typical characteristics (continued) cc usb low power fq line regulation cc usb low power fq v bat regulation cc usb low power fq temperature regulation cc pq line regulation cc pq temperature regulation 4.555.566.577.58 80 90 100 110 120 130 140 150 r iprgm = 2.94k r iprgm = 4.42k v vin (v) i bat (ma) t a = 25 c, v bat = 3.7v 2.9 3.1 3.3 3.5 3.7 3.9 4.1 80 90 100 110 120 130 140 150 v bat (v) i bat (ma) t a = 25 c, v vin = 5v r iprgm = 2.94k r iprgm = 4.42k 55.566.577.58 80 90 100 110 120 130 140 150 v vin (v) i bat (ma) t a = 25 c, v bat = 2.7v r iprgm = 2.94k r iprgm = 4.42k -40 -20 0 20 40 60 80 100 120 80 90 100 110 120 130 140 150 ambient temperature ( o c) i bat (ma) v vin = 5v, v bat = 2.7v r iprgm = 2.94k r iprgm = 4.42k -40 -20 0 20 40 60 80 100 120 80 90 100 110 120 130 140 150 ambient temperature ( o c) i bat (ma) v vin = 5v, v bat = 3.7v r iprgm = 2.94k r iprgm = 4.42k i fq vs. r iprgm , adapter or usb high power modes 2 6 10 14 18 22 26 30 0 200 400 600 800 1000 r iprgm (k ) i bat (ma) v vin = 5v, v bat = 3.7v, t a = 25 c
sc824 8 typical characteristics (continued) i pq vs. r iprgm ; i fq vs. r iprgm , usb low power mode charging cycle battery voltage and current pre-charging battery voltage and current cc-to-cv battery voltage and current usb low-power re-charge cycle 610 640 670 700 730 760 i bat (ma) 30 30.5 31 31.5 32 32.5 33 33.5 34 34.5 35 35.5 36 4.145 4.16 4.175 4.19 4.205 4.22 time (min) v bat (v) 700mahr battery, r iprgm = 2.94k , v vin = 5.0v, t a = 25 c v bat i bat 0 50 100 150 200 250 i bat (ma) 6 7 8 9 10 11 12 13 14 3.75 3.85 3.95 4.05 4.15 4.25 time (hrs) v bat (v) 700mahr battery, r iprgm = 4.42k , v vin = 5.0v, load = 10ma v bat i bat 0 100 200 300 400 500 600 700 i bat (ma) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 0 1 2 3 4 5 6 7 time (hrs) v bat , v stat1 (v) 700mahr battery, r iprgm = 2.94k , v vin = 5.0v, t a = 25 c, timer enabled v bat i bat v stat1 0 100 200 300 400 500 600 700 800 i bat (ma) 012345678 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 time (s) v bat (v) 700mahr battery, r iprgm = 2.94k , v vin = 5.0v, t a = 25 c v bat i bat 2 6 10 14 18 22 26 30 0 40 80 120 160 200 r iprgm (k ) i bat (ma) v vin = 5v, v bat = 3.7v, t a = 25 c re-charge cycle bat pin voltage and current 0 100 200 300 400 500 i bat (ma) 5678910111213 3.75 3.85 3.95 4.05 4.15 4.25 time (hrs) v bat (v) 700mahr battery, r iprgm = 2.94k , v vin = 5.0v, load = 10ma v bat i bat
sc824 9 typical characteristics (continued) mode reselection usb low to usb high mode reselection usb high to usb low mode reselection ad to usb high mode reselection usb high to ad mode reselection ad to usb low mode reselection usb low to ad 100 s/div i bat (100ma/div) v mode =0v v mode (2v/div) i bat =0ma v vin =5v, v bat =3.7v, r iprgm = 2.94k 100 s/div i bat (100ma/div)) v mode =0v v mode (2v/div) i bat =0ma v vin =5v, v bat =3.7v, r iprgm = 2.94k 100 s/div i bat (100ma/div) v mode (2v/div) v vin =5v, v bat =3.7v, r iprgm = 2.94k v mode =0v i bat =0ma 100 s/div i bat (100ma/div) v mode =0v v mode (2v/div) i bat =0ma v vin =5v, v bat =3.7v, r iprgm = 2.94k 100 s/div i bat (100ma/div) v mode (2v/div) v vin =5v, v bat =3.7v, r iprgm = 2.94k v mode =0v i bat =0ma 100 s/div i bat (100ma/div) v mode (2v/div) v vin =5v, v bat =3.7v, r iprgm = 2.94k v mode =0v i bat =0ma
sc824 10 pin descriptions pin # pin name pin function 1 vin supply pin connect to charging adapter (wall adapter or usb). this pin is protected against damage due to high voltage up to 30v. 2 vsys system reference voltage supply 4.6v reference used internally and externally by the ntc circuit. must have a 1f capacitor connected between vsys and gnd. 3 mode charging mode selection (tri-level logical) input logical high selects usb high power mode, oating selects usb low power mode, ground selects adapter mode. 4 rtime timer setting pin connect a resistor between this pin and ground to set the time-out value of the cc mode timer. connect to ground to disable the timer. tie to vsys to select the 3 hour cc timer using the internal oscilla- tor. 5 gnd ground 6stat1 status open drain output pin that is active low when charging is in progress, with or without a charging fault. when charging is complete, pin is released. see statx pin truth table. 7stat0 status open drain output pin that is pulled low when a valid charging adapter is connected and the voltage is greater than the uvlo level and less than the ovp level, and no charging fault is detected. pin is released when the input is disconnected from a power supply, or to indicate a charging fault. see statx pin truth table. 8 iprgm charging current programming pin connect a resistor from this pin to ground to program charge current. pre-charge current (also usb low power mode fast-charge current) is 20% of iprgm-programmed fast-charge current in all modes. the charging termination current threshold for all modes is 10% of the iprgm programmed fast-charge current. if this pin is grounded, pin-short detection holds the sc824 in logical reset, with charging disabled. 9bat charger output connect to battery positive terminal. 10 en_ntc battery ntc thermistor connection pin en_ntc pin input voltage ranges are ratiometric with respect to the vsys pin output voltage. the safe-to-charge battery temperature range is programmed with a resistor from the en_ntc pin to the vsys pin, and a battery pack ntc thermistor to ground; charging is suspended when the en_ntc pin voltage is less than 30%, or greater than 75%, of v vsys . when pulled down below 10% of v vsys , charging is unconditionally disabled. when the level exceeds 95% of v vsys , the battery is assumed to be disconnected and the device operates in no-battery mode. t thermal pad pad is for heatsinking purposes the thermal pad is not connected internally. connect exposed pad to ground plane using multiple vias.
sc824 11 block diagram cc cv thermal limiting stat0 iprgm gnd bat vin mode v_adapter or v_usb 1 3 5 4 7 to system load r iprgm 8 9 r sense v uv_lim = 4.5v die temperature v cv = 4.2v v iref v t_ct (usb modes only) termination vt iprgm_term tri-level control vt mode_high = ~1.50v vt mode_low = ~0.55v 1v r npu (ntc pull-up resistor) disable ntc hot fault ntc cold fault no batt en_ntc 2 vsys 1 f 10 vsys regulator lithium- ion single cell battery pack r ntc thermistor stat1 rtime vsys vsys uvlr 6 precharg, cc/cv & termination controller, logical state machine r rtime
sc824 12 charger operation the sc824 is a single input, tri-mode, stand-alone li-ion battery charger. it has a tri-state mode input pin that allows the device to be put in usb high power, usb low power, or adapter mode. fast-charge current is pro- grammed with a resistor from the iprgm pin to ground. usb high power mode is equal to adapter mode current. usb low power current is 20% of fast-charge current. when a valid input supply is detected, the stat0 output goes low. a charge cycle is initiated and the stat1 output goes low. when the battery voltage is less than the pre- charge threshold voltage, the pre-charge current is output to the battery. pre-charge current is xed at 20% of the programmed adapter mode or usb high power mode fast-charge current, and is equal to the usb low power mode fast-charge current. fast-charge constant current (cc) regulation begins when the battery voltage exceeds the pre-charge threshold. the charge current soft-starts in three steps (20%, 60%, and 100% of programmed fast charge current) to reduce adapter load transients. in usb low power mode, the cc current is held at the 20% step. the charger begins constant voltage (cv) regulation when the battery voltage rises to the fully-charged single- cell li-ion regulation voltage (v cv ), nominally 4.2v. when regulating the output voltage, the charge current gradu- ally decreases as the battery charges. the stat1 output goes high, after a 20 second delay, when the output current i bat drops below the termination current threshold. this is known as charge termination. the termination current threshold is 10% of the iprgm-programmed fast- charge current regardless of the mode selected. each step of the charge cycle is separately timed using the optional programmable charge timer. time-out of the fixed 45 minute pre-charge stage timer or the fixed or programmable cc stage timer is indicated as a fault, which is encoded in the stat0 and stat1 outputs. time-out during the cv timer stage has the same result as normal charge termination. when the timer is used, the output remains on for 45 minutes following termination to ensure that the battery is fully topped-o , then turns o . if the timer is not used, the charger turns o immediately upon reaching the termination current. optional top-o charging, and monitoring depending on the state of the rtime pin, upon termina- tion the sc824 either tops-o the battery by operating as a voltage regulator (known as float charging) for 45 minutes or it immediately turns o its output. once the output is turned o , the device enters the monitor state. in this state, the output remains off until the bat pin voltage decreases by the re-charge threshold (vt req = 100mv typically). a re-charge cycle then begins automatically and the process repeats. if the timer is enabled, then the multistage timer also protects the re- charge cycle. re-charge cycles are not indicated by the stat1 pin. a forced re-charge cycle can also be periodically com- manded by the processor to maintain the battery in a fully charged state without discharging to the re-charge threshold, and without top-o charging. see the monitor state section for details. charging input mode dependencies in adapter mode, a programmed charging current greater than the adapters current limit will pull down the vin pin voltage to the battery voltage plus charger dropout voltage. this is referred to as current-limited-adapter (cla) operation. the uvlo falling threshold is set close to the battery voltage pre-charge threshold to permit low-dissipation charging from a current limited adapter. both usb modes provide under-voltage load regulation (uvlr) in which the charging current is reduced if needed to prevent overloading of the usb vbus supply. uvlr ensures the integrity of the usb vbus supply for all devices sharing a host or hub supply. uvlr can also serve as a low-cost alternative to commanding usb low power charge current where there is no signal available to indi- cate whether usb low or high power mode should be selected. cc fast-charge current programming cc regulation is active when the battery voltage is above vt preq and less than v cv . when either adapter mode or usb high power mode is selected, the programmed cc regulation fast-charge (fq) current is inversely propor- tional to the iprgm pin resistance to gnd according to the following equation: applications information
sc824 13 applications information (continued) 1000 r v i iprgm typ _ iprgm fq u the nominal fast charge current can be programmed to any value between 70ma and 1000ma. current regulation accuracy is dominated by gain error at high current settings, and o set error at low current set- tings. the range of expected fast-charge output current versus programming resistance r iprgm is shown in figures 1a and 1b. each gure shows the nominal fast-charge current versus nominal r iprgm resistance as the center plot, and two theoretical limit plots indicating maximum and minimum current versus nominal programming resis- tance. these plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. the current range includes the uncertainty due to 1% tolerance resistors. the dots on each plot indicate the currents obtained with the electronic industries association (eia) e96 standard value 1% tolerance resistors. figures 1a and 1b show low and high resistance ranges, respectively. the usb low power mode fast-charge current accuracy is exactly like that of pre-charge in high power mode. usb low power mode current regulation accuracy is described in the next section. pre-charge and usb low power mode fast- charge current regulation pre-charging is automatically selected when the battery voltage is below the pre-charge threshold voltage (vt preq ). pre-charge current conditions the battery for fast charg- ing. the pre-charge current value is xed at 20% of the programmed fast-charge current. note that usb low power mode pre-charge current is equal to usb low power mode fast-charge current. pre-charge current regulation accuracy is dominated by o set error. the range of expected pre-charge output current versus programming resistance r iprgm is shown in figures 2a and 2b. each gure shows the nominal pre- charge current versus nominal r iprgm resistance as the center plot and two theoretical limit plots indicating maximum and minimum current versus nominal pro- gramming resistance. these plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. the current range includes the uncertainty due to 1% tolerance resis- tors. the dots on each plot indicate the currents obtained with eia e96 standard value 1% tolerance resistors. figures 2a and 2b show low and high resistance ranges, respectively. 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 1050 1100 r iprgm (k ), r-tol = 1% fast-charge current (ma) figure 1a fast-charge current tolerance versus programming resistance, low resistance range 7 8 9 1011121314151617181920212223242526272829 50 75 100 125 150 175 200 225 250 275 300 325 r iprgm (k ), r-tol = 1% fast-charge current (ma) figure 1b fast-charge current tolerance versus programming resistance, high resistance range
sc824 14 termination when the battery voltage reaches v cv , the sc824 transi- tions from constant current regulation to constant voltage regulation. the current into the battery decreases while the bat voltage is regulated to v cv as the battery becomes fully charged. when the output current drops below the termination current threshold, charging terminates. upon termination, the charger either enters monitor state or oat charges the battery for the top-o timer duration, depending on the con guration of the charge timer. after a 20 second delay following termination, the stat1 pin open drain output turns o . the termination current threshold is xed at 10% of the fast-charge current, as programmed by the iprgm pin resistance to ground, for all charging modes. charger output current is the sum of the battery charge current and the system load current. battery charge current changes gradually and establishes a slowly dimin- ishing lower bound on the output current while charging in cv regulation. the load current into a typical digital system is highly transient in nature. charge cycle termina- tion is detected when the sum of the battery charging current and the greatest load current occurring within the immediate 300s to 550s past interval is less than the programmed termination current. this timing behavior permits charge cycle termination to occur during a brief applications information (continued) low-load-current interval, and does not require that the longer interval average load current be small. termination current threshold accuracy is dominated by o set error. the range of expected termination current versus programming resistance r iprgm (for any charging mode) is shown in figures 3a and 3b. each gure shows the nominal termination current versus nominal r iprgm resistance as the center plot and two theoretical limit plots indicating maximum and minimum current vs. nominal programming resistance. these plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. the current range includes the uncertainty due to a 1% toler- ance resistor. the dots on each plot indicate the currents obtained with eia e96 standard value 1% tolerance resis- tors. figures 3a and 3b show low and high resistance ranges, respectively. monitoring output current the output current i bat is indicated by the voltage at the iprgm pin according to the following equation. 1000 r v i iprgm iprgm bat ensure that the iprgm pin is not loaded or corrupted by the processor analog to digital converter (adc). an rc 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 r iprgm (k ), r-tol = 1% pre-charge current (ma) figure 2a pre-charge current and usb low power mode fast-charge current tolerance vs. programming resistance, low resistance range 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 r iprgm (k ), r-tol = 1% pre-charge current (ma) figure 2b pre-charge current and usb low power mode fast-charge current tolerance vs. programming resistance, high resistance range
sc824 15 applications information (continued) filter (r at least 100r iprgm , c large compared to the sample-and-hold capacitance of the adc) can prevent corruption of the iprgm pin voltage by the adc. any noise introduced onto the iprgm pin will be seen as current noise at the sc824 output during cc regulation, and can introduce errors in the termination current. the iprgm pin will see a brief (<1ms) pulse whenever the charger turns on, just prior to enabling the output. this pulse is part of the startup iprgm pin-short (to ground) test. when the charger rst turns on, the processor should allow time for this pulse prior to reading the iprgm voltage. see the section short circuit protection. mode pin tri-level logical input the mode pin is designed to interface to a processor gpio port that is powered from a peripheral supply voltage as low as 1.8v or as high as a fully charged battery. the pro- cessor writes 0 to select mode low-range, and 1 to select high-range. the gpio port is con gured as an input to select mid-range. while driven high (v mode > min v ih ), the sc824 will operate in usb high power mode. while the mode input voltage is within its speci ed mid range (min v im < v enb < max v im ), either by oating (by recon guring its gpio as an input) or by being externally forced, the sc824 will operate in usb low power mode. while driven low (v mode < max v il ), the sc824 will operate in adapter mode. when no charging source is present, while the charger is disabled, or while operating in the monitor state (described in a later section), the mode pin enters a high impedance state, suspending the tri-level functionality. upon recharge or re-enabling the charger, the mode pin tri- level interface is reactivated. while the tri-level interface is active, the equivalent circuit looking into the mode pin is a variable resistance, minimum 15k, to an approximately 1v source. the input will oat to mid range whenever the external driver sinks or sources less than 5a. this is a common worst-case characteristic of a high impedance gpio, or a weak pull-up or pull-down gpio, con gured as an input. the driving gpio must be able to sink or source at least 75a to ensure a low or high state, respectively, although the drive current required is typically far less. (see the electrical character- istics table.) typically a processor gpio port direction defaults to input upon processor reset, or is high imped- ance when unpowered. this is the ideal initial condition for driving the mode pin, since this will select usb low power mode, which is the safest default mode with the lowest fast charge current. for xed mode operation, this pin can be permanently grounded to select low-range, left unconnected to select mid-range, or permanently connected to a logical high voltage source, such as bat or a regulated peripheral supply voltage, to select high-range. figure 3a termination current tolerance vs. programming resistance, low resistance range 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 r iprgm (k ), r-tol = 1% termination current threshold (ma) 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 0 5 10 15 20 25 30 35 r iprgm (k ), r-tol = 1% termination current threshold (ma) figure 3b termination current tolerance vs. programming resistance, high resistance range
sc824 16 applications information (continued) monitor state upon termination (charge timer disabled) or time-out of the top-o timer (charge timer enabled), the charger will enter the monitor state. if the battery voltage falls below the recharge threshold (v cv - v req ) while in the monitor state, the charger will automatically initiate a re-charge cycle. this operation will turn on the charger output, but will not assert the stat1 output. a recharge cycle is subject to normal timer operation if the timer is enabled. the battery leakage current during monitor state is no more than 1 a over temperature and typically less than 0.1 a at room temperature. the sc824 can be forced out of the monitor state by dis- abling and re-enabling the charger using the en_ntc pin. this operation will initiate a new charge cycle. this forced re-charge behavior can be used for periodically testing the battery state-of-charge and topping o the battery without requiring the battery to discharge to the auto- matic re-charge voltage. a single cpu instruction cycle is a su cient disable hold-time to initiate a re-charge cycle. following termination, the host processor can schedule a forced re-charge at any desired interval. forced re-charge will assert the stat1 output, which will remain on for 20 seconds following termination, regardless of whether the charge timer is enabled. vsys pin the voltage of the vsys pin is regulated from the vin input and is present only when vin is powered. a capacitor of at least 1f should be connected from vsys to ground near the pin. capacitance must be rated at the expected bias voltage of 4.6v. the internal cc timer is selected when the rtime pin is connected to vsys. vsys provides an external voltage reference and supply for the ntc network. the total exter- nal load on the vsys pin should not exceed 1ma. en_ntc interface the en_ntc pin is the interface to a battery pack tempera- ture sensing negative temperature coefficient (ntc) thermistor, which can be used to suspend charging if the battery pack temperature is outside of a safe-to-charge range. the en_ntc interface also often serves as a charger disable input and as a battery removal detector. the recommended en_ntc network is a xed-value pull- up resistor (designated r npu ) from the en_ntc pin to the vsys pin, and the battery pack ntc thermistor (designated r ntc ) from the en_ntc pin to ground. in this con gura- tion, an increasing battery temperature produces a decreasing ntc pin voltage. when v en_ntc is greater than the high (cold) threshold (but below the no-battery detector threshold) or less than the low (hot) threshold (but above the disable threshold), the charge cycle is suspended by turning o the output. this suspends but does not reset the charge timer, in any timer stage, and a charging fault is indicated by asserting (pulling low) stat1 and releasing stat0. hysteresis is included for both high and low ntc thresholds to avoid chatter at the ntc temperature fault thresholds. when v en_ntc returns to the temperature-ok-to-charge range, the charge timer resumes, stat0 and stat1 are asserted, and the charge cycle continues. the charge timer will expire when the output on-time exceeds the timer setting, regardless of how long it has been disabled due to an ntc fault. all en_ntc input thresholds are proportional to the vsys pin voltage (v vsys ). see the block diagram. when the rec- ommended external ntc circuit shown in the block diagram is used, the external en_ntc pin voltage is also proportional to v vsys , with the proportionality varying with the thermistor resistance. this ensures that all en_ntc thresholds are insensitive to v vsys . the ratiometric hot and cold thresholds are given by the parameters rt ntc_hf and rt ntc_cr . en_ntc pin voltage v en_ntc between rt ntc_hf v vsys and rt ntc_cr v vsys enables charging. see table 1. table 1 en_ntc pin ratiometric thresholds % of v vsys range v en_ntc ratiometric thresholds rt ntc_nbr = 95% no-battery ntc cold fault rt ntc_cr = 75% ntc temperature- ok-to-charge rt ntc_hf = 30% ntc hot fault rt ntc_dis = 10% charger disabled
sc824 17 applications information (continued) when v en_ntc < rt ntc_dis v vsys (nominally 10% of v vsys ), the sc824 charger is disabled. this threshold allows the en_ntc pin to be used as a disable pin, allowing the system controller to asynchronously disable or reset the device by pulling en_ntc to ground. when v en_ntc < rt ntc_dis v vsys , the charger is turned o , the charge timer is reset, and the stat1 status output is turned o . while disabled, the vin input uvlo and ovp threshold detectors remain active, and the stat0 pin continues to indicate whether the vin input voltage is valid for charging. no-battery operation is selected when the battery (along with the thermistor) is removed, determined by the ntc pin exceeding rt ntc_nbr v vsys , which is 95% of the vsys pin voltage. in no-battery operation, the charge timer is disabled and the output is regulated to v cv , subject to the output current limit determined by the selected mode and iprgm pin resistance to gnd. the stat0 output remains asserted to indicate that the charging source is present and stat1 is released. when returning to normal charging (by reinstalling the battery and thermistor), the timer is reset. the response of the sc824 to an en_ntc pin voltage above the ntc cold fault threshold (but below rt ntc_nbr ) or below the low ntc hot fault threshold (but above vt ntc_dis ) is the same. therefore the en_ntc network can be con gured with the battery pack thermistor between en_ntc and vsys, and a xed resistor between en_ntc and ground, reversing the designation of the hot and cold thresholds. this con guration may be used to disable the charger when the battery pack is removed. for detailed design guidance for ratiometric ntc inter- faces, including thermistor selection guidelines, see the semtech application note anCpmC0801, ntc thermistor network design for ratiometric thresholds . charge timer the sc824 provides a multi-stage charge timer. each stage of the charge cycle is timed separately, in compli- ance with ieee std. 1725-2006, section 7.3.5. the pre-charge stage timer indicates a fault and halts charging if the battery voltage has not exceeded the pre- charge threshold within 45 minutes after the start of the charge cycle. the pre-charge stage timer is active even if the timer function has been disabled. when the battery voltage exceeds the pre-charge thresh- old, the timer is reset and begins timing the cc stage. the cc stage timer indicates a fault and halts charging if the battery voltage has not reached v cv within the cc stage fault timer duration (t ccf ). the cc stage timer is not active if the timer function has been disabled. an internally programmed cc stage duration of three hours can be selected by connecting rtime directly to vsys. or it can be programmed from two hours to 16 hours by selection of the resistance from the rtime pin to ground, as shown in the block diagram. the broad cc stage timer programming range permits timer-protected charging of large batteries with small charging currents, such as in usb low power mode charging. the value of t ccf is programmed according to figures 4a and 4b. each gure shows the nominal t ccf duration versus nominal r rtime resistance as the center plot and two theo- retical limit plots indicating maximum and minimum t ccf duration versus nominal programming resistance. these plots are derived from models of the expected worst-case contribution of error sources that depend on programmed current. the t ccf tolerance range includes the uncertainty due to 1% tolerance resistors. the dots on each plot indi- cate the currents obtained with eia e96 standard value 1% tolerance resistors. figures 4a and 4b show low and high resistance ranges, respectively. when the battery voltage has risen to v cv , the cc timer stage ends, the timer is reset, and the cv timer stage begins. the cv stage timer is set to expire in three hours using a xed-duration internal timer. upon termination by current (10% of fast charge current) or expiration of the cv stage timer (whichever occurs rst), end-of-charge is indicated by releasing stat1 and the timer is reset. note that cv stage time-out is not a fault, but rather is regarded as termination by another means. this alternative termi- nation-by-time behavior ensures termination in the case that the minimum load current exceeds the programmed termination current. following termination, by current or by timer cv stage time-out, the post-termination top-o timer stage begins.
sc824 18 applications information (continued) top-o charging maintains the bat pin voltage at v cv by acting as a voltage regulator until the time-out of the top- o timer. the top-o timer times-out in 45 minutes, at which time the charger is turned off and enters the monitor state. the charge timer is disabled when the rtime pin is grounded. in this case, the output is turned o immedi- ately upon current termination and the charger enters the monitor state. note that the pre-charge stage timer will be active regardless of whether the rtime pin is grounded, to detect a grossly defective battery or output short to ground. a pre-charge timeout will signal a fault and turn o the charging output. during the cc timer interval, momentarily grounding (at least 300s) and releasing the rtime pin will reset the cc mode timer. this feature allows the cc mode timer to be used as a watchdog timer, enabling the host processor to extend the cc interval as long as needed for charging a large battery with a low fast-charge current. while the charger is in the top-o interval and the timer is enabled, the rtime pin can be grounded momentarily (at least 300s) to immediately end the charging cycle and place the charger in the monitor state. in this condition, the charge timer remains enabled for operation in a sub- sequent recharge cycle. an ntc temperature fault will suspend but will not reset the charge timer, in any timer stage. the timer resumes from its current state when the battery temperature returns to the safe-to-charge range. see the section logical state machine for details of timer stage transitions and sequencing. status outputs the stat0 and stat1 pins are open-drain status indicating outputs. stat0 is asserted (driven low) whenever a valid charging source is present at the vin input pin. a valid charging source has a voltage greater than the uvlo threshold and less than the ovp threshold. stat1 is asserted as charging begins and is subsequently released upon charge termination (by cv stage timeout or by charge current) to indicate end-of-charge. it is also released when the charger is disabled and in no-battery mode. if the battery is already fully charged when a charge cycle is initiated, stat1 is asserted and will remain asserted for approximately 22 seconds before being released. the stat1 pin is not asserted for automatic recharge cycles. the stat0 and stat1 pins may be connected to processor gpio ports to notify a host controller of the charging status, or they can be used as led drivers. both are high voltage inputs, so they can be safely pulled up to the input 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 r rtime (k ) t ccf (hours) figure 4b cc stage fault timeout vs. programming resistance, high resistance range 20 25 30 35 40 45 50 55 60 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 r rtime (k ) t ccf (hours) figure 4a cc stage fault timeout vs. programming resistance, low resistance range
sc824 19 applications information (continued) supply to power leds. the conditions indicated by stat0 and stat1 are summarized in table 2. table 2 statx pin truth table condition stat0 stat1 power applied (vt uvlo < v vin < vt ovp ), prior to charging 0 (asserted) 1 (released) charging 0 (asserted) 0 (asserted) charging done, any stage of a recharge cycle, or no-battery mode 0 (asserted) 1 (released) charging fault (pre-charge or cc time-out, ntc temperature fault, iprgm pin short to ground) 1 (released) 0 (asserted) no valid input supply 1 (released) 1 (released) the stat0 and stat1 outputs indicate charging faults by asserting stat1 while releasing stat0. charging faults include pre-charge or cc-stage timeout, a battery ntc temperature fault (hot or cold), and the shorting of the iprgm pin to ground. charging status is indicated during precharge, cc charg- ing, and cv charging until termination. top-o charging is not indicated. upon termination, whether the timer is enabled or disabled, charging status will be indicated for an additional 22 seconds, either while top-o charging with the timer enabled, or while in monitor state with the output o if the timer is disabled. this feature ensures that charging will be indicated long enough to be seen, even if the adapter voltage is applied when the battery is already fully charged. it informs the user that a charge cycle was begun and completed normally. note that the sc824 can terminate charging of a fully charged battery in as little as a millisecond; without this feature the charg- ing indication would not be visible. logical cc-to-cv transition the sc824 di ers from monolithic linear single cell li-ion chargers that implement a linear transition from cc to cv regulation. the linear transition method uses two simul- taneous feedback signals output voltage and output current to the closed-loop controller. when the output voltage is su ciently below the cv regulation voltage, the in uence of the voltage feedback is negligible and the output current is regulated to the desired current. as the battery voltage approaches v cv (nominally 4.2v), the voltage feedback signal begins to in uence the control loop, which causes the output current to decrease even though the output voltage has not yet reached v cv . the output voltage limit dominates the controller when the battery reaches v cv , and eventually the controller is entirely in cv regulation. the soft transition e ectively reduces the charge current below that which is permitted for a portion of the charge cycle, which increases charge time. the sc824 uses a logical transition from cc to cv to recover the charge current lost due to a soft transition. the controller regulates only current until the output voltage exceeds the transition threshold voltage. it then switches to cv regulation. the transition voltage from cc to cv regulation is typically 7mv higher than the cv regu- lation voltage, which provides a sharp and clean transition free of chatter between regulation modes. the di erence between the transition voltage and the regulation voltage is referred to as the cc/cv overshoot. while in cv regula- tion, the output current sense remains active. if the output current exceeds the mode-dependent programmed fast- charge current by approximately 5%, the controller reverts to current regulation. the logical transition from cc to cv results in a faster charging cycle that is compliant with the speci ed current and voltage limits of the li-ion cell. the output current is constant at the cc limit, then decreases abruptly when the output voltage steps from the overshoot voltage to the regulation voltage at the transition to cv control. thermal limiting device thermal limiting (tl) is the third output constraint of the cc/cv/tl control. this feature permits a higher input ovp threshold in the sc824, and thus the use of higher regulation voltage or poorly regulated adapters. if high input voltage results in excessive power dissipation, the output current is reduced to prevent overheating of the sc824. the thermal limiting controller reduces the output current at the rate of i t ?50ma/oc for any junc- tion temperature t j > t tl .
sc824 20 when thermal limiting is inactive, t j = t a + v i fq ja , where t a is the ambient temperature, v is the voltage dif- ference between the vin pin and the bat pin, i fq is the programmed fast charge current, and ja is the thermal resistance from junction to ambient. however, if t j com- puted this way exceeds t tl , then thermal limiting will become active and the thermal limiting junction tempera- ture will be t jtl = t a + v i(t jtl ) ja , where i(t jtl ) = i fq + i t (t jtl ? t tl ). (note that i t is a negative quantity.) combining these two equations and solving for t jtl , the steady state junction temperature during active thermal limiting is ja t ja tl t fq a jtl i v 1 t i i v t t t t ' ' . the thermal limiting controller is able to reduce output current to zero. however, this does not happen in prac- tice. output current is reduced to i(t jtl ), reducing power dissipation such that die temperature equilibrium t jtl is reached. while thermal limiting is active, all charger functions remain active and the charger logical state is preserved. see the section input over-voltage protection for an example of thermal limiting operation. operating a charging adapter in current limit in high charging current applications, charger power dis- sipation can be greatly reduced by operating the charging adapter in current limit. the sc824 supports adapter- current-limited charging with a low uvlo falling threshold and with internal circuitry designed for low input voltage operation. to operate an adapter in current limit, r iprgm is chosen such that the programmed fast-charge current i fq exceeds the current limit of the charging adapter i ad-lim . the charging load will pull the adapter output voltage (the vin pin input voltage) down to the battery voltage plus the charger dropout voltage. power dissipation in the sc824 will be reduced to the charger dropout voltage multiplied by i ad-lim . if i ad-lim is less than 20% of i fq , then the adapter voltage can be pulled down to the battery voltage while the battery voltage is still below the precharge threshold. in this case, ensure that the adapter will maintain its current limit below 20% of i fq at least until the battery voltage exceeds the precharge threshold. failure to do so could permit charge current to exceed the precharge current while the battery voltage is below the precharge threshold. this is because the low input voltage can also compress the pre- charge threshold internal reference voltage to below the battery voltage. this will prematurely advance the charger logic from precharge current regulation to fast-charge regulation, and the charge current will be permitted, by the charger, to exceed the safe level recommended for pre-charge conditioning. the low uvlo falling threshold ( vt uvlo-f ) permits the adapter voltage to be pulled down to just above the battery voltage only in adapter mode (mode pin grounded). in either usb mode, under-voltage load regulation (uvlr) prevents the input being pulled down by the charging current to below the uvlr limit of v uvlr = 4.51v typically. the sc824 should be operated with the adapter voltage below the rising selection threshold (vt uvlo-r ) only if the low input voltage is the result of adapter current limiting. this implies that the vin pin voltage rst exceeds vt uvlo-r to begin charging and is subsequently pulled down by the charging current to just above the battery voltage. interaction of thermal limiting and cla charging to permit the charge current to be limited by the adapter, it is necessary that the adapter mode fast-charge current be programmed greater than the maximum adapter current, (i ad-lim ). in this con guration, the cc regulator will operate with its pass device fully on (in saturation, also called dropout). the voltage drop from vin to bat is determined by the r ds-on of the internal pass device multi- plied by the adapter current. applications information (continued)
sc824 21 in dropout, the power dissipation in the sc824 is p ilim = (r ds-on ) x (i ad-lim ) 2 . since r ds-on does not vary with battery voltage, dropout power dissipation is constant throughout the cc portion of the charge cycle while the adapter remains in current limit. the sc824 junction tem- perature will rise above ambient by p ilim x ja . if the device temperature rises to the temperature at which the tl control loop limits charging current (rather than the current being limited by the adapter), the input voltage will rise to the adapter regulation voltage. the power dis- sipation will increase so that the tl regulation will further limit charge current. this will keep the adapter in voltage regulation for the remainder of the charge cycle. in this case, the sc824 will continue to charge with thermal limit- ing until charge current decreases while in cv regulation (reducing power dissipation sufficiently), resulting in a slow charge cycle, but with no other negative e ect. to ensure that the adapter remains in current limit, the internal device temperature must never rise to t tl . this implies that ja must be kept small enough, through careful layout, to ensure that t j = t a + (p ilim ja ) < t tl . under-voltage load regulation in usb modes the vin pin uvlr feature, enabled in either usb mode, prevents the battery charging current from overloading the usb vbus network, regardless of the programmed fast charge value (i fq_usb ). when either usb high power or usb low power mode is selected, the sc824 monitors the input voltage (v vin ) and reduces the charge current by the amount necessary to keep v vin no lower than the uvlr limit (v uvlr ). uvlr is active only when one of the usb modes is selected. uvlr ensures the integrity of the usb vbus supply for all devices sharing a host or hub supply. in either usb mode, the uvlr feature will reduce the charging current to zero if v vin is externally pulled below v uvlr . this condition will not be interpreted as termination and will not result in an end-of-charge indication. the stat1 pin will remain asserted as if charging is continuing. this behavior prevents repetitive indications of end-of- charge alternating with start-of-charge in the case that the external vin load is removed or is intermittent. stat0 remains asserted until the input voltage is less than vt uvlo-f . usb high power and low power support the usb speci cation restricts the load on the usb vbus power network to 100ma for low power devices and for high power devices prior to granting permission for high power operation. the usb speci cation restricts the vbus load to 500ma for high power devices after granting per- mission to operate as a high power device. a xed 1:5 ratio of low power to high power charging current is desir- able for charging batteries with maximum fast charge current of at least 500ma. for this application, the sc824 provides xed 1:5 current ratio low-to-high power mode support via the tri-level mode input pin. for batteries with maximum fast charge current less than 500ma, a xed 1:5 low/high power charge current ratio will result in suboptimal charging in usb low power mode. for example, a 300mah battery will typically require a fast-charge current of 300ma or less. a xed 1:5 ratio for usb low-to-high power charging current will unnecessar- ily reduce charging current to 60ma, well below the 100ma permitted. in this case, it may be preferable to program usb low-power fast-charge current by switching an external programming resistor. see the section design considerations small battery. input over-voltage protection the vin pin is protected from over-voltage to at least 30v above gnd. when the input voltage exceeds the over- voltage protection rising threshold (vt ovp-r ), charging is halted. charging resumes when the input voltage falls below the ovp falling threshold. ovp turns o the stat0 and stat1 outputs. all modes use the same input ovp threshold, which has been set relatively high to permit the use of poorly regu- lated adapters. such adapters may output a high voltage until loaded by the charger. a too-low ovp threshold could prevent the charger from ever turning on and loading the adapter to a lower voltage. if the adapter voltage remains high despite the charging load, the fast thermal limiting feature will immediately reduce the charging current to prevent overheating of the charger. this behavior is illustrated in figure 5, in which v bat = 3.0v, i fq = 700ma, and v vin is stepped from 0v to 8.1v. initially, power dissipation in the sc824 is 3.6w. applications information (continued)
sc824 22 1s/div v vin (2v/div) v vin ,v bat =0v i bat (100ma/div) i bat =0ma v vin =8.1v, v bat =3.0v i bat =700ma (initially), p dissipation =3.6w (initially) v bat (2v/div) figure 5 thermal limiting example note that the bat output current is rapidly reduced to limit the internal die temperature. it then continues to decline as the circuit board temperature gradually rises, further reducing the conduction of heat from the die to the ambient environment. the fast thermal limiting feature ensures compliance with ccsa yd/t 1591-2006, telecommunication industrial standard of the peoples republic of china technical requirements and test method of charger and interface for mobile telecommunication terminal , section 4.2.3.1. short circuit protection the sc824 can tolerate a bat pin short circuit to ground indefinitely. the current into a ground short (while v bat < 1.8v) is approximately 10ma. for v bat > 1.8v, normal pre-charge current regulation is active. a short circuit or too little programming resistance to ground on the iprgm pin (<< 2k) will prevent proper regulation of the bat pin output current. prior to enabling the output a check of the iprgm pin is performed to ensure that there is su cient resistance to ground. a test current is output on the iprgm pin. if the test current produces a voltage of sufficient amplitude, then the output is enabled. an example with r iprgm = 2.94k is illustrated in figure 6, in which the test current is applied for approximately 250s to determine that there is no pin short. if a short is detected, the test current persists until the short to ground is removed, and then the charging startup sequence will continue. 400s/div figure 6 iprgm pin short-to-ground test during startup a short to ground applied to the iprgm pin while charg- ing will also be detected, by a di erent mechanism. iprgm pin short-to-ground detection on the iprgm pin forces the sc824 into reset, turning o the output and clearing the logical state, including the timer. a short-to-ground on the iprgm pin will halt charging and prevent startup regardless of the mode selected. it is indicated as a fault condition on the statx pins. when the iprgm ground short is removed, the charger begins normal operation automatically without input power cycling. over-current protection over-current protection is provided in all modes of opera- tion, including cv regulation. the output current is limited to the programmed pre-charge current limit value when the battery voltage is below the pre-charge threshold and the fast-charge current limit value otherwise. logical state machine the sc824 logical behavior described in the preceding sections is derived from two distinct state machines, as illustrated in the following diagrams. the charger state machine permits transitions to most states from most other states, as shown. the multi-stage timer state machine enforces a unidirectional ow. once the timer has advanced from one stage to the next, there is no return to the previous stage except by a re-charge cycle, a reset (by disabling and re-enabling the sc824), or by cycling the input power o and on. applications information (continued) i bat (500ma/div) i bat =0ma v iprgm =0v v vin (5v/div) v iprgm (1v/div) v vin =0v
sc824 23 applications information (continued) charger logical state machine transition comments timer running (if enabled ) stat1 turned on initiate soft-start clear and hold timer stat1 turned off output off indicate fault on stat pins initiate soft-start suspend the timer clock & resume upon return to charge initiate soft-start start timer (if enabled ) stat1 turned on. iprgm static pinshort check monitor start ~iprgm static pinshort detected ntc ok-to-charge ~(uvlo or por or (vin < vout + )or ntc_disable) (timer disabled and (i bat < i term )) or (timer enabled and top -off timer expired) v bat < v req from any state iprgm static pinshort detected iprgm dynamic pinshort detection v bat > v req immediate ntc hot or cold timer fault initiate soft-start start timer (if enabled ) stat1 remains off. re- charge ntc fault v bat < v preq charge or no_battery states : bat output cc /cv regulator operation constant current regulation i bat = 20 % of i fq constant current regulation i bat = i fq constant voltage regulation v bat = v cv i bat > i fq v bat > v preq cc regulation pre-charge v bat > v cv cv regulation disable uvlo or por or (vin < vout + ) or ntc_disable (asynchr onously) charge timer fault signal, from timer state machine no battery ntc_nobatt from any state except disable & static_ pinshort ntc_nobatt ntc ok-to-charge state comments logical state logical state state transition condition state entry path state exit path key: signal to charger state machine signal to charger state machine signals to and from charger state machine charge timer fault
sc824 24 applications information (continued) multi-stage timer logical state machine spawned timer, can run simultaneously with top-off timer timer clock stopped clear the timer counter clear the timer counter clear the timer counter clear the timer counter clear the timer counter immediate & unconditional timer enabled and (v bat > v cv ) timer enabled and ((t > t cv ) or ( i bat < i term )) timer disabled or ( t > t to ) timer start t > t preqf pre- charge timer (t > t ccf ) or (( t > ?t ccf ) and (v bat < v preq )) cc timer (t > t preqf ) and (v bat < v preq ) cv timer t > t sd timer disabled and (i bat < i term ) and (v bat = v cv ) timer hold status delay timer turn off stat1 timer disabled timer disabled timer enabled transition comments state comments logical state logical state state transition condition state entry path state exit path key: timerfault signal to charger state machine signal from charger state machine signals to and from charger state machine signal from charger state machine v bat > v preq top-off timer timer halt
sc824 25 applications information (continued) operation without a battery the sc824 can be operated as a 4.2v ldo regulator without the battery present, for example, for factory testing. if this use is required, the total output capacitance, c bat plus any other capacitors tied directly to bat pin network, should be at least 2.2f but less than 22f to ensure stability in cv regulation. to operate the charger without a battery, the ntc pin should be pulled up to the vsys voltage to select no-battery mode. this can be accomplished automatically when a battery is absent if the recommended ntc network is used. see the section en_ntc interface for details. capacitor selection low cost, low esr ceramic capacitors such as the x5r and x7r dielectric material types are recommended. the bat pin capacitor should be at least 1f, but can be as large as desired to accommodate the required input capacitors of regulators connected directly to the battery terminal. bat pin total capacitance must be limited if the sc824 is to be operated without the battery present. see the section operation without a battery. the vin pin capacitor is typi- cally between 0.1f and 2.2f, although larger values will not degrade performance. the vsys pin capacitor must be at least 1f. capacitance must be rated at the expected bias voltage (4.2v for the bat pin capacitor, 4.6v for the vsys pin capacitor, the expected v vin supply regulation voltage for the vin pin capacitor), rather than the zero-volt capacitance rating. pcb layout considerations layout for linear devices is not as critical as for a switching regulator. however, careful attention to detail will ensure reliable operation. place input and output capacitors close to the device for optimal transient response and device behavior. connect all ground connections directly to the ground plane. if there is no ground plane, connect to a common local ground point before connecting to board ground near the gnd pin. attaching the device to a larger copper footprint will enable better heat transfer from the device on pcbs with internal ground and power planes. ? ? ? design considerations large battery a battery with a desired fast-charge current exceeding 500ma is most compatible with the usb xed 1:5 current ratio low-to-high power model of operation. for example, consider an 800mahr battery, with maximum fast-charge current of 800ma. the adapter input fast-charge should be con gured for 800ma max (r iprgm = 2.78k equivalent is required). select r iprgm = 4.53k to set usb high power fast-charge to 450ma, and the usb low power fast-charge set to 450/5 = 90ma. the mode pin tri-level logical input can be used to select between usb high power and usb low power modes whenever a xed 5:1 current ratio is desired. for adapter mode charging, set the mode pin high for usb high power mode if uvlr is desired, or low for adapter mode if current limited adapter capability is desired. then switch in a parallel 7.15k iprgm resistor, as shown in figure 7, for an equivalent 2.77k iprgm resis- tance. this will program the desired 800ma max adapter mode fast charge current. iprgm 8 r iprgm r iprgm_hi hi/lo current select figure 7 external programming of arbitrary usb high power and low power charge currents design considerations small battery a battery with a desired fast-charge current less than 500ma will not be charged in the minimum charge time when in usb low power mode with a 1:5 low-to-high power mode current ratio. a 300mahr battery can be used as an example with maximum fast-charge current of 300ma. in this example, the adapter input and usb input high power fast-charge currents should both be set to 300ma. in this case, the fixed usb low-to-high power charging current ratio of 1:5 would provide a usb low power mode fast charge current of 60ma. for this example, setting the usb low power fast-charge current to 90ma would provide a shorter charge time without violating usb vbus current requirements. an arbitrary ratio of usb low-to-high power charging currents can be obtained using an external n-channel fet oper- ated with a processor gpio signal to engage a second
sc824 26 applications information (continued) parallel iprgm resistor, while selecting high power mode (mode pin driven high) for both low or high power usb charging. the external circuit is similar to that illustrated in figure 7. for usb low power mode charging, the external transistor is turned o . for adapter mode or usb high power mode, the external transistor is turned on. the effect of the switched parallel iprgm resistor is to reduce the e ective programming resistance and thus raise the fast-charge current. a 300mahr battery with maximum fast-charge current of 300ma is an example. the adapter mode and usb high power mode fast-charge currents should both be set to 300ma max. the usb input low power fast-charge current is 100ma max. refer to the circuit in figure 7 and the data of figures 1a and 1b. for i fq = 300ma max, r iprgm = 7.50k is desired. a xed iprgm resistor of r iprgm = 23.2k pro- grams i fq = 100ma max for usb low power charging. when parallel resistor r iprgm_hi = 11.0k is switched in, the equivalent iprgm resistor is 7.50k, for i fq = 300ma max. usb low power mode alternative where a usb mode selection signal is not available, or for a low capacity battery where system cost or board space make usb low power mode external current program- ming impractical, usb low power charging can be sup- ported indirectly. the iprgm pin resistance can be selected to obtain the desired usb high power charge current. then, with the mode pin always con gured for usb high power mode, the uvlr feature will ensure that the charging load on the vin pin will never pull the usb vbus supply voltage below v uvlr regardless of the host or hub supply limit. the uvlr limit voltage guarantees that the voltage of the usb vbus supply will not be loaded below the low power voltage speci cation limit, as seen by any other low power devices connected to the same usb host or hub. under-voltage load regulation can also be bene cial for charging small batteries. instead of switching the pro- gramming resistor depending on the usb mode, uvlr (while selecting usb high power mode) can permit charg- ing at whatever charge current a usb hub low-power supply can provide without compromising the integrity of the hub power supply for other devices. usb dedicated charger compatibility the sc824 is especially well suited to the usb charging speci cation, revision 1.0, dedicated charger, sections 3.5 and 4.1. important features that support compliance include low quiescent current when disabled (less than 1.5ma), and selectable current limited supply charging behavior. the usb dedicated charger is required to limit its output current to more than 0.5a and less than 1.5a. a dedicated charger identi es itself by shorting together the usb d+ and d- lines. once the dedicated charger is detected, the sc824, with its 1a max programmed fast charge current in any mode, permits the fast-charge current to be set higher than the 500ma usb high power mode limit to permit faster charging of a large battery. (see the section design considerations large battery.) regardless of the sc824 programmed current, any speci- fication compliant usb dedicated charger will either supply more than the programmed fast charge current (and so will regulate to its speci ed output voltage), or will limit its output current such that its output voltage will be pulled down. the usb dedicated charger is required to maintain its current limit down to 2v. by selecting adapter mode, the sc824 input will be pulled down to the battery voltage plus charging path dropout. this behavior is rec- ognized in the usb battery charging speci cation, section 3.5, as an accepted means to reduce power dissipation in the device while charging at high current. if there are additional system circuits requiring that the usb vbus node voltage be maintained above the usb low power mode minimum voltage speci cation (4.4v), the sc824 usb high power mode should be selected. this mode enables under-voltage load regulation, which will regulate the charging output current, if necessary, to match the dedicated charger current limit while main- taining v uvlr (nominally 4.51v) at the vin pin. either of these sc824 charging modes will ensure reliable charging at any programmed charge current, using any usb battery charging speci cation compliant dedicated charger, regardless of its current limit.
sc824 27 applications information (continued) external power path management some applications require that the battery be isolated from the load while charging. figure 8 illustrates a typical charger bypass circuit. this circuit powers the load directly from the charging source via the schottky diode d bypass . when the charging source is present, the p-channel mosfet battery isolation switch q iso source-to-gate voltage v sg is equal to minus the d bypass forward-biased voltage drop, ensuring that the switch q iso is o (open). when the charging source is removed, the mosfet gate is pulled down to ground by r iso_pd , closing the battery isola- tion switch and connecting the battery to the load. when the charging source is removed, the turn-on of q iso could be delayed due to its gate capacitance. if so, the substrate pn diode of q iso will become forward biased, holding the load voltage to within 0.7v of the battery voltage until v sg > v th , turning on q iso . this momentary voltage drop can be mitigated by the use of an optional schottky diode in parallel with q iso , as shown. with the load isolated from the battery, the charging adapter must supply both the load current and the charg- ing current. if the sum of these should ever exceed the current capacity of the adapter, v adapter will be pulled down. selection of either of the sc824 usb modes will enable under-voltage load regulation. uvlr will reduce the charge current if needed to ensure that v adapter will remain at or above v uvlr , maintaining the load supply voltage to better understand the trade-offs between charger bypass and direct connection of the load to the battery, see the semtech application note anCpmC0802, tradeo s between direct battery connection vs. bypassing the charger . device load battery pack 2.2 f v adapter 2.2 f r rtime r iprgm vin stat0 iprgm mode gnd vsys en_ntc bat sc824 mode select cpu gpio rtime stat1 1 f r ntc thermistor r npu q iso r iso_pd d bypass opt. figure 8 battery isolation and power path bypass ? powering the load directly from the charging adapter
sc824 28 inches .016 bsc b .006 bbb aaa n l e d .010 dim a1 a2 a min .000 .020 0.25 0.15 .010 0.20 .008 0.35 0.25 .004 .003 10 .012 .079 .014 0.08 0.10 10 0.30 2.00 0.40 bsc millimeters max 0.05 0.60 dimensions min 0.00 nom (.006) - - max .002 .024 nom 0.50 - (0.152) - controlling dimensions are in millimeters (angles in degrees). notes: 1. 2.00 .079 pin 1 indicator (laser mark) a1 seating plane c b a aaa c 1 n e 2.10 2.10 1.90 1.90 .083 .083 .075 .075 2 a2 d e bxn bbb c a b coplanarity applies to the exposed pad as well as the terminals. 2. d1 .053 .057 .061 1.35 1.45 1.55 e1 .031 .035 .039 0.80 0.90 1.00 e/2 e a d1 e1 lxn d/2 outline drawing mlpd-ut10 2x2
semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804 www.semtech.com contact information sc824 29 land pattern mlpd-ut10 2x2 inches dimensions p z x y c g dim millimeters failure to do so may comp romise the thermal and/or functional performance of the device. shall be connected to a system ground plane. thermal vias in the land pattern of the exposed pad 3. h .057 1.45 k .035 0.90 r .004 0.10 1. controlling dimensions are in millimeters (angles in degrees). y g z h k p x (c) r .028 .106 (.079) .051 0.70 2.70 (2.00) 1.30 0.20 0.40 .016 .008 this land pattern is for reference purposes only. consult your manufacturin g group to ensure your company's manufacturin g guidelines are met. notes: 2.

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