tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 1 post office box 655303 ? dallas, texas 75265 supply current of 40 m a (max) battery supply current of 100 na (max) supply voltage supervision range: adjustable other versions available on request backup-battery voltage can exceed v dd power-on reset generator with fixed 100-ms reset delay time active-high and active-low reset output chip-enable gating ...3 ns (at v dd = 5 v) max propagation delay 10-pin msop package temperature range ...40 c to 85 c typical applications fax machines set-top boxes advanced voice mail systems portable battery powered equipment computer equipment advanced modems automotive systems portable long-time monitoring equipment point of sale equipment description the tps3613-01 supervisory circuit monitors and controls processor activity by providing backup- battery switchover for data retention of cmos ram. typical operating circuit cein ceout v dd v bat sense backup battery reset v out gnd mr manual reset r x r y monitored voltage 0.1 m f power supply address bus gnd reset v cc data bus 16 address decoder switchover capacitor 0.1 m f tps3613 uc cmos ram ce v cc 8 cmos ram ce v cc 8 real- time clock v cc copyright ? 2000, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 10 9 8 7 6 v out v dd gnd mr cein v bat reset sense reset ceout dgs package (top view) actual size 3,05 mm x 4,98 mm
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 2 post office box 655303 ? dallas, texas 75265 description (continued) during power on, reset is asserted when the supply voltage (v dd or v bat ) becomes higher than 1.1 v. thereafter, the supply voltage supervisor monitors v dd and keeps reset output active as long as v dd remains below the threshold voltage v it . an internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. the delay time starts after v dd has risen above the threshold voltage v it . when the supply voltage drops below the threshold voltage v it , the output becomes active (low) again. the tps3613-01 is available in a 10-pin msop package and is characterized for operation over a temperature range of 40 c to 85 c. package information t a device name marking 40 c to 85 c tps361301dgsr 2 tps361301dgst 3 afk 2 the dgsr passive indicates tape and reel of 2500 parts. ordering information application specific versions tps361 3 01 dgs r family functionality nominal supply voltage package reel device name nominal voltage, v nom tps3613x01 dgs tps3613x18 dgs 3 tps3613x25 dgs 3 tps3613x30 dgs 3 tps3613x33 dgs 3 1.8 v 2.5 v 3.0 v 3.3 v 5.0 v 3 for the application specific versions please contact the local ti sales office for availability and lead-time. tps3613x50 dgs 3 adjustable function table sense > v it v dd > v bat mr cein v out reset reset ceout 0 0 0 0 v bat 0 1 dis 0 001v bat 0 1 dis 0 010v bat 0 1 dis 0 011v bat 0 1 dis 0 100v dd 0 1 dis 0 101v dd 0 1 dis 0 110v dd 0 1 dis 0 111v dd 0 1 dis 1 000v dd 0 1 dis 1 001v dd 0 1 dis 1 010v dd 100 1 011v dd 101 1 100v dd 0 1 dis 1 101v dd 0 1 dis 1 110v dd 100 1 1 1 1 v dd 1 0 1 functional schematic
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 3 post office box 655303 ? dallas, texas 75265 switch control _ + reset logic + timer _ + reference voltage or 1.15 v v out v out reset reset ceout v bat v dd mr sense cein tps3613 r timing diagram undefined behavior t t t t v dd v bat t d t d v it cein reset ceout t d 15 m s 15 m s terminal functions
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 4 post office box 655303 ? dallas, texas 75265 terminal i/o description name no. cein 5 i chip-enable input ceout 6 o chip-enable output gnd 3 i ground mr 4 i manual reset input reset 7 o active-high reset output reset 9 o active-low reset output sense 8 i adjustable sense input v bat 10 i backup-battery input v dd 2 i input supply voltage v out 1 o supply output detailed description backup-battery switchover in case of a brownout or power failure, it may be necessary to preserve the contents of ram. if a backup battery is installed at v bat , the device automatically switches the connected ram to backup power when v dd fails. in order to allow the backup battery (e.g., 3.6-v lithium cells) to have a higher voltage than v dd , these supervisors will not connect v bat to v out when v bat is greater than v dd . v bat only connects to v out (through a 15- w switch) when v dd falls below v it and v bat is greater than v dd . when v dd recovers, switchover is deferred either until v dd crosses v bat , or when v dd rises above the reset threshold v it . v out will connect to v dd through a 1- w (max) pmos switch when v dd crosses the reset threshold. v dd >v bat v dd >v it v out 1 1 v dd 1 0 v dd 0 1 v dd 0 0 v bat v dd mode v bat mode vbsw hysteresis v it hysteresis v bat backup-battery supply voltage normal supply voltage v dd undefined figure 1. v dd v bat switchover
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 5 post office box 655303 ? dallas, texas 75265 detailed description (continued) chip-enable signal gating the internal gating of chip-enable (ce) signals prevents erroneous data from corrupting cmos ram during an under-voltage condition. the tps3613 use a series transmission gate from cein to ceout . during normal operation (reset not asserted), the ce transmission gate is enabled and passes all ce transitions. when reset is asserted, this path becomes disabled, preventing erroneous data from corrupting the cmos ram. the short ce propagation delay from cein to ceout enables the tps3613 device to be used with most processors. chip-enable signal gating (continued) the ce transmission gate is disabled and cein is high impedance (disable mode) while reset is asserted. during a power-down sequence when v dd crosses the reset threshold, the ce transmission gate will be disabled and cein immediately becomes high impedance if the voltage at cein is high. if cein is low when reset is asserted, the ce transmission gate will be disabled same time when cein goes high, or 10 m s after reset asserts, whichever occurs first. this will allow the current write cycle to complete during power down. when the ce transmission gate is enabled, the impedance of cein appears as a resistor in series with the load at ceout . the overall device propagation delay through the ce transmission gate depends on v out , the source impedance of the drive connected to cein , and the load at ceout. to achieve minimum propagation delay, the capacitive load at ceout should be minimized, and a low-output-impedance driver is used. i n the disabled mode, the transmission gate is off and an active pullup connects ceout to v out . this pullup turns off when the transmission gate is enabled. v it cein ceout reset t d t d t t t t v dd v bat v bat figure 2. chip-enable timing
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 6 post office box 655303 ? dallas, texas 75265 detailed description (continued) 50 w v bat v dd 3.6 v 50- w cable 50 w cein ceout c l 2 50 pf gnd v dd tps3613 c l includes load capacitance and scope probe capacitance. sense sense figure 3. ce propagation delay test circuit absolute maximum ratings over operating free-air temperature (unless otherwise noted) 2 supply voltage, v dd (see note1) 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . all other pins (see note 1) 0.3 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current at v out , i o 400 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current (all other pins), i o 10 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation see dissipation rating table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a 40 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltage values are with respect to gnd. for reliable operation the device must not be operated at 7 v for more than t=1000h continuously. dissipation rating table package t a 25 c power rating derating factor above t a = 25 c t a = 70 c power rating t a = 85 c power rating dgs 424 mw 3.4 mw/ c 271 mw 220 mw
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 7 post office box 655303 ? dallas, texas 75265 recommended operating conditions min max unit supply voltage, v dd 1.65 5.5 v battery supply voltage, v bat 1.5 5.5 v input voltage, v i 0 v dd + 0.3 v high - level input voltage, v ih 0.7 x v dd v low-level input voltage, v il 0.3 x v dd v continuous output current at v out , i o 300 ma input transition rise and fall rate at mr , d t/ d v 100 ns/v slew rate at v dd or v bat 1 v/ m s operating free-air temperature range, t a 40 85 c electrical characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit v dd = 1.8 v i oh = 400 m a v dd 0.2 v reset v dd = 3.3 v, i oh = 2 ma v dd = 5 v, i oh = 3 ma v dd 0.4 v v dd = 1.8 v, i oh = 20 m a v dd 0.3 v v oh high-level output voltage reset v dd = 3.3 v, i oh = 80 m a v dd = 5 v, i oh = 120 m a v dd 0.4 v v v oh high level out ut voltage ceout v out = 1.8 v, i oh = 1 ma v out 0.2 v v enable mode cein = v out v out = 3.3 v, i oh = 2.0 ma v out = 5 v, i oh = 5.0 ma v out 0.3 v ceout disable mode v out = 3.3 v, i oh = 0.5 ma v out 0.4 v reset v dd = 1.8 v, i ol = 400 m a 0.2 v ol low level out p ut voltage reset v dd = 3.3 v, i ol = 2.0 ma v dd = 5 v, i ol = 3.0 ma 0.4 v v ol low-level output voltage ceout v out = 1.8 v, i ol = 1.0 ma 0.2 v enable mode cein = 0 v v out = 3.3 v, i ol = 2 ma v out = 5 v, i ol = 5 ma 0.3 v res power-up reset voltage (see note 2) v dd > 1.1 v or v bat > 1.1 v, i ol = 20 m a 0.4 v i out = 8.5 ma, v dd = 1.8 v, v bat = 0 v v dd 50 mv normal mode i out = 125 ma v dd = 3.3 v, v bat = 0 v v dd 150 mv v out i out = 200 ma v dd = 5 v, v bat = 0 v v dd 200 mv v battery backup mode i out = 0.5 ma v bat = 1.5 v, v dd = 0 v v bat 20 mv battery-backup mode i out = 7.5 ma v bat = 3.3 v, v dd = 0 v v bat 113 mv note 2: the lowest supply voltage at which reset becomes active. t r,(vdd) 15 m s/v.
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 8 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit r ds( ) v dd to v out on-resistance v dd = 5 v 0.6 1 w r ds(on) v bat to v out on-resistance v bat = 3.3 v 8 15 w v it negative-going input threshold voltage (see note 3) 1.13 1.15 1.17 v v h hysteresis sense 1.1 v < v it < 1.65 v 12 mv v hys hysteresis v bsw (see note 4) vdd = 1.8 v 55 mv i ih high-level input current mr mr = 0.7 x v dd , v dd = 5.0 v 33 76 m a i il low-level input current mr mr = 0 v, v dd = 5.0 v 110 255 m a i i input current sense v dd = 1.15 v 25 25 na i dd v dd su pp ly current v out = v dd 40 m a i dd v dd supply current v out = v bat 40 m a i bat v bat su pp ly current v out = v dd 0.1 0.1 m a i bat v bat supply current v out = v bat 0.5 m a i lkg cein leakage current disable mode, v i < v dd 1 m a c i input capacitance v i = 0 v to 5 v 5 pf notes: 3. to ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 m f) should be placed near to the supply terminals. 4. for v dd < 1.6 v, v out switches to v bat regardless of v bat timing requirements at r l = 1 m w, c l = 50 pf, t a = 40 c to 85 c parameter test conditions min typ max unit t pulse width sense v ih = v it + 0.2 v, v il = v it 0.2 v 6 m s t w pulse width mr v sense > v it + 0.2 v v il = 0.3 x v dd , v ih = 0.7 x v dd 100 ns switching characteristics at r l = 1 m w , c l = 50 pf, t a = 40 c to 85 c parameter test conditions min typ max unit t d delay time v sense v it + 0.2 v, mr 0.7 x v dd , see timing diagram 60 100 140 ms 50% reset to 50% ceout v out = v it 15 t plh propagation (delay) time, sense to reset v il = v it 0.2 v, v ih = v it + 0.2 v 2 5 m s t plh g ( y) , low-to-high-level output mr to reset v sense v it + 0.2 v, v il = 0.3 x v dd , v ih = 0.7 x v dd 0.1 1 m s 50% cein to 50% ceout, c l = 50 pf onl y ( see fi g ure 3 ) v dd = 1.8 v 5 15 c l = 50 f only (see figure 3) (see note 5) 50% cein to 50% ceout, v dd = 3.3 v 1.6 5 ns t phl propagation (delay) time, hi h t l l l t t 50% cein to 50% ceout , c l = 50 pf only (see figure 3) (see note 5) v dd = 5 v 1 3 t phl g(y) high-to-low-level output sense to reset v il = v it 0.2 v, v ih = v it + 0.2 v 2 5 m s mr to reset v sense v it + 0.2 v, v il = 0.3 x v dd , v ih = 0.7 x v dd 0.1 1 m s transition time v dd to v bat v ih =v bat + 0.2 v, v il = v bat 0.2 v, v bat < v it 3 m s note 5: assured by design
tps3613-01 adjustable battery-backup supervisor for ram retention slvs340 december 2000 9 post office box 655303 ? dallas, texas 75265 mechanical data dgs (s-pdso-g10) plastic small-outline package 0,69 0,41 0,25 0,15 nom gage plane 4073272/a 03/98 4,98 0,17 6 3,05 4,78 2,95 10 5 3,05 2,95 1 0,27 0,15 0,05 1,07 max seating plane 0,10 0,50 m 0,25 0 6 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion.
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated
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