may 2001 copyright ? alliance semiconductor. all rights reserved. ? as7c513 as7c3513 5v/3.3v 32k16 cmos sram 5/17/01; v.1.1 alliance semiconductor p. 1 of 10 features ? as7c513 (5v version) as7c3513 (3.3v version) industrial and commercial temperature organization: 32,768 words 16 bits center power and ground pins high speed - 12/15/20 ns address access time - 6, 7, 8 ns output enable access time low power consumption: active - 800 mw (as7c513) / max @ 12 ns - 432 mw (as7c3513) / max @ 12 ns low power consumption: standby - 28 mw (as7c513) / max cmos - 18 mw (as7c3513) / max cmos easy memory expansion with ce , oe inputs ttl-compatible, three-state i/o 44-pin jedec standard package -400 mil soj -400 mil tsop 2 esd protection 2000 volts latch-up current 200 ma logic block diagram 32k 16 array oe ce we column decoder row decoder a0 a1 a2 a3 a4 a5 a7 v cc gnd a8 a9 a10 a11 a12 a13 a14 control circuit i/o0?i/o7 i/o8?i/o15 ub lb i/o buffer a6 pin arrangement 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 i/o13 i/o12 gnd v cc i/o11 i/o10 i/o9 i/o8 nc a7 a8 a9 a10 nc a0 ce i/o0 i/o1 i/o2 i/o3 v cc gnd i/o4 i/o5 i/o6 i/o7 we a14 a13 a12 44-pin soj, tsop 2 (400 mil) 21 22 a11 nc ub lb i/o15 i/o14 2 a3 3 a2 4 a1 1 nc 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 43 42 41 44 a5 a6 oe a4 as7c513 as7c3513 selection guide as7c513-12 as7c3513-12 as7c513-15 as7c3513-15 as7c513-20 as7c3513-20 unit maximum address access time 12 15 20 ns maximum output enable access time 5 7 9 ns maximum operating current as7c513 160 150 140 ma as7c3513 120 110 100 ma maximum cmos standby current as7c513 5 5 5 ma as7c3513 5 5 5 ma
as7c513 as7c3513 ? 5/17/01; v.1.1 alliance semiconductor p. 2 of 10 functional description the as7c513 and the as7c3513 are high performance cmos 524,288-bit static random access memory (sram) devices organized as 32,768 words 16 bits. they are designed for memory applications where fast data access, low power, and simple interfacing are desired. equal address access and cycle times (t aa , t rc , t wc ) of 12/15/20 ns with output enable access times (t oe ) of 6, 7, 8 ns are ideal for high performance applications. the chip enable input ce permits easy memory expansion with multiple-bank memory systems. when ce is high, the devices enter standby mode. the as7c513 and as7c3513 are guaranteed not to exceed 28/18 mw power consumption in cmos standby mode. a write cycle is accomplished by asserting write enable (we ), (ub ) and/or (lb ), and chip enable (ce ). data on the input pins i/o0-i/o7, and/or i/o8?i/o15, is written on the rising edge of we (write cycle 1) or ce (write cycle 2). to avoid bus contention, external devices should drive i/o pins only after outputs have been disabled with output enable (oe ) or write enable (we ). a read cycle is accomplished by asserting output enable (oe ), (ub ) and (lb ), and chip enable (ce ), with write enable (we ) high. the chips drive i/o pins with the data word referenced by the input address. when either chip enable or output enable is inactive, or wri te enable is active, or (ub ) and (lb ), output drivers stay in high-impedance mode. the devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be w ritten and read. lb controls the lower bits, i/o0?i/o7, and ub controls the higher bits, i/o8?i/o15. all chip inputs and outputs are ttl-compatible. the as7c513 and as7c3513 are packaged in common industry standard packages. absolute maximum ratings note: stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specificat ion is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. truth table key: x = don?t care; l = low; h = high parameter device symbol min max unit vo l t ag e o n v cc relative to gnd as7c513 v t1 ?0.50 +7.0 v as7c3513 v t1 ?0.50 +5.0 v voltage on any pin relative to gnd v t2 ?0.50 v cc +0.50 v power dissipation p d ?1.0w storage temperature (plastic) t stg ?65 +150 o c ambient temperature with v cc applied t bias ?55 +125 o c dc current into outputs (low) i out ?50ma ce we oe lb ub i/o0?i/o7 i/o8?i/o15 mode hxxxxhigh zhigh zstandby (i sb , i sbi ) lhl lhd out high z read i/o0?i/o7 (i cc ) lhlhlhigh zd out read i/o8?i/o15 (i cc ) lhl l ld out d out read i/o0?i/o15 (i cc ) llxlld in d in write i/o0?i/o15 (i cc ) llxlhd in high z write i/o0?i/o7 (i cc ) llxhlhigh zd in write i/o8?i/o15 (i cc ) l l h x h x x h x h high z high z output disable (i cc )
? as7c513 as7c3513 5/17/01; v.1.1 alliance semiconductor p. 3 of 10 recommended operating conditions ? v il min = ?3.0v for pulse width less than t rc /2. dc operating characteristics (over the operating range) 1 capacitance (f = 1mhz, t a = 25 o c, v cc = nominal) 2 parameter device symbol min typical max unit supply voltage as7c513 v cc 4.5 5.0 5.5 v as7c3513 v cc 3.0 3.3 3.6 v input voltage as7c513 v ih 2.2 ? v cc + 0.5 v as7c3513 v ih 2.0 ? v cc + 0.5 v il ?0.5 ? ?0.8v ambient operating temperature commercial t a 0? 70 c industrial t a ?40 ? 05 c parameter symbol test conditions device -12 -15 -20 unit min max min max min max input leakage current | i li | v cc = max v in = gnd to v cc ?1?1?1a output leakage current | i lo | v cc = max v out = gnd to v cc ?1?1?1a operating power supply current i cc v cc = max, ce v il f = f max , i out = 0ma as7c513 ? 160 ? 150 ? 140 ma as7c3513 ? 120 ? 110 ? 100 standby power supply current i sb v cc = max, ce v il f = f max , i out = 0ma as7c513 ? 40 ? 40 ? 40 ma as7c3513 ? 40 ? 40 ? 40 i sb1 v cc = max, ce v cc ?0.2v v in gnd + 0.2v or v in v cc ?0.2v, f = 0 as7c513 ? 3 ? 3 ? 3 ma as7c3513 ? 3 ? 3 ? 3 output voltage v ol i ol = 8 ma, v cc = min ? 0.4 ? 0.4 ? 0.4 v v oh i oh = ?4 ma, v cc = min 2.4?2.4?2.4? v parameter symbol signals test conditions max unit input capacitance c in a, ce , we , oe , lb , ub v in = 0v 5 pf i/o capacitance c i/o i/o v in = v out = 0v 7 pf
as7c513 as7c3513 ? 5/17/01; v.1.1 alliance semiconductor p. 4 of 10 read cycle (over the operating range) 3,9 key to switching waveforms read waveform 1 (address controlled) 3,6,7,9 read waveform 2 (ce , oe , ub, lb controlled) 3,6,8,9 parameter symbol -12 -15 -20 unit notes minmaxminmaxminmax read cycle time t rc 12 ? 15 ? 20 ? ns address access time t aa ?12?15?20ns3 chip enable (ce ) access time t ace ?12?15?20ns3 output enable (oe ) access time t oe ?6?7?8ns output hold from address change t oh 3?4?4?ns5 ce low to output in low z t clz 0 ? 0 ? 0 ? ns 4, 5 ce high to output in high z t chz ?6?7?8ns4, 5 oe low to output in low z t olz 0 ? 0 ? 0 ? ns 4, 5 byte select access time t ba ?6?7?8ns byte select low to low z t blz 0 ? 0 ? 0 ? ns 4,5 byte select high to high z t bhz ?6?7?9ns4,5 oe high to output in high z t ohz ?6?7?9ns4, 5 power up time t pu 0 ? 0 ? 0 ? ns 4, 5 power down time t pd ?12?15?20ns4, 5 undefined output/don?t care falling input rising input t oh t aa t rc t oh data out address data valid previous data valid data valid t rc t aa t blz t ba t oe t olz t oh t ohz t hz t bhz t ace t lz address oe ce lb , ub data out
? as7c513 as7c3513 5/17/01; v.1.1 alliance semiconductor p. 5 of 10 write cycle (over the operating range) 11 write waveform 1(we controlled) 10,11 write waveform 2 (ce controlled) 10,11 parameter symbol -12 -15 -20 unit notes min max min max min max write cycle time t wc 12 ? 15 ? 20 ? ns chip enable (ce ) to write end t cw 9 ? 10 ? 12 ? ns address setup to write end t aw 8 ? 10 ? 12 ? ns address setup time t as 0?0?0? ns write pulse width t wp 8 ? 10 ? 12 ? ns address hold from end of write t ah 0?0?0? ns data valid to write end t dw 6?8?10? ns data hold time t dh 0?0?0? ns 5 write enable to output in high z t wz ?6?7?9 ns 4, 5 output active from write end t ow 3?3?3? ns 4, 5 byte select low to end of write t bw 8?9?12? ns address lb , ub we data in data out t wc t bw t aw t as t wp t dw t dh t ow t wz data undefined high-z data valid address ce lb , ub we data in t wc t cw t bw t wp t dw t dh t ow t wz t ah data out data undefined high-z high-z t as t aw data valid t clz
as7c513 as7c3513 ? 5/17/01; v.1.1 alliance semiconductor p. 6 of 10 ac test conditions notes 1during v cc power-up, a pull-up resistor to v cc on ce is required to meet i sb specification. 2 this parameter is sampled, but not 100% tested. 3 for test conditions, see ac test conditions , figures a, b, and c. 4 these parameters are specified with c l = 5pf, as in figures b or c. transition is measured 500mv from steady-state voltage. 5 this parameter is guaranteed, but not 100% tested. 6we is high for read cycle. 7ce and oe are low for read cycle. 8 address valid prior to or coincident with ce transition low. 9 all read cycle timings are referenced from the last valid address to the first transitioning address. 10 ce or we must be high during address transitions. either ce or we asserting high terminates a write cycle. 11 all write cycle timings are referenced from the last valid address to the first transitioning address. 12 not applicable. 13 c=30pf, except on high z and low z parameters, where c=5pf. 350 ? c (14) 320 ? d out gnd +3.3v figure c: 3.3v output load - output load: see figure b or figure c. - input pulse level: gnd to 3.0v. see figure a. - input rise and fall times: 2 ns. see figure a. - input and output timing reference levels: 1.5v. 168 ? thevenin equivalent: d out +1.728v (5v and 3.3v) 255 ? c (14) 480 ? d out gnd +5v figure b: 5v output load 10% 90% 10% 90% gnd +3.0v figure a: input pulse 2 ns
? as7c513 as7c3513 5/17/01; v.1.1 alliance semiconductor p. 7 of 10 typical dc and ac characteristics supply voltage (v) min max nominal 0.0 0.2 0.6 0.8 0.4 1.0 1.2 1.4 normalized i cc , i sb normalized supply current i cc , i sb ambient temperature (c) ?55 80 125 35 ?10 0.0 0.2 0.6 0.8 0.4 1.0 1.2 1.4 normalized i cc , i sb normalized supply current i cc , i sb vs. ambient temperature t a vs. supply voltage v cc i cc i sb i cc i sb ambient temperature (c) -55 80 125 35 -10 0.2 1 0.04 5 25 625 normalized i sb1 (log scale) normalized supply current isb1 vs. ambient temperature t a v cc = v cc (nominal) supply voltage (v) min max nominal 0.8 0.9 1.1 1.2 1.0 1.3 1.4 1.5 normalized access time normalized access time t aa ambient temperature (c) ?55 80 125 35 ?10 0.8 0.9 1.1 1.2 1.0 1.3 1.4 1.5 normalized access time normalized access time t aa cycle frequency (mhz) 075 100 50 25 0.0 0.2 0.6 0.8 0.4 1.0 1.2 1.4 normalized i cc normalized supply current i cc vs. ambient temperature t a vs. cycle frequency 1/t rc , 1/t wc vs. supply voltage v cc v cc = v cc (nominal) t a = 25c v cc = v cc (nominal) t a = 25c output voltage (v) v cc 0 20 60 80 40 100 120 140 output source current (ma) output source current i oh output voltage (v) v cc output sink current (ma) output sink current i ol vs. output voltage v ol vs. output voltage v oh 0 20 60 80 40 100 120 140 v cc = v cc (nominal)pl t a = 25c v cc = v cc (nominal) t a = 25c capacitance (pf) 0 750 1000 500 250 0 5 15 20 10 25 30 35 change in t aa (ns) typical access time change ? t aa vs. output capacitive loading v cc = v cc(nominal) 00
? as7c513 as7c3513 5/17/01; v.1.1 alliance semiconductor p. 8 of 10 package dimensions 44-pin tsop 2 min (mm) max (mm) a1.2 a 1 0.05 a 2 0.95 1.05 b0.250.45 c 0.15 (typical) d 18.28 18.54 e 10.06 10.26 h e 11.56 11.96 e 0.80 (typical) l0.400.60 d h e 1234567891011121314 44 43 42 41 40 39 38 37 36 35 34 33 32 31 15 16 30 29 17 18 19 20 28 27 26 25 c l a 1 a 2 e 44-pin tsop 2 0?5 21 24 22 23 e a b 44-pin soj 400 mil min max a 0.128 0.148 a1 0.025 - a2 1.105 1.115 b 0.026 0.032 b 0.015 0.020 c 0.007 0.013 d 1.120 1.130 e 0.370 nom e1 0.395 0.405 e2 0.435 0.445 e0.050 nom e d e1 pin 1 b b a1 a2 c e2 seating plane e2 a 44-pin soj
? as7c513 as7c3513 5/17/01; v.1.1 alliance semiconductor p. 9 of 10 ? copyright alliance semiconductor corporation. all rights reserved. our three-point logo, our name and intelliwatt are tradema rks or registered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. alliance reserves the right to make changes to this document and its products at any time without notice. alliance assumes no responsibility for any errors that may appear in this document. the data contained herein represents alliance's best data and/or estimates at the time of issuance. al liance reserves the right to change or correct this data at any time, without notice. if the product described herein is under development, significant changes to these specifications are possible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. allianc e does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of alliance pro ducts including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in alliance's terms and condi tions of sale (which are available from alliance). all sales of alliance products are made exclusively according to alliance's terms and conditions of sale. the purchase of products from alliance does not convey a lice nse under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights of alliance or third parties. alliance does not authorize its products for use as critical compone nts in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of alliance products in such life-supporting systems implies tha t the manufacturer assumes all risk of such use and agrees to indemnify alliance against all claims arising from such use ordering codes part numbering system package\access time volt/temp 12 ns 15 ns 20 ns plastic soj, 400 mil 5v commercial as7c513-12jc as7c513-15jc as7c513-20jc 3.3v commercial as7c3513-12jc as7c3513-15jc as7c3513-20jc tsop 2, 18.410.2 mm 5v commercial as7c513-12tc as7c513-15tc as7c513-20tc 3.3v commercial as7c3513-12tc as7c3513-15tc as7c3513-20tc as7c x 513 ?xx x c sram prefix vo l t ag e : blank= 5v cmos 3= 3.3v cmos device number access time package: j = soj 400 mil t=tsop 2 18.410.2 mm c = commercial temperature range: 0 o c to 70 0 c i = industrial temperature range: -40c to 85c
as7c513 as7c3513 ? 5/17/01; v.1.1 alliance semiconductor p. 10 of 10
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