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EL4093C january 1996 rev b EL4093C 300 mhz dc-restored video amplifier note: all information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ``controlled document''. current revisions, if any, to these specifications are maintained at the factory and are available upon your request. we recommend checking the revision level before finalization of your design documentation. ? 1995 elantec, inc. features # high accuracy dc restoration for video # low supply current of 9.5 ma typ. # 300 mhz bandwidth # 1500v/ m s slew rate # 0.04% differential gain and 0.02 differential phase into 150 x for ntsc # 1.5 mv max. restored dc offset # sample and hold amplifier with fast enable and low leakage # ttl-compatible hold logic input applications # input amplifier in video equipment # restoration amplifier in video mixers ordering information part no. temp. range package outline y EL4093Cn -40 cto a 85 c 16-pin p-dip mdp0031 EL4093Cs -40 cto a 85 c 16-lead soic mdp0027 demo board a demo pcb is available for this product. request ``el4093 demo board.'' general description the EL4093C is a complete dc-restored video amplifier subsys- tem, featuring low power consumption and high slew rate. it contains a current feedback amplifier and a sample and hold amplifier designed to stabilize video performance. when the hold logic input is low, the sample and hold may be used as a general purpose op amp to null the dc offset of the video am- plifier. when the hold input goes high the sample and hold stores the correction voltage on the hold capacitor to maintain dc correction during the subsequent video scan line. the sample and hold amplifier contains a current output stage that greatly simplifies its connection to the video amplifier. its high output impedance also helps to preserve video linearity at low supply voltages. for ease of interfacing, the hold input is ttl-compatible. this device has an operational temperature of b 40 cto a 85 c and is packaged in plastic 16-pin dip and 16- lead soic. connection diagram 44093 1
EL4093C 300 mhz dc-restored video amplifier absolute maximum ratings v s v a to v b supply voltage 12.6v v hold voltage at hold input (dgnd b 0.7) to (dgnd a 5.5v) v in voltage at any other input v a to v b d v in difference between sample and hold inputs g 8v i out1 video amplifier output current g 30 ma i out2 s/h amplifier output current g 10 ma i in maximum current into other pins g 6ma p d maximum power dissipation see curves t a operating ambient temperature range b 40 cto a 85 c t j operating junction temperature 150 c t st storage temperature range b 65 cto a 150 c important note: all parameters having min/max specifications are guaranteed. the test level column indicates the specific device testing actually performed during production and quality inspection. elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the ltx77 series system. unless otherwise noted, all tests are pulsed tests, therefore t j e t c e t a . test level test procedure i 100% production tested and qa sample tested per qa test plan qcx0002. ii 100% production tested at t a e 25 c and qa sample tested at t a e 25 c, t max and t min per qa test plan qcx0002. iii qa sample tested per qa test plan qcx0002. iv parameter is guaranteed (but not tested) by design and characterization data. v parameter is typical value at t a e 25 c for information purposes only. open-loop dc electrical characteristics power supplies at g 5v, t a e 25 c parameter description min typ max test units level i s,hold total supply current in hold mode 9.5 11.5 i ma i s,sample total supply current in sample mode 8.5 10.5 i ma video amplifier section (not restored) parameter description min typ max test units level v os input offset voltage 10 110 i mv i b a non-inverting input bias current 10 25 i m a i b b inverting input bias current 15 50 i m a r ol transimpedance v out e g 2.5v, r l e 150 x 150 400 i k x v o output voltage swing g 3 g 3.5 i v r l e 150 x i sc output short-circuit current 60 100 i ma 2 td is 0.7in tab wide td is 1.7in td is 1.7in
EL4093C 300 mhz dc-restored video amplifier open-loop dc electrical characteristics power supplies at g 5v, t a e 25 c e contd. sample and hold section parameter description min typ max test units level v os input offset voltage 0.5 1.5 i mv tcv os average offset voltage drift 6 v m v/ c i b input bias current 1 2 i m a i os input offset current 10 200 i na tci os average offset current drift 0.1 v na/ c v cm common mode input range g 2.5 g 2.8 i v g m transconductance (r l e 500 x ) 5 15 i a/v cmrr common mode rejection ratio (v cm b 2.5v to a 2.5v) 70 90 i db v il hold logic input low (referenced to digital gnd) 0.8 i v v ih hold logic input high (referenced to digital gnd) 2.0 i v v gnd digital gnd reference voltage (v b )(v a ) b 4.0 i v i droop hold mode droop current 10 70 i na i charge charge current available to c hold g 5.5 g 8.5 i ma v o output voltage swing (r l e 10k x ) g 3 g 3.5 i v i o output current swing (r l e 0 x ) g 4.5 g 5.5 i ma closed-loop ac electrical characteristics power supplies at g 5v, t a e 25 c, r f e r g e 750 x ,r l e 150 x ,c l e 5 pf, c in b (parasitic) e 1.8 pf video amplifier section parameter description min typ max test units levels bw, b 3db b 3 db small-signal bandwidth 300 v mhz bw, g 0.1 db 0.1 db flatness bandwidth 50 v mhz peaking frequency response peaking 0 v db sr slew rate, v out between b 2v and a 2v 1500 v v/ m s dg differential gain error, voffset between b 714 mv and a 714 mv 0.04 v % d i differential phase error, voffset between b 714 mv and a 714 mv 0.02 v 3 td is 1.5in td is 1.5in
EL4093C 300 mhz dc-restored video amplifier closed-loop ac electrical characteristics power supplies at g 5v, t a e 25 c, r f e r g e 750 x ,r l e 150 x ,c l e 5 pf, c hold e 2.2 nf sample and hold section parameter description min typ max test units levels d i step change in sample to hold output current due to hold step 0.1 v m a d t sh sample to hold delay time 15 v ns d t hs hold to sample delay time 40 v ns t ac settling time to 1% (dc restored amplifier output) 2.2 v m s video amplifier input from 0 to 1v typical application 44093 2 4 td is 1.2in
EL4093C 300 mhz dc-restored video amplifier typical performance curves response (gain) non-inverting frequency 44093 4 response (phase) non-inverting frequency 44093 5 for various r l frequency response 44093 6 response (gain) inverting frequency 44093 7 response (phase) inverting frequency 44093 8 for various c l frequency response 44093 9 various r f and r g frequency response for 44093 10 for various c in frequency response 44093 11 temperature (video amp) 3 db bandwidth vs 44093 12 5
EL4093C 300 mhz dc-restored video amplifier typical performance curves e contd. (video amp) peaking vs temperature 44093 13 swing vs frequency output voltage 44093 14 distortion vs frequency 2nd and 3rd harmonic 44093 15 noise vs frequency voltage and current 44093 16 vs temperature supply current 44093 17 (video amp, 3 sample) vs die temperature input offset voltage 44093 18 temperature (video amp) input bias current vs 44093 19 temperature (video amp) transimpedance vs 44093 20 6
EL4093C 300 mhz dc-restored video amplifier typical performance curves e contd. (sample & hold, 3 samples) vs die temperature input offset voltage 44093 21 (sample & hold) die temperature input bias current vs 44093 22 temperature (sample & hold) transconductance vs 44093 23 (sample & hold) die temperature transconductance vs 44093 38 temperature (sample & hold) output current swing vs 44093 25 (sample & hold) vs temperature droop current 44093 26 (sample & hold) temperature charge current vs 44093 27 vs temperature hold step ( d i out ) 44093 28 7
EL4093C 300 mhz dc-restored video amplifier typical performance curves e contd. voltage at 3.58 mhz phase vs dc input differential gain and 44093 29 voltage at 3.58 mhz phase vs dc input differential gain and 44093 30 temperature (video amp) slew rate vs die 44093 31 small-signal step response 44093 32 large-signal step response 44093 33 (video amp) settling accuracy settling time vs 44093 34 16-pin p-dip package vs ambient temperature, maximum power dissipation 44093 35 16-pin so package vs ambient temperature, maximum power dissipation 44093 36 8
EL4093C 300 mhz dc-restored video amplifier applications information product description the EL4093C is a high speed dc-restore system containing a current feedback amplifier (cfa) and a sample & hold (s/h) amplifier. the cfa offers a wide 3 db bandwidth of 300 mhz and a slew rate of 1500 v/ m s, making it ideal for high speed video applications such as svga. the cfa's excellent differential gain and phase at 3.58 mhz also makes it suitable for ntsc appli- cations. drawing only 9.5 ma on g 5v supplies, the EL4093C serves as an excellent choice for those applications requiring both low power and high bandwidth. the connection between the cfa and sample & hold (the autozero interface) has been greatly simplified. the output of the sample & hold is a high impedance current source, allowing direct connection to the cfa inverting input for au- tozero purposes. in addition, special circuitry within the sample & hold provides a charge cur- rent of 8.5 ma in sample mode, resulting in a sample hold current ratio (ratio of charging cur- rent to droop current) of approx. 1,000,000. theory of operation in video applications, dc restoration moves the backporch or black level to a fixed dc reference. the EL4093C uses a cfa in feedback with a sample & hold to provide dc restoration. figure 1 shows how the two are connected to provide this function; the s/h compares the output of the cfa to a dc reference, and any difference between them causes an output current from the s/h. this ``autozero'' current is fed to the cfa inverting input, the effect of which is to move the cfa output towards the reference voltage. this autozero mechanism settles when the cfa out- put is one v os away from the reference (the v os here refers to the s/h offset voltage). 44093 3 figure 1 the autozero mechanism is typically active for only a short period of each video line. figure 2 shows a ntsc video signal along with the el4581c back porch output. the back porch sig- nal is used to drive the hold input of the EL4093C, and we see that the EL4093C is in sample mode for only 3.5 m s of each line. it is during this time that the autozero mechanism at- tempts to drive the cfa output towards the ref- erence voltage, at the same time putting a correc- tion voltage onto the hold capacitor c hold . during the rest of the line (60 m s) the EL4093C is in hold mode, but dc correction is maintained by the voltage on c hold . 44093 37 figure 2 9
EL4093C 300 mhz dc-restored video amplifier applications information e contd. power supply bypassing and printed circuit board layout as with any high frequency device, good printed circuit board layout is necessary for optimum performance. ground plane construction is high- ly recommended. lead lengths should be as short as possible. the power supply pins must be well bypassed to reduce the risk of oscillation. in the EL4093C there are two sets of supply pins: v a 1/v b 1 provide power for the cfa, and v a 2/v b 2 are for the s/h amplifier. good per- formance can be achieved using only one set of bypass capacitors, although they must be close to the v a 1/v-1 pins since that is where the high frequency currents flow. the combination of a 4.7 m f tantalum capacitor in parallel with a 0.01 m f capacitor has been shown to work well. chip capacitors are recommended for the 0.01 m f bypass to minimize lead inductance. for good ac performance, parasitic capacitance should be kept to a minimum, especially at the cfa inverting input. ground plane construction should be used, but it should be removed from the area near the inverting input to minimize any stray capacitance at that node. chip resistors are recommended for r f and r g , and use of sockets should be avoided if possible. sockets add para- sitic inductance and capacitance which will result in some additional peaking and overshoot. if the cfa is configured for non-inverting gain, then one should also pay attention to the trace leading to the a input. the inductance of a long trace ( l 3'') can form a resonant network with the amplifier input, resulting in high frequency oscillations around 700 mhz. in such cases a 50 x 100 x series resistor placed close to the a in- put would isolate this inductance and damp out the resonance. capacitance at the inverting input any manufacturer's high-speed voltage or cur- rent feedback amplifier can be affected by stray capacitance at the inverting input. for inverting gains this parasitic capacitance has little effect because the inverting input is a virtual ground, but for non-inverting gains this capacitance (in conjunction with the feedback and gain resistors) creates a pole in the feedback path of the amplifi- er. this pole, if low enough in frequency, has the same destabilizing effect as a zero in the forward open-loop response. hence it is important to min- imize the stray capacitance at this node by re- moving the nearby ground plane. in addition, since the s/h output connects to this node, it is important to minimize the trace capacitance. good practice here would be to connect the two pins with a short trace directly underneath the chip. feedback resistor values the EL4093C has been optimized for a gain of a 2 with r f e 750 x . this value of feedback re- sistor give sa3db bandwidth of 300 mhz at a gain of a 2 driving a 150 x load. since the ampli- fier inside the EL4093C uses current mode feed- back, it is possible to change the value of r f to adjust the bandwidth. shown in the table below are optimum feedback resistor values for differ- ent closed loop gains. gain optimum rf bw (mhz) peaking (db) a 1 910 314 0.2 a 2 750 300 0 a 5 470 294 0.2 b 1 680 300 0 autozero interface the autozero interface refers to the connection between the s/h output and the cfa inverting input. this interface has been greatly simplified compared to that of the el2090c, in that the s/h output is a high impedance current source. the s/h output can be connected directly to the inverting input, and its high impedance greatly reduces the interaction between the sample & hold and the gain setting resistors. another vir- tue of this interface is better gain linearity as the autozero current changes. for example, at an au- tozero current of 0 ma the output impedance is about 5 m x , dropping to 1 m x as the autozero current increases to 3 ma. using r f e r g e 750 x , the closed loop gain changes only by 0.025% in this interval. 10
EL4093C 300 mhz dc-restored video amplifier applications information e contd. autozero range the autozero range is defined as the difference between the input dc level and the reference voltage to restore to. the size of this range is a function of the gain setting resistors used and the s/h output current swing. for a gain of a 2 the optimum feedback resistor is 750 x , and the avail- able s/h output current is g 5.5 ma minimum. to determine the autozero range for this case, we refer to figure 3 below. 4093 39 figure 3 suppose that the input dc level is a v dc , and that the reference voltage is 0v. we know that in feedback, the following two conditions will exist on the cfa: first, its output will be equal to 0v (due to autozero), and second, its v in b voltage is equal to the v in a voltage (i.e. v in be a v dc ). so we have a potential difference of a v dc across both r f and r g , resulting in a cur- rent i rf e i rg e v dc /750 x that must flow into each of them. this current i az e (i rf a i rg ) must come from the s/h output. since the maximum that i az can be is 5.5 ma, we can solve for v dc using the following: i az e g 5.5 ma e 2 # v dc 750 x j and see that v dc e g 2v. this range can easily accommodate most video signals. as another example, consider the case where we are restoring to a reference voltage of a 0.75v. using the same reasoning as above, a current i rf e (v dc b 0.75v)/r f must flow through r f , and a current i rg e v dc /r g must go into r g . again, our boundary condition is that i rf a i rg s g 5.5 ma, and we can solve for the allowable v dc values using the following: g 5.5 ma e v dc b 0.75v 750 x a v dc 750 x hence v dc must be between a 2.4v to b 1.7v. this example illustrates that when the reference changes, the autozero range also changes. in gen- eral, the user should determine the autozero range for his/her application, and ensure that the input signal is within this range during the au- tozero period. autozero loop bandwidth the gain-bandwidth product (gbwp) of the au- tozero loop is determined by the size of the hold capacitor, the value of r f , and the transconduct- ances (gm's) of the s/h amplifier. to begin, the s/h amplifier is modeled as in figure 4 below. first, the input stage transconductance is repre- sented by gm1, with the compensation capacitor given by c hold . this stage's gbwp is thus gm1/(2 q # c hold ) e 1/(2 q # (350 x )(2.2 nf)) e 207 khz. next, since the s/h has a current output, its output stage can be modeled as a transconductance gm2, in this case having a val- ue of 1/(500 x ). the current from gm2 then flows through the i to v converter made up of the cfa and r f to produce a voltage gain. thus the gbwp of the overall loop is given by: gbwp e gm1 2 q # c hold (gm2 # r f ) 11
EL4093C 300 mhz dc-restored video amplifier applications information e contd. 4093 40 figure 4 with r f e 750 x , a gbwp of 310 khz is ob- tained. note however that this is the small signal gbwp. as mentioned earlier, the sample and hold has special boost circuits built in which pro- vides g 8.5 ma of charge current during full slew. these boost circuits turn on when the s/h input differential voltage exceeds g 50 mv. when the boosters are turned on, gm1 greatly increases and the circuit becomes nonlinear. thus some stabili- ty issues are associated with the boosters, and they will be addressed in a later section. charge injection and hold step charge injection refers to the charge transferred to the hold capacitor when switching to the hold mode. the charge should ideally be 0, but due to stray capacitive coupling and other effects, is typically 0.1 pc in the el4093. this charge changes the hold capacitor voltage by d v e d q/ c hold , and this d v is multiplied by the output stage transconductance (gm2) to produce a change in s/h output current. this last quantity is listed as the spec d i step , and is calculated us- ing the following: d i step e # d q c hold j # gm2 for c hold e 2.2 nf and gm2 e 1/(500 x ), d i step has a typical value of 100 na. this change in s/h output current flows through r f , shifting the cfa output voltage. however, as we shall soon see, this shift is negligible. assuming r f e 750 x , d i step is impressed across r f to give (750 x )(100 na) e 0.08 mv of change at the cfa output. droop rate when the s/h amplifier is in hold mode, there is a small current that leaks from the switch into the hold capacitor. this quantity is termed the droop current, and is typically 10 na in the el4093. this droop current produces a ramp in the hold capacitor voltage, which in turn produc- es a similar effect at the cfa output. the droop rate at the cfa output can be found using the equation below: droop e i droop c hold (gm2 # r f ) assuming r f e 750 x and c hold e 2.2 nf, the drift in the cfa output due to droop current is about 7 m v/ m s. recall that in ntsc applica- tions, there is about 60 m s between autozero peri- ods. thus there is 7 m v/ m s)(60 m s) e 0.4 mv, or less than 0.1 ire, of drift over each ntsc scan line. this drift is negligible in most applications. 12
EL4093C 300 mhz dc-restored video amplifier applications information e contd. choice of hold capacitor the el4093 has been designed to work with a hold capacitor of 2.2 nf. with this value of c hold , the droop rate and hold step are negligi- bly small for most applications. in addition, with the special boost circuits inside the s/h, fast ac- quisition is possible even using a hold capacitor of this size. figure 5 below shows the input and output of the dc-restored amplifier while the s/h is in sample mode. applying a a 1v step to the non-inverting input of the cfa, the output of the cfa jumps to a 2v. the s/h, however, then tries to autozero the system by driving the cfa output back to the reference voltage. since the input differential across the s/h is initially a 2v, the boost circuits turn on and supply 8.5 ma of charge current to the hold capacitor. the boost circuit remains on until the cfa out- put has come to within 50 mv of the reference. note that this event took only 320 ns; settling to within 1% of the final value takes another 2 m s. thus for a 1v input step, acquisition takes only one to two ntsc scan lines. 4093 41 figure 5. autozero mechanism restores amplifier output to ground after a 1v step at input a natural question arises as to whether there are other c hold values that can be used. in one di- rection, increasing c hold will further reduce the droop and hold step, but lengthen the acquisition time. since the droop and hold step are already small to begin with, there is no apparent advan- tage to increasing c hold . in the other direction, decreasing c hold would increase the droop and hold step but shorten the acquisition time. there is, however, a caveat to reducing c hold : too small a c hold would cause the autozero loop to oscillate. the reason is that when the s/h boost circuit turns on, the input stage gm increases drastically and the cir- cuit becomes nonlinear. a sufficiently large c hold must be used to suppress the non-lineari- ty and force the loop to settle. for example, it has been found that a c hold of 470 pf results in 1v p-p oscillation around 10 mhz at the cfa output. the minimum recommended value for c hold is 2.2 nf. with this value the loop remains stable over the entire operating temperature range ( b 40 cto a 85 c). the greatest instability oc- curs at low temperatures, where we observe from the performance curves that the s/h gm's, and hence the gbwp, are at their maximum. if the operating range is restricted to room temperature or above, then 1.5 nf is sufficient to keep the loop stable. at this value of c hold the acquisi- tion time reduces to about 1.5 m s. video performance and application although the el4093 is intended for high speed video applications such as svga, it also offers excellent performance for ntsc, with 0.04% dg and 0.02 dp at 3.58 mhz. some application con- siderations, however, are required for handling ntsc signals. referring back to figure 2, recall that typically, the autozero interval lies in the back porch por- tion of video containing the colorburst pulse. when the s/h compares the video to the refer- ence voltage during this period, the colorburst (40 ire p-p ) triggers the s/h boost circuit and prevents the autozero loop from settling. 13
EL4093C 300 mhz dc-restored video amplifier applications information e contd. a remedy for this situation is to attenuate the colorburst before applying it to the s/h input. figure 6 below shows a 3.58 mhz chroma trap which would notch out the colorburst while pre- serving the video dc level. 4093 42 figure 6. colorburst trap for ntsc applications one may be tempted to use a rc lowpass filter to suppress the colorburst, as shown in figure 7 be- low. this technique, however, poses several prob- lems. first, to obtain enough attenuation, we need to set the pole frequency 10 to 20 times low- er than 3.58 mhz. this pole, being close to the auto zero loop pole, would destabilize the system and cause the loop to oscillate. 4093 43 figure 7. caution: lowpass filter does not work in ntsc applications although we can cancel this pole by introducing a zero, the rc network introduces a time delay between the cfa output and the s/h input. this has undesirable effects in some ntsc applica- tions, as figure 8 below illustrates. there is only 0.6 m s from the rising edge of sync to the color- burst. if we are autozeroing over the back porch, the autozero period would begin somewhere in this 0.6 m s interval. since the edge of sync is now delayed by the rc network, autozero begins be- fore the video back porch reaches its final value. consequently, the autozero loop performs a cor- rection on every line and never settles. 4093 44 figure 8. lowpass filter delays input to sample and hold 14
EL4093C 300 mhz dc-restored video amplifier applications information e contd. if the video does not contain any ac components during the autozero level (e.g. rgb video), then the above networks are not needed and the cfa output can be connected directly to the s/h in- put. power dissipation the el4093 current feedback amplifier has an absolute maximum of g 30 ma output current drive. this is slightly more than the current re- quired to drive g 2v into 75 x . to see how much the junction temperature is raised in this worst case, we refer to the equations below: t jmax e t max a ( i ja # pd max ) where: t max e maximum ambient temperature i ja e thermal resistance of the package pd max e maximum power dissipation of the cfa and s/h amplifier in the pack- age pd max for either the cfa or the s/h amplifier can be calculated as follows: pd max e (2 # v s # i smax ) a (v s b v outmax ) # (v outmax /r l ) where: v s e supply voltage i smax e maximum supply current of amplifier v outmax e maximum output voltage of application r l e load resistance for the el4093, the maximum supply current is 11.5 ma on v s e g 5v. assume that in the worst case, the cfa output swings g 2v into 75 x . since the s/h has a current output, we assume that it is at maximum current swing ( g 5.5 ma) but at a mid-rail output voltage (0v). with the above assumptions, pd max for the el4093 is 223 mw, and using the thermal resistance of a narrow so package (120 c/w), this yields a tem- perature increase of 27 c. since the maximum ambient temperature is 85 c, the resulting junc- tion temperature of 112 c is still below the maxi- mum. please note that there is no short-circuit protec- tion on the el4093 cfa output, and hence the minimum short circuit current (60 ma) is greater than the absolute maximum output current. maintaining the el4093 in this state for more than a few seconds may cause the part to exceed t jmax , in addition to metal migration problems. 15
EL4093C january 1996 rev b EL4093C 300 mhz dc-restored video amplifier general disclaimer specifications contained in this data sheet are in effect as of the publication date shown. elantec, inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. elantec, inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. elantec, inc. 1996 tarob court milpitas, ca 95035 telephone: (408) 945-1323 (800) 333-6314 fax: (408) 945-9305 european office: 44-71-482-4596 warning e life support policy elantec, inc. products are not authorized for and should not be used within life support systems without the specific written consent of elantec, inc. life support systems are equipment in- tended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. users contemplating application of elantec, inc. products in life support systems are requested to contact elantec, inc. factory headquarters to establish suitable terms & conditions for these applications. elantec, inc.'s warranty is limited to replace- ment of defective components and does not cover injury to per- sons or property or other consequential damages. printed in u.s.a. 16

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