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LTC5583 1 5583f typical application features description matched dual-channel 6ghz rms power detector the ltc ? 5583 is a dual-channel rms power detector, capable of measuring two ac signals with wide dynamic range, from C59dbm to 4dbm, depending on frequency. each ac signals power in decibel-scaled value is precisely converted to a dc voltage on a linear scale, independent of the crest factor of the input signal waveforms. the LTC5583 is suitable for precision power measurement and level control for a variety of rf standards, including lte, edge, w-cdma, cdma2000, td-scdma, and wimax. good channel-to-channel isolation is necessary for oper- ating the dual channels simultaneously. for applications where the two input signals are at the same frequency (e.g. measuring vswr), the LTC5583 provides 40db isolation at 2.14ghz even with single-ended inputs. no baluns are needed. when the two input signals are at different frequen- cies, the isolation can be as high as 50db. the isolation can be improved to >55db with differential inputs. the power difference of the two input signals is provided at a difference output pin. each channel also has a fast envelope detector, which tracks the rf input signals en- velope and outputs a voltage directly proportional to the signals instantaneous power. the envelope detectors can be disabled to reduce power consumption. applications n frequency range: 40mhz to 6ghz n linear dynamic range: up to 60db n 0.5db (typ) accuracy over temperature n 40db channel-to-channel isolation at 2ghz even with single-ended rf inputs n matched dual-channel outputs: <1.25db (typ) n single-ended rf inputsno transformer required n accurate rms power measurement of high crest factor modulated waveforms n difference output provides vswr measurement n fast envelope detector outputs n fast response time: 140ns rise time n small 4mm 4mm qfn24 package n vswr monitor n mimo transmit power control n basestation pa control n transmit and receive gain control n rf instrumentation l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 7262661, 7317357, 7622981. 5583 bd LTC5583 enva in + ain C a in + bin C b envelope detect rms detect envb envelope detect rms detect inv v oa v odf v ob v os C + difference amplifier input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 ta01b 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b output voltage and linearity error vs rf input power, 2140mhz cw inputs, single-ended drive block diagram www.datasheet.in
LTC5583 2 5583f pin configuration absolute maximum ratings supply voltage .........................................................3.8v enable voltage ................................ C0.3v to v cc + 0.3v v os voltage ..................................... C0.3v to v cc + 0.3v inv voltage ............................................... C0.3v to 3.6v input signal power (single-ended, 50) .............18dbm input signal power (differential, 50) .................24dbm t jmax .................................................................... 125c operating temperature range .................C40c to 85c storage temperature range .................. C65c to 125c (note 1) 24 23 22 21 20 19 7 8 9 top view 25 gnd uf package 24-lead (4mm s 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 deca v cca v ccr en v ccb decb v oa rt1 v odf v os rt2 v ob in + a in C a rp1 flta enva v ccn in + b in C b rp2 fltb envb inv t jmax = 125c, ja = 37c/w exposed pad (pin 25) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range LTC5583iuf#pbf LTC5583iuf#trpbf 5583 24-lead (4mm 4mm) plastic qfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ www.datasheet.in
LTC5583 3 5583f electrical characteristics the l denotes the specifications which apply over the full operating temperature range, C40c to 85c, otherwise specifications are at t a = 25c, v cc = 3.3v, en = 3.3v. test circuits are shown in figures 1 and 2 (note 2). parameter conditions min typ max units ac input input frequency range (note 4) 40 to 6000 mhz input impedance differential 400//0.5 //pf f rf = 450mhz (single-ended inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 63 db l 57 db rf input power range cw, 50, 1db linearity error (note 5) C59 to 4 dbm output slope 29.6 mv/db logarithmic intercept (note 3) C78.5 dbm deviation from cw response 11db peak to average ratio (3-carrier cdma2k) 12db peak to average ratio (4-carrier wcdma) 0.7 0.4 db db input a to input b isolation single-ended inputs 77 db lnput a to output b isolation input b to output a isolation single-ended inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 50 >55 >55 db db db f rf = 880mhz (single-ended inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 61 db l 56 db rf input power range cw, 50, 1db linearity error (note 5) C58 to 3 dbm output slope 29.7 mv/db logarithmic intercept (note 3) C77.8 dbm deviation from cw response 11db peak to average ratio (3-carrier cdma2k) 12db peak to average ratio (4-carrier wcdma) 0.7 0.4 db db input a to input b isolation single-ended inputs 68 db input a to output b isolation input b to output a isolation single-ended inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 41 52 51 db db db f rf = 2140mhz (single-ended inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 50 60 db l 55 db rf input power range cw, 50, 1db linearity error (note 5) C58 to 2 dbm output slope 26 29.6 34 mv/db logarithmic intercept (note 3) C90 C77.4 C64 dbm channel mismatch input power = 0dbm to both channels <1.25 db deviation from cw response 11db peak to average ratio (3-carrier cdma2k) 12db peak to average ratio (4- carrier wcdma) 0.6 0.3 db db input a to input b isolation single-ended inputs 54 db input a to output b isolation input b to output a isolation single-ended inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 40 52 51 db db db differential inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz >55 >55 >55 db db db www.datasheet.in
LTC5583 4 5583f parameter conditions min typ max units f rf = 2700mhz (single-ended inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 59 db l 52 db rf input power range cw, 50, 1db linearity error (note 5) C56 to 3 dbm output slope 30.0 mv/db logarithmic intercept (note 3) C74.9 dbm deviation from cw response 12db peak to average ratio (wimax ofdm) 0.6 db input a to input b isolation single-ended inputs 52 db lnput a to output b isolation input b to output a isolation singled-ended inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 33 45 44 db db db differential inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 50 >55 >55 db db db f rf = 3600mhz (differential inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 56 db l 49 db rf input power range cw, 50, 1db linearity error (note 5) C53 to 3 dbm output slope 30.2 mv/db logarithmic intercept (note 3) C73.1 dbm deviation from cw response 12db peak to average ratio (wimax ofdm) 0.4 db input a to input b isolation differential inputs 70 db lnput a to output b isolation input b to output a isolation differential inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 47 >55 >55 db db db f rf = 5800mhz (differential inputs) linear dynamic range cw, 50, 1db linearity error (note 5) 49 db l 44 db rf input power range cw, 50, 1db linearity error (note 5) C44 to 5 dbm output slope 31.3 mv/db logarithmic intercept (note 3) C63.2 dbm deviation from cw response 12db peak to average ratio (wimax ofdm) 0.5 db input a to input b isolation differential inputs 50 db lnput a to output b isolation input b to output a isolation differential inputs frequency separation = 0hz (notes 6, 7) frequency separation = 1mhz frequency separation = 10mhz 30 42 41 db db db output interface v oa , v ob output dc voltage no rf signal present 0.45 v output impedance 50 i out source/sink 5/5 ma rise time, 10% to 90% 0.5v to 2.2v, f rf = 100mhz, c fltra = c fltrb = 8.2nf 140 ns fall time, 90% to 10% 2.2v to 0.5v, f rf = 100mhz, c fltra = c fltrb = 8.2nf 3.5 s electrical characteristics the l denotes the specifications which apply over the full operating temperature range, C40c to 85c, otherwise specifications are at t a = 25c, v cc = 3.3v, en = 3.3v. test circuits are shown in figures 1 and 2 (note 2). www.datasheet.in
LTC5583 5 5583f parameter conditions min typ max units v odf output dc voltage no rf signal present, v os = 0v 0.05 v output impedance 5 i out source/sink 5/5 ma rise time, 10% to 90% 50mv to 1.8v, f rf = 100mhz, c fltra = c fltrb = 8.2nf 170 ns fall time, 90% to 10% 1.8v to 50mv, f rf = 100mhz, c fltra = c fltrb = 8.2nf 3.5 s enva envb output dc voltage no rf signal present 2.15 v output impedance 140 i out source/sink 4.0/1.8 ma rise time, 10% to 90% 0.9v to 2.1v 11 ns fall time, 90% to 10% 2.1v to 0.9v 11 ns C3db bandwidth 50 mhz control interface en input high voltage l 2v input low voltage l 0.3 v input current applied voltage = 3.3v 100 180 a inv input high voltage 2v input low voltage 1v input current applied voltage = 3.3v 0 a v os input voltage range 0 2.4 v input current applied voltage = 2.4v 77 a power supply supply voltage 3.1 3.3 3.5 v supply current envelope detectors turned off 80.5 100 ma supply current envelope detectors turned on 90.1 ma shutdown current en = 0v, v cc = 3.5v 0.1 10 a electrical characteristics the l denotes the specifications which apply over the full operating temperature range, C40c to 85c, otherwise specifications are at t a = 25c, v cc = 3.3v, en = 3.3v. test circuits are shown in figures 1 and 2 (note 2). note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC5583 is guaranteed functional over the temperature range from C40c to 85c. note 3: logarithmic intercept is an extrapolated input power level from the best-fit log-linear straight line, where the output voltage is 0v. note 4: operation over a wider frequency range is possible with reduced performance. consult the factory for information and assistance. note 5: linearity error is the difference in db between the actual output and the best-fit straight line at 25c (using linear regression between p in = C50dbm and 0dbm for 450mhz, 880mhz, 2140mhz, 2700mhz; between p in = C40dbm and 0dbm for 3600mhz, 5800mhz). the dynamic range is defined as the range of input power over which the linearity error is within 1db. note 6: input a to output b (channel a to channel b) isolation is defined as the ratio of input power levels at the two channels when the interfering channel (channel a with higher power) results in a 1db output deviation in the interfered channel (channel b with lower power) and vice versa. sweep one channel input power level while holding the other channel input at C45dbm for 450mhz, 880mhz, 2140mhz, 2700mhz, 3600mhz, and at C35dbm for 5800mhz. note 7: for frequency separation = 0hz between the two input signals, channel-to-channel isolation is a function of the phase difference between these two signals. the worst-case isolation is assumed. www.datasheet.in
LTC5583 6 5583f typical performance characteristics logarithmic intercept vs frequency slope distribution vs temperature 2140mhz cw input intercept distribution vs temperature 2140mhz cw input output voltage vs rf input power cw input at various frequencies linearity error vs rf input power cw input at various frequencies slope vs frequency v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. test circuits shown in figures 1 and 2. input power (dbm) C70 0.2 v oa , v ob (v) 0.6 1.0 1.4 1.8 2.2 2.6 C50 C30 C10 C60 C40 C20 0 5583 g01 10 450mhz, cha 880mhz, cha 2140mhz, cha 2700mhz, cha 3600mhz, cha 5800mhz, cha 450mhz, chb 880mhz, chb 2140mhz, chb 2700mhz, chb 3600mhz, chb 5800mhz, chb input power (dbm) C70 C3 linearity error (db) C2 C1 0 1 2 3 C50 C30 C10 C60 C40 C20 0 5583 g02 10 450mhz, cha 880mhz, cha 2140mhz, cha 2700mhz, cha 3600mhz, cha 5800mhz, cha 450mhz, chb 880mhz, chb 2140mhz, chb 2700mhz, chb 3600mhz, chb 5800mhz, chb frequency (ghz) 0 27 slope (mv/db) 28 29 30 31 32 33 24 135 5583 g03 6 85c C40c 25c frequency (ghz) 0 C83 intercept (dbm) C79 C75 C71 C67 C63 C59 24 135 5583 g04 6 C40c 25c 85c slope (mv/db) 0 percentage distribution (%) 10 20 5 15 25 30 35 40 45 29.7 28.5 29.1 5583 g05 30.3 30.9 85c 25c C40c logarithmic intercept (dbm) 0 percentage distribution (%) 10 20 5 15 25 30 35 C79 C83 C81 5583 g06 C77 C75 C73 C71 85c 25c C40c www.datasheet.in
LTC5583 7 5583f typical performance characteristics modulation deviation vs rf input power, 880mhz inputs, single-ended drive channel matching vs rf input power, 880mhz cw inputs, single-ended drive, 5 devices input a to output b isolation, input b to output a isolation, 880mhz cw inputs, single-ended drive output voltage and linearity error vs rf input power, 880mhz cw inputs, single-ended drive output voltage and linearity error vs rf input power, 880mhz cw inputs, single-ended drive, 5 devices v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. for temperature compensation of logarithmic intercept at 880mhz, set r p1 = open, r p2 = 0, r t1 = 11.5k, r t2 = 1.13k. see figure 1. difference output and linearity error vs rf input power, 880mhz cw inputs, single-ended drive input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g07 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b input power (dbm) C65 0 v odf (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g08 5 sweep ch a input hold ch b input = C26dbm 85c 25c C40c sweep ch b input hold ch a input = C26dbm v os = 1.2v, inv = 0v input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g09 5 85c 25c C40c input power (dbm) C65 C3 linearity error (db) C2 C1 0 1 2 3 C35 C15 C5 C45 C55 C25 5583 g10 5 3-carrier cdma2k deviation measured from linear reference generated with cw input. 4-carrier wcdma cw input power (dbm) C65 C3 v oa C v ob (db) v oa C v ob (v) C2 C1 1 0 2 3 C0.09 C0.06 C0.03 0 0.03 0.06 0.09 C45 C25 C5 C55 C35 C15 5583 g11 5 85c 25c C40c interfering channel input power (dbm) C45 0 interfered channel output deviation (db) 0.5 1.5 1.0 2.0 2.5 C25 C5 C35 C15 5583 g12 5 a m b indicates: ch a = interfering channel ch b = interfered channel b m a indicates: ch b = interfering channel ch a = interfered channel interfered channel input = C45dbm, interfering channel input swept freq sep = frequency separation between ch a input and ch b input a m b, freq sep = 0hz b m a, freq sep = 0hz a m b, freq sep = 1mhz b m a, freq sep = 1mhz a m b, freq sep = 10mhz b m a, freq sep = 10mhz note 7 www.datasheet.in
LTC5583 8 5583f typical performance characteristics output voltage and linearity error vs rf input power, 2140mhz cw inputs, single-ended drive difference output and linearity error vs rf input power, 2140mhz cw inputs, single-ended drive output voltage and linearity error vs rf input power, 2140mhz cw inputs, single-ended drive, 5 devices modulation deviation vs rf input power, 2140mhz inputs, single-ended drive channel matching vs rf input power, 2140mhz cw inputs, single-ended drive, 5 devices input a to output b isolation, input b to output a isolation, 2140mhz cw inputs, single-ended drive v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. for temperature compensation of logarithmic intercept at 2140mhz, set r p1 = open, r p2 = 0, r t1 = 9.76k, r t2 = 1.1k. see figure 1. input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g13 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b input power (dbm) C65 0 v odf (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g14 5 sweep ch a input hold ch b input = C26dbm 85c 25c C40c sweep ch b input hold ch a input = C26dbm v os = 1.2v, inv = 0v input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g15 5 85c 25c C40c input power (dbm) C65 C3 linearity error (db) C2 C1 0 1 2 3 C35 C15 C5 C45 C55 C25 5583 g16 5 cw 3-carrier cdma2k 4-carrier wcdma deviation measured from linear reference generated with cw input. input power (dbm) C65 C3 v oa C v ob (db) v oa C v ob (v) C2 C1 1 0 2 3 C0.09 C0.06 C0.03 0 0.03 0.06 0.09 C45 C25 C5 C55 C35 C15 5583 g17 5 85c 25c C40c interfering channel input power (dbm) C45 0 interfered channel output deviation (db) 0.5 1.5 1.0 2.0 2.5 C25 C5 C35 C15 5583 g18 5 a m b indicates: ch a = interfering channel ch b = interfered channel b m a indicates: ch b = interfering channel ch a = interfered channel interfered channel input = C45dbm, interfering channel input swept freq sep = frequency separation between ch a input and ch b input note 7 a m b, freq sep = 0hz b m a, freq sep = 0hz a m b, freq sep = 1mhz b m a, freq sep = 1mhz a m b, freq sep = 10mhz b m a, freq sep = 10mhz www.datasheet.in
LTC5583 9 5583f typical performance characteristics modulation deviation vs rf input power, 2700mhz inputs, single-ended drive channel matching vs rf input power, 2700mhz cw inputs, single-ended drive, 5 devices input a to output b isolation, input b to output a isolation, 2700mhz cw inputs, single-ended drive output voltage and linearity error vs rf input power, 2700mhz cw inputs, single-ended drive difference output and linearity error vs rf input power, 2700mhz cw inputs, single-ended drive output voltage and linearity error vs rf input power, 2700mhz cw inputs, single-ended drive, 5 devices v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. for temperature compensation of logarithmic intercept at 2700mhz, set r p1 = open, r p2 = 0, r t1 = 8.87k, r t2 = 1.21k. see figure 1. input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g19 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b input power (dbm) C65 0 v odf (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g20 5 85c 25c C40c sweep ch a input hold ch b input = C25dbm sweep ch b input hold ch a input = C25dbm v os = 1.2v, inv = 0v input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g21 5 85c 25c C40c input power (dbm) C65 C3 linearity error (db) C2 C1 0 1 2 3 C35 C15 C5 C45 C55 C25 5583 g22 5 cw wimax deviation measured from linear reference generated with cw input. input power (dbm) C65 C3 v oa C v ob (db) v oa C v ob (v) C2 C1 1 0 2 3 C0.09 C0.06 C0.03 0 0.03 0.06 0.09 C45 C25 C5 C55 C35 C15 5583 g23 5 85c 25c C40c interfering channel input power (dbm) C45 0 interfered channel output deviation (db) 0.5 1.5 1.0 2.0 2.5 3.5 3.0 4.0 4.5 5.0 C25 C5 C35 C15 5583 g24 5 a m b indicates: ch a = interfering channel ch b = interfered channel b m a indicates: ch b = interfering channel ch a = interfered channel interfered channel input = C45dbm, interfering channel input swept freq sep = frequency separation between ch a input and ch b input a m b, freq sep = 0hz b m a, freq sep = 0hz a m b, freq sep = 1mhz b m a, freq sep = 1mhz a m b, freq sep = 10mhz b m a, freq sep = 10mhz note 7 www.datasheet.in
LTC5583 10 5583f typical performance characteristics modulation deviation vs rf input power, 3600mhz inputs, differential drive channel matching vs rf input power, 3600mhz cw inputs, differential drive, 3 devices input a to output b isolation, input b to output a isolation, 3600mhz cw inputs, differential drive output voltage and linearity error vs rf input power, 3600mhz cw inputs, differential drive difference output and linearity error vs rf input power, 3600mhz cw inputs, differential drive output voltage and linearity error vs rf input power, 3600mhz cw inputs, differential drive, 3 devices v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. for temperature compensation of logarithmic intercept at 3600mhz, set r p1 = open, r p2 = 0, r t1 = 10.2k, r t2 = 1.65k. see figure 2. input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g25 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b input power (dbm) C65 0 v odf (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g26 5 sweep ch b input hold ch a input = C25dbm sweep ch a input hold ch b input = C25dbm 85c 25c C40c v os = 1.2v, inv = 0v input power (dbm) C65 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C55 C35 C15 5583 g27 5 85c 25c C40c input power (dbm) C65 C3 linearity error (db) C2 C1 0 1 2 3 C35 C15 C5 C45 C55 C25 5583 g28 5 cw wimax deviation measured from linear reference generated with cw input. input power (dbm) C65 C3 v oa C v ob (db) v oa C v ob (v) C2 C1 1 0 2 3 C0.09 C0.06 C0.03 0 0.03 0.06 0.09 C45 C25 C5 C55 C35 C15 5583 g29 5 85c 25c C40c interfering channel input power (dbm) C45 0 interfered channel output deviation (db) 0.5 1.5 1.0 2.0 2.5 C25 C5 C35 C15 5583 g30 5 a m b indicates: ch a = interfering channel ch b = interfered channel b m a indicates: ch b = interfering channel ch a = interfered channel interfered channel input = C45dbm, interfering channel input swept freq sep = frequency separation between ch a input and ch b input note 7 a m b, freq sep = 0hz b m a, freq sep = 0hz a m b, freq sep = 1mhz b m a, freq sep = 1mhz a m b, freq sep = 10mhz b m a, freq sep = 10mhz www.datasheet.in
LTC5583 11 5583f typical performance characteristics output voltage and linearity error vs rf input power, 5800mhz cw inputs, differential drive difference output and linearity error vs rf input power, 5800mhz cw inputs, differential drive output voltage and linearity error vs rf input power, 5800mhz cw inputs, differential drive, 3 devices modulation deviation vs rf input power, 5800mhz inputs, differential drive channel matching vs rf input power, 5800mhz cw inputs, differential drive, 3 devices input a to output b isolation, input b to output a isolation, 5800mhz cw inputs, differential drive v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. for temperature compensation of logarithmic intercept at 5800mhz, set r p1 = open, r p2 = 0, r t1 = 10k, r t2 = 1.47k. see figure 2. input power (dbm) C55 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 5583 g31 10 C45 C25 C5 C35 C15 5 85c, ch a 85c, ch b 25c, ch a 25c, ch b C40c, ch a C40c, ch b input power (dbm) C55 0 v odf (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C35 C15 5583 g32 10 5 sweep ch a input hold ch b input = C20dbm 85c 25c C40c sweep ch b input hold ch a input = C20dbm v os = 1.2v, inv = 0v input power (dbm) C55 0 v oa , v ob (v) linearity error (db) 0.5 1.0 1.5 2.0 2.5 C2.5 C2.0 C1.5 C1.0 C0.5 1.0 0.5 0 1.5 2.0 2.5 C45 C25 C5 C35 C15 5583 g33 10 5 85c 25c C40c input power (dbm) C55 C3 linearity error (db) C2 C1 0 1 2 3 C35 C15 C5 C45 C25 5583 g34 10 5 wimax cw deviation measured from linear reference generated with cw input. input power (dbm) C55 C3 v oa C v ob (db) v oa C v ob (v) C2 C1 1 0 2 3 C0.09 C0.06 C0.03 0 0.03 0.06 0.09 C45 C25 C5 C35 C15 5583 g35 10 5 85c 25c C40c interfering channel input power (dbm) C35 0 interfered channel output deviation (db) 0.5 1.5 1.0 2.0 2.5 C25 C5 C30 C15 C20 C10 5583 g36 10 5 0 a m b indicates: ch a = interfering channel ch b = interfered channel b m a indicates: ch b = interfering channel ch a = interfered channel interfered channel input = C35dbm, interfering channel input swept freq sep = frequency separation between ch a input and ch b input a m b, freq sep = 0hz b m a, freq sep = 0hz a m b, freq sep = 1mhz b m a, freq sep = 1mhz a m b, freq sep = 10mhz b m a, freq sep = 10mhz note 7 www.datasheet.in
LTC5583 12 5583f typical performance characteristics output response to rf burst input, 100mhz cw input, c fltra = c fltrb = 1f supply current vs supply voltage envelope detectors disabled supply current vs supply voltage envelope detectors enabled input a to input b isolation, single-ended inputs input a to input b isolation, differential inputs output response to rf burst input, 100mhz cw input, c fltra = c fltrb = 8.2nf frequency (ghz) 0 C90 isolation (db) C80 C70 C60 C50 C40 12 0.5 1.5 2.5 5583 g37 3 frequency (ghz) 2 C90 isolation (db) C80 C70 C60 C50 C40 4 35 2.5 4.5 3.5 5.5 5583 g38 6 time (s) 0 0.2 v oa (v) 0.6 1.0 1.4 1.8 2.6 2.2 3.0 3.4 4 26 15 3789 5583 g39 10 rf burst off input = 0dbm input = C10dbm input = C20dbm input = C30dbm input = C40dbm input = C50dbm rf burst on time (ms) 0 0.2 v oa (v) 0.6 1.0 1.4 1.8 2.6 2.2 3.0 3.4 0.4 0.2 0.6 0.1 0.5 0.3 0.7 0.8 0.9 5583 g40 1 input = 0dbm input = C10dbm input = C20dbm input = C30dbm input = C40dbm input = C50dbm rf burst off rf burst on v cc (v) 3.1 50 i cc (ma) 60 70 80 90 100 3.3 3.2 3.4 5583 g41 3.5 85c 25c C40c v cc (v) 3.1 60 i cc (ma) 70 80 90 100 65 75 85 95 105 110 3.3 3.2 3.4 5583 g42 3.5 85c C40c 25c v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. test circuits shown in figures 1 and 2. www.datasheet.in
LTC5583 13 5583f typical performance characteristics envelope detector output over temperature, 2140mhz input average power = C30dbm envelope detector output over temperature, 2140mhz input average power = C30dbm envelope detector peak output voltage vs crest factor, 2140mhz input supply current vs rf input power, 2140mhz cw inputs to both channels envelope detector output and input signal envelope, 100mhz input average power = C30dbm envelope detector output and input signal envelope, 100mhz input average power = C30dbm input power (dbm) C70 50 i cc (ma) 60 80 70 90 100 C50 C60 C40 C20 C10 C30 0 5583 g43 5 envelope detectors disabled envelope detectors enabled time (s) 0 1.2 enva (v) input signal (v) 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 C0.06 C0.04 C0.02 0 0.02 0.08 0.06 0.04 0.10 0.12 0.14 24 13 5583 g45 5 crest factor = 6 oscilloscope waveform acquired in average mode time (s) 0 1.2 enva (v) input signal (v) 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 C0.06 C0.04 C0.02 0 0.02 0.08 0.06 0.04 0.10 0.12 0.14 24 13 5583 g46 5 crest factor = 10, oscilloscope waveform acquired in average mode time (s) 0 1.80 enva (v) 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 2.25 24 13 5583 g47 5 85c 25c C40c peak crest factor = 6 oscilloscope waveform acquired in average mode time (s) 0 1.80 enva (v) 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 2.25 24 13 5583 g48 5 85c 25c C40c crest factor = 10 oscilloscope waveform acquired in average mode peak peak to average power ratio (crest factor) 1 1.75 enva peak value (v) 1.80 1.85 1.90 1.95 2.00 2.05 2.10 2.15 3 211 45 7 68910 5583 g44 12 C10dbm C20dbm C30dbm C40dbm average input power v cc = 3.3v, en = 3.3v, t a = 25c, unless otherwise noted. test circuits shown in figures 1 and 2. www.datasheet.in
LTC5583 14 5583f pin functions deca, decb (pins 1, 6): input common mode decou- pling pins for channel a and channel b. these pins are internally biased to 1.6v. the input impedance is 1.75k in parallel with a 40pf internal shunt capacitor to ground. the impedance between deca and in + a (or in C a) is 200. the pin can be connected to the center tap of an external balun or to a capacitor to ground. v cca , v ccb , v ccr (pins 2, 5, 3): power supply pins for channel a, channel b, and bias circuits. typical total cur- rent consumption of these pins is 81ma. each of these pins should be bypassed with 1nf and 1f capacitors, placed as close to the ic as possible. en (pin 4): enable input pin. an applied voltage above 2v will activate the bias for the ic. for an applied voltage below 0.3v, the circuit will be shut down (disabled) with a corresponding reduction in power supply current. if the enable function is not required, then this pin can be connected to v cc . the applied voltage to this pin should not exceed v cc by more than 0.3v. rp2 (pin 9): pin for setting polarity of second order output temperature compensation. connect this pin to ground to change the output voltage inversely proportional to ambient temperature. float this pin to change the output voltage proportional to ambient temperature. inv (pin 12): control input pin to invert the polarity of the difference output v odf . rt2 (pin 14): second order output temperature compen- sation pin for both channels. connect this pin to ground to disable. the output voltage will increase or decrease with the ambient temperature by connecting this pin to ground via an off-chip resistor, depending on the polarity set by rp2 pin. v os (pin 15): input pin for setting the dc offset of the difference output v odf . it is recommended to set this dc offset such that v odf does not fall below 100mv. v odf (pin 16): dc difference output. this voltage is equal to the difference of the two channels output voltages, plus a dc offset: v odf = (v oa C v ob ) + v os , if inv pin is held low, (<1v) v odf = (v ob C v oa ) + v os , if inv pin is held high, (>2v) rt1 (pin 17): first order output temperature compen- sation pin for both channels. connect this pin to ground to disable. the output voltage will increase or decrease with the ambient temperature by connecting this pin to ground via an off-chip resistor, depending on the polarity set by rp1 pin. v oa , v ob (pins 18, 13): dc output of channel a and channel b, respectively. v ccn (pin 19): power supply pin for the envelope detec- tors in both channels. typical total current consumption of this pin is 9.6ma. this pin should be bypassed with 1nf and 1f capacitors. connect this pin to ground to disable the envelope detectors. enva, envb (pins 20, 11): envelope detector output pins for channel a and channel b, respectively. each output tracks the input signals rf envelope and outputs a dc voltage directly proportional to the signal power, normal- ized to the average power. flta, fltb (pins 21, 10): connection for an external filter- ing capacitor for channel a and channel b, respectively. a minimum 8nf capacitor is required for stable ac average power measurement. each capacitor should be connected between flta and v cca , and between fltb and v ccb . rp1 (pin 22): pin for setting polarity of first order output temperature compensation. connect this pin to ground to change the output voltage proportional to ambient temperature. float this pin to change the output voltage inversely proportional to ambient temperature. in + a, in C a, in + b, in C b (pins 24, 23, 7, 8): differential rf input signal pins for channel a and channel b. each channel can be driven with a single-ended or differential signal. these pins are internally biased to 1.6v and should be dc-blocked externally. the differential impedance is 400. gnd (exposed pad pin 25): circuit ground return for the entire ic. this must be soldered to the printed circuit board ground plane. www.datasheet.in
LTC5583 15 5583f 5583 f01 flta enva in + a LTC5583 exposed pad 25 deca decb rt1 rp1 en v ccr in C a in + bin C b v cca v ccn v ccb envb rt2 rp2 inv v outa v odf v outb v os fltb 1nf 1nf 1nf c fltrb 100nf 1nf 1nf 1nf 1nf 1nf 1f 0.3pf 0.3pf rf input a 3.3v r1 1 1nf 1nf rf input b 1nf v cc v cc v cc 20pf 20pf 1nf 75 r p2 r p1 20pf 1nf 100pf c fltra 100nf 20pf 1 2 3 4 5 6 18 17 16 15 14 13 789101112 24 23 22 21 20 19 v cc 75 r t2 r t1 100pf test circuits comp value size part number c 20pf 0402 murata grm1555cih200jb01 c 100pf 0402 murata grm1555cih101jdo1b c 1nf 0402 murata grm155r71h102ka01d c 100nf 0402 murata grm155r61a104ka01 c 1f 0402 murata grm155r60j105ke19 r 75 0402 vishay crcw040275r0fked frequency rp1 rp2 rt1 rt2 input return loss 450mhz open 0 11.5k 1.13k 21db 880mhz open 0 11.5k 1.13k 14db 2140mhz open 0 9.76k 1.10k 14db 2700mhz open 0 8.87k 1.21k 14db figure 1. test circuit optimized for 40mhz to 3ghz operation in single-ended input configuration www.datasheet.in
LTC5583 16 5583f test circuits comp value size part number c 20pf 0402 murata grm1555cih200jb01 c 100pf 0402 murata grm1555cih101jd01b c 1nf 0402 murata grm155r71h102ka01d c 100nf 0402 murata grm155r61a104ka01 c 1f 0402 murata grm155r60j105ke19 r 62 0402 vishay crcw040262r0fked figure 2. test circuit optimized for 2ghz to 6ghz operation in differential input configuration 5583 f02 flta enva in + a LTC5583 exposed pad 25 deca decb rt1 rp1 en v ccr in C a in + bin C b v cca v ccn v ccb envb rt2 rp2 inv v outa v odf v outb v os fltb 1nf 1nf 1nf c fltrb 100nf 1nf 1nf 100pf 1nf v cc v cc v cc 3.3v 1nf 1f c fltra 100nf rf input a l1 t2 1:1 t1 1:1 rf input b l2 20pf 1nf 62 62 20pf c2 c1 1nf r1 1 1 2 3 4 5 6 18 17 16 15 14 13 789101112 24 23 22 21 20 19 tdk hhm17xx tdk hhm17xx 1 5 3 2 4 1 5 3 2 4 r p2 r t2 r t1 r p1 v cc 100pf frequency l1, l2 c1, c2 t1, t2 rp1 rp2 rt1 rt2 input return loss 2140mhz 2.7nh 1pf murata ldb212g1005c-001 open 0 9.76k 1.10k 15db 2700mhz 1.5nh x tdk_hhm1710j1 open 0 8.87k 1.21k 15db 3600mhz 1.2nh 0.3pf tdk_hhm1727d1 open 0 10.2k 1.65k 17db 5800mhz short 0.3pf tdk_hhm1733b1 open 0 10.0k 1.47k 11db www.datasheet.in
LTC5583 17 5583f test circuits figure 3. top side of evaluation board for single-ended input configuration www.datasheet.in
LTC5583 18 5583f applications information the LTC5583 is a dual-channel true rms power detector, capable of measuring two rf signals over the frequency range from 40mhz to 6ghz, independent of input wave- forms with different crest factors such as cw, cdma2k, wcdma, lte and wimax signals. up to 60db dynamic range is achieved with very stable output over the full temperature range from C40c to 85c. input sensitivity can be as low as C56dbm up to 2.7ghz even with single- ended 50 input termination. rf inputs the differential rf inputs are internally biased at 1.6v. the differential impedance is about 400. these pins should be dc blocked when connected to ground or other matching components. the LTC5583 can be driven in a single-ended configuration. the single-ended input impedance vs frequency is given in table 1. figure 4 shows the simplified circuit of this single-ended configuration for each channel. the deca pin can be either left floating or ac-coupled to ground via an external capacitor. while the rf signal is applied to the in + a (or in C a) pin, the other pin, in C a (or in + a), should be ac-coupled to ground. by simply terminating the signal side of the inputs with a 75 resistor in front of the ac-blocking capacitor and coupling the other side to ground using a 1nf capacitor, a broadband 50 input match can be achieved with typical input return loss better than 14db from 40mhz to 2.7ghz. at higher rf frequen- cies, additional matching components may be needed. contact ltc applications for more information. table 1. single-ended input impedance frequency (mhz) input impedance () s11 mag angle () 40 207.4 C j15.5 0.613 C2.2 100 193.0 C j34.0 0.599 C5.4 200 188.9 C j56.8 0.611 C8.9 400 151.6 C j68.7 0.576 C15.2 600 127.8 C j62.8 0.530 C19.5 800 107.6 C j66.0 0.513 C26.2 1000 96.1 C j61.5 0.485 C30.3 1200 85.6 C j59.2 0.467 C35.4 1400 76.2 C j57.4 0.455 C41.0 1600 67.7 C j55.0 0.445 C47.1 1800 60.4 C j52.0 0.435 C53.5 2000 54.9 C j48.7 0.423 C59.4 2200 50.3 C j45.6 0.414 C65.2 2400 46.5 C j42.7 0.406 C70.8 2600 43.7 C j39.8 0.396 C76.0 2800 41.6 C j37.0 0.384 C80.8 3000 40.2 C j34.5 0.371 C84.9 3200 39.3 C j32.0 0.356 C88.8 3400 37.8 C j30.1 0.350 C93.1 3600 35.6 C j26.4 0.336 C101.5 3800 35.0 C j23.3 0.314 C107.4 4000 34.4 C j19.8 0.291 C115.0 4200 33.6 C j16.7 0.275 C123.2 4400 32.9 C j14.2 0.264 C130.6 4600 31.7 C j11.1 0.260 C141.0 4800 30.5 C j8.0 0.261 C152.0 5000 29.3 C j5.1 0.268 C162.5 5200 28.0 C j2.1 0.283 C173.0 5400 26.7 + j0.5 0.304 178.4 5600 25.4 + j2.7 0.328 171.7 5800 24.2 + j4.8 0.353 165.8 6000 23.1 + j6.6 0.377 161.1 www.datasheet.in
LTC5583 19 5583f applications information figure 4. single-ended input configuration 5583 f04 LTC5583 in + a deca in C a 1nf 24 23 1 200 200 40pf 20pf 0.3pf r1 75 1nf 20pf 1nf rf input 5583 f05 LTC5583 in + a deca in C a l1 j1 24 23 1 200 200 40pf c5 3 2 4 1 5 c4 1nf r1 62 c6 20pf rf input t1 1:1 tdk hhm17xx figure 5. differential input configuration 5583 f06 matching network cs1 cs1 lm to in + rf input to in C figure 6. single-ended to differential conversion www.datasheet.in
LTC5583 20 5583f applications information the LTC5583 differential inputs can also be driven from a fully balanced source as shown in figure 5. when the two input sources are single-ended, conversion to differential signals can improve channel-to-channel isolation to obtain accurate outputs from the dual channels, particularly at very high frequencies (i.e. 3.6ghz and above). this can be achieved using a 1:1 balun to match the chips internal 400 input impedance to the 50 source by adding a 62 resistor (r1) at the differential inputs as shown in figure 5. since there is no voltage conversion gain from impedance transformation in this case, the sensitivity of the detector is similar to the one using single-ended inputs as shown in figure 4. if better sensitivity is needed, a 1:4 balun can be used and r1 should be increased to 400 correspondingly to match 200 input impedance to the 50 source. this impedance transformation results in 6db voltage gain, thus 6db improvement in sensitivity is obtained while the overall dynamic range remains the same. at high frequency, additional lc elements may be needed for input impedance matching due to the parasitics of the transformer and pcb traces. alternatively, a narrowband lc matching network can be used for the conversion of a single-ended signal to a balanced signal. such a matching network is shown in figure 6. by this means, the sensitivity and overall linear dynamic range of the detector can be similar to the one using a 1:4 rf input balun, as described above. for a 50 input termination, the approximate rf input power range of the LTC5583 is from C58dbm to 4dbm, even with high crest factor signals such as a 4-carrier w- cdma waveform, but the minimum detectable rf power level varies as the input rf frequency increases. the linear dynamic range can also be shifted to tailor to a particular application. by simply inserting an attenuator in front of the rf input, the power range is shifted higher by the amount of the attenuation. the sensitivity of LTC5583 is dictated by the broadband input noise power, which also determines the output dc offset voltage. when the inputs are terminated differently, the dc output voltage may vary slightly. when the input noise power is minimized, the dc offset voltage is also reduced to a minimum, and the sensitivity and dynamic range are improved accordingly. external filtering capacitors at flta and fltb pins these pins are internally biased at v cc C 0.43v via a 1.2k resistor from the v cca and v ccb voltage supply. to ensure stable operation of the LTC5583, an external capacitor with a value of 8nf or higher is required to connect the flta pin to v cca , and the fltb pin to v ccb , respectively. do not connect these filter capacitors to ground or any other low voltage reference to prevent an abnormal start- up condition. the value of these two filtering capacitors has a dominant effect on the output transient response. the lower the capacitance, the faster the output rise and fall times. for signals with am content such as w-cdma, ripple can be observed when the loop bandwidth set by the filtering capacitors is close to the modulation bandwidth of the signal. in general, the LTC5583 output ripple remains relatively constant regardless of the rf input power level for a fixed filtering capacitor and modulation format of the rf signal. typically, this capacitor must be selected to average out the ripple to achieve the desired accuracy of rf power measurement. www.datasheet.in
LTC5583 21 5583f figure 7. simplified circuit schematic of the rms power detector output interface 5583 f07 LTC5583 r ss 50 v oa or v ob input v cc c load v out rms power detector output: v oa , v ob the output buffer amplifier of the LTC5583 is shown in figure 7. this class-ab buffer amplifier can output 5ma current to the load. the output impedance is determined primarily by the 50 series resistor connected to the buffer amplifier inside the chip. this will prevent any overstress on the internal devices in the event that the output is shorted to ground. the C3db small-signal bandwidth of the buffer amplifier is about 22.4mhz and the full-scale rise/fall time can be as fast as 140ns, limited by the slew rate of the internal circuit instead. when the output is resistively terminated or open, the fastest output transient response is achieved when a large signal is applied to the rf input. the rise time of the LTC5583 is about 140ns and the fall time is 3.5s, respectively, for full-scale pulsed rf input power with 8.2nf filtering capacitors. the speed of the output transient response is dictated mainly by the filtering capacitors (at least 8nf) at the flta and fltb pins. see the detailed output transient response in the typical performance character- istics section. when the rf input has am content, residual ripple may be present at the output depending upon the low frequency content of the modulated rf signal. this ripple can be reduced with a larger filtering capacitor at the expense of a slower transient response. applications information since the output buffer amplifier of the LTC5583 is capable of driving an arbitrary capacitive load, the residual ripple can be further filtered at the output with a series resistor r ss and a large shunt capacitor c load (see figure 7). this lowpass filter also reduces the output noise by limiting the output noise bandwidth. when this rc network is designed properly, a fast output transient response can be maintained with reduced residual ripple. for example, we can estimate c load with an output voltage swing of 1.7v at 2140mhz. in order to not allow the maximum 5ma sourcing current to limit the fall time (about 5s), the maximum value of c load can be chosen as follows: c load 5ma ? allowable additional time/1.7v = 5ma ? 0.25s/1.7v = 735pf once c load is determined, r ss can be chosen properly to form an rc low-pass filter with a corner frequency of 1/[2 ? (r ss + 50) ? c load ]. in general, the rise time of the LTC5583 is much shorter than the fall time. however, when the output rc filter is used, the rise time may be dominated by the time constant of this filter. accordingly, the rise time becomes very similar to the fall time. although the maximum sinking capability of the LTC5583 is 5ma, it is recommended that the output load resistance should be greater than 1.2k in order to achieve the full output voltage swing. www.datasheet.in
LTC5583 22 5583f applications information where tc1 and tc2 are the first order and second order temperature compensation coefficients, respectively; t a is the actual ambient temperature; and t nom is the reference room temperature 25c; detv1 and detv2 are the output voltage variation when r t1 and r t2 are not set to zero. temperature compensation of logarithmic intercept the simplified interface schematics of the intercept tem- perature compensation are shown in figure 8 and figure 9. the adjustment of the output voltage can be described by the following equation with respect to the ambient temperature: v out = tc1 ? (t a C t nom ) + tc2 ? (t a C t nom ) 2 + detv1 + detv2 figure 9. simplified interface circuit schematic of the control pins rt1 and rt2 figure 8. simplified interface circuit schematic of the polarity pins rp1 and rp2 5583 f08 LTC5583 22.2k rp1 or rp2 v cc open or short 5583 f09 LTC5583 rt1 or rt2 v cc 250k www.datasheet.in
LTC5583 23 5583f the temperature coefficients tc1 and tc2 are shown as functions of the tuning resistors r t1 and r t2 in figure 10 and figure 11. applications information r t1 (k) 5 tc1 (mv/c) detv1 (mv) 1.6 1.2 0.4 0.8 0 C0.4 C0.8 C1.2 C1.6 40 30 10 0 20 C10 C20 C30 C40 5583 f10 35 20 15 30 25 10 r p1 = 0 r p1 = 0pen detv1 detv1 tc1 tc1 figure 10. first order temperature compensation coefficient tc1 vs external rt1 value figure 11. second order temperature compensation coefficient tc2 vs external rt2 value r t2 (k) 0 tc2 (v/c 2 ) detv2 (mv) 16 12 4 8 0 C4 C8 C12 C16 200 150 50 0 100 C50 C100 C150 C200 5583 f11 10 7 29 8 56 14 3 r p2 = open r p2 = 0 detv2 detv2 tc2 tc2 when pins rt1 and rt2 are shorted to ground, the tem- perature compensation circuit is disabled automatically. polarity of the temperature coefficient tc1 (or tc2), can be selected by either shorting the rp1 pin (or rp2 pin) to ground or leaving it open, while the coefficients values can be controlled by external resistors r t1 and r t2 inde- pendently, according to figures 10 and 11. at a given rf frequency, the polarities and optimal values of tc1 and tc2 can be chosen to ensure a stable output over the operating temperature range. table 2 lists the suggested r p1 , r p2 , r t1 and r t2 values at various rf frequencies for the best output performance over temperature. table 2. suggested r p and r t values for optimal temperature performance vs rf frequency frequency (mhz) r p1 r t1 (k) r p2 r t2 (k) 450 open 11.5 0 1.13 880 open 11.5 0 1.13 2140 open 9.76 0 1.10 2700 open 8.87 0 1.21 3600 open 10.2 0 1.65 5800 open 10.0 0 1.47 www.datasheet.in
LTC5583 24 5583f applications information envelope detector output: enva, envb each envelope detector output linearly follows the instan- taneous input power level, tracking the input signals rf envelope. enva and envb also indicate the peak-to-av- erage power ratio (crest factor). thus, reading both v oa and enva provides the average power, peak-to-average power ratio, peak power, and rf envelope of the input signal to channel a. reading v ob and envb provides the same information for channel b. enable: en a simplified schematic of the en pin interface is shown in figure 13. the enable voltage necessary to turn on the LTC5583 is 2v. to disable or turn off the chip, set this volt- age below 0.3v. it is important that the voltage applied to the en pin should never exceed v cc by more than 0.3v. otherwise, the supply current may be sourced through the upper esd protection diode connected at the en pin. under no circumstances should voltage be applied to the en pin before the supply pins (v cca , v ccb , v ccr , v ccn ). if this occurs, damage to the ic may result. 5583 f12 LTC5583 v cc enva or envb figure 12. simplified schematic of the enva and envb pin figure 13. simplified schematic of the enable pin 5583 f13 LTC5583 v cc 49k en 49k www.datasheet.in
LTC5583 25 5583f applications information difference output: v odf this voltage is equal to the difference of the two channels output voltages, plus a dc offset: v odf = (v oa C v ob ) + v os if inv voltage < 1v. v odf = (v ob C v oa ) + v os if inv voltage > 2v. a simplified schematic of the v odf interface is shown in figure 14. the low 5 output impedance at this pin is due to internal feedback circuitry. figure 15 shows a simplified schematic of the inv pin interface. inv determines the sign of the difference func- tion at the v odf output. a simplified schematic of the v os pin interface is shown in figure 16. the output range of v odf is from 50mv to v cc C 50mv; it cannot go below 50mv. if v oa C v ob is negative (for inv = low), a positive offset voltage v os is needed. similarly, if v ob C v oa is negative (for inv = high), a positive offset voltage v os is needed. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd protection circuits. depending on the supply inductance, this could result in a supply voltage overshoot at initial turn-on that exceeds the maxi- mum rating. a supply voltage ramp time of greater than 1ms is recommended. in case this voltage ramp time is not controllable, a small (i.e. 1) series resistor can be inserted between v cc pin and the supply voltage source to mitigate the problem and protect the ic. the r1 shown in figures 1 and 2 serves this purpose. www.datasheet.in
LTC5583 26 5583f applications information 5583 f14 LTC5583 15k C + v cc v odf figure 14. simplified schematic of the v odf pin figure 15. simplified schematic of the inv pin figure 16. simplified schematic of the v os pin 5583 f15 LTC5583 v cc 10k inv 5583 f16 LTC5583 v cc 30k v os * v oa if inv = low v ob if inv = high * www.datasheet.in
LTC5583 27 5583f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697) 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?o be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 24 23 1 2 bottom view?xposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ?0.05 (uf24) qfn 0105 recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer www.datasheet.in
LTC5583 28 5583f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0910 ? printed in usa related parts typical application part number description comments infrastructure lt5527 400mhz to 3.7ghz, 5v downconverting mixer 2.3db gain, 23.5dbm iip3 and 12.5db nf at 1900mhz, 5v/78ma supply lt5557 400mhz to 3.8ghz, 3.3v downconverting mixer 2.9db gain, 24.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/82ma supply ltc6400-x 300mhz low distortion if amp/adc driver fixed gain of 8db, 14db, 20db and 26db; >36dbm oip3 at 300mhz, differential i/o ltc6401-x 140mhz low distortion if amp/adc driver fixed gain of 8db, 14db, 20db and 26db; >40dbm oip3 at 140mhz, differential i/o ltc6416 2ghz 16-bit adc buffer 40.25dbm oip3 to 300mhz, programmable fast recovery output clamping ltc6412 31db linear analog vga 35dbm oip3 at 240mhz, continuous gain range C14db to 17db lt5554 ultralow distort if digital vga 48dbm oip3 at 200mhz, 2db to 18db gain range, 0.125db gain steps lt5575 700mhz to 2.7ghz direct conversion i/q demodulator integrated baluns, 28dbm iip3, 13dbm p1db, 0.03db i/q amplitude match, 0.4 phase match lt5578 400mhz to 2.7ghz upconverting mixer 27dbm oip3 at 900mhz, 24.2dbm at 1.95ghz, integrated rf transformer lt5579 1.5ghz to 3.8ghz upconverting mixer 27.3dbm oip3 at 2.14ghz, nf = 9.9db, 3.3v supply, single-ended lo and rf ports ltc5598 5mhz to 1.6ghz i/q modulator 27.7dbm oip3 at 140mhz, 22.9dbm at 900mhz, C161.2dbm/hz noise floor ltc5588-1 200mhz to 6ghz i/q modulator with ultra-high oip3 31dbm uncalibrated oip3, single-pin calibration to optimize oip3 to 35dbm, C158dbm/hz noise floor, 3.3v supply rf power detectors lt5534 50mhz to 3ghz log rf power detector with 60db dynamic range 1db output variation over temperature, 38ns response time, log linear response lt5537 wide dynamic range log rf/if detector low frequency to 1ghz, 83db log linear dynamic range lt5581 6ghz low power rms detector 40db dynamic range, 1db accuracy over temperature, 1.5ma supply current ltc5582 10ghz rms power detector 57db dynamic range, 1db accuracy over temperature adcs ltc2208 16-bit, 130msps adc 78dbfs noise floor, >83db sfdr at 250mhz ltc2262-14 14-bit, 150msps adc ultralow power 72.8db snr, 88db sfdr, 149mw power consumption ltc2242-12 12-bit, 250msps adc 65.4db snr, 78db sfdr, 740mw power consumption 5583 ta01 LTC5583 rms detect outa ina inb outb rms detect envelope detect directional coupler tx pa envelope detect difference amplifier antenna vswr vswr monitor www.datasheet.in

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