hb56a140br series 1,048,576-word 40-bit high density dynamic ram module ade-203- rev. 0.0 dec. 1, 1995 description the hb56a140br is a 1m 40 dynamic ram module, mounted 10 pieces of 4-mbit dram (hm514400cs/cls) sealed in soj package. an outline of the hb56a140br is 72-pin single in-line package. therefore, the hb56a140br makes high density mounting possible without surface mount technology. the hb56a140br provides common data inputs and outputs. its module board has decoupling capacitors beneath the each soj. features 72-pin single in-line package lead pitch : 1.27 mm single 5 v ( 5%) supply high speed access time : 60 ns/70 ns/80 ns (max) low power dissipation operating : 5.78 w/5.25 w/4.73 w (max) standby : 105 mw (max) 5.25 mw (max) (l-version) fast page mode capability 1,024 refresh cycle : 16 ms : 128 ms (l-version) 2 variations of refresh ras -only refresh cas -before- ras refresh ttl compatible
hb56a140br series 2 ordering information type no. access time package contact pad hb56a140br-6c HB56A140BR-7C hb56a140br-8c 60 ns 70 ns 80 ns 72-pin sip socket type gold hb56a140br-6cl HB56A140BR-7Cl hb56a140br-8cl 60 ns 70 ns 80 ns pin arrangement 1 pin 36 pin 37 pin 72 pin pin no. pin name pin no. pin name pin no. pin name pin no. pin name 1v ss 19 oe 37 dq19 55 dq28 2 dq0 20 dq8 38 dq20 56 dq29 3 dq1 21 dq9 39 v ss 57 dq30 4 dq2 22 dq10 40 cas0 58 dq31 5 dq3 23 dq11 41 nc 59 v cc 6 dq4 24 dq12 42 nc 60 dq32 7 dq5 25 dq13 43 nc 61 dq33 8 dq6 26 dq14 44 ras0 62 dq34 9 dq7 27 dq15 45 nc 63 dq35 10 v cc 28 a7 46 dq21 64 dq36 11 pd4 29 dq16 47 we 65 dq37 12 a0 30 v cc 48 x40 (v ss ) 66 dq38 13 a1 31 a8 49 dq22 67 pd0 14 a2 32 a9 50 dq23 68 pd1 15 a3 33 nc 51 dq24 69 pd2 16 a4 34 nc 52 dq25 70 pd3 17 a5 35 dq17 53 dq26 71 dq39 18 a6 36 dq18 54 dq27 72 v ss
hb56a140br series 3 pin description pin name function a0 a9 address input a0 a9 refresh address input dq0 dq39 data-in/data-out cas0 column address strobe ras0 row address strobe we read/write enable oe output enable v cc power supply (+5 v) v ss ground pd0 pd4 presence detect pin nc no connection presence detect pin arrangement hb56a140br pin no. pin name 60 ns 70 ns 80 ns 67 pd0 v ss v ss v ss 68 pd1 v ss v ss v ss 69 pd2 nc v ss nc 70 pd3 nc nc v ss 11 pd4 nc nc nc
hb56a140br series 4 block diagram we
oe
v
v ss cc a0 ?a9 d0 ?d9 c0 ?c9 ras
cas dq0
dq1
dq2
dq3 dq4
dq5
dq6
dq7 dq8
dq9
dq10
dq11 dq12
dq13
dq14
dq15 dq16
dq17
dq18
dq19 dq20
dq21
dq22
dq23 dq28
dq29
dq30
dq31 dq32
dq33
dq34
dq35
dq36
dq37
dq38
dq39
dq24
dq25
dq26
dq27 d0 ?d9 d0 ?d9 i/o
i/o
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i/o i/o
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i/o i/o
i/o
i/o
i/o i/o
i/o
i/o
i/o i/o
i/o
i/o
i/o i/o
i/o
i/o
i/o i/o
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i/o i/o
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i/o cas ras d0 cas ras d1 cas ras d2 cas ras d3 cas ras d4 cas ras d5 cas ras d6 cas ras d7 cas ras d8 cas ras d9 d0 ?d9 d0 ?d9 note: d0 ?d9 : hm514400
hb56a140br series 5 absolute maximum ratings parameter symbol value unit voltage on any pin relative to v ss v t 1.0 to +7.0 v supply voltage relative to v ss v cc 1.0 to +7.0 v short circuit output current iout 50 ma power dissipation p t 10 w operating temperature topr 0 to +70 c storage temperature tstg 55 to +125 c recommended dc operating conditions (ta = 0 to +70 c) parameter symbol min typ max unit note supply voltage v cc 4.75 5.0 5.25 v 1 input high voltage v ih 2.4 5.5 v 1 input low voltage v il 1.0 0.8 v 1 note: 1. all voltage referred to v ss .
hb56a140br series 6 dc characteristics (ta = 0 to +70 c, v cc = 5 v 5%, v ss = 0 v) hb56a140br 60 ns 70 ns 80 ns parameter symbol min max min max min max unit test conditions notes operating current i cc1 1100 1000 900 ma t rc = min 1, 2 standby current i cc2 20 20 20 ma ttl interface ras , cas = v ih dout = high-z 10 10 10 ma cmos interface ras , cas 3 v cc 0.2v dout = high-z standby current (l-version) i cc2 1 1 1 ma cmos interface ras , cas = v ih we , oe , address, din = v ih or v il dout = high-z 4 ras -only refresh current i cc3 1100 1000 900 ma t rc = min 2 standby current i cc5 50 50 50 ma ras = v ih , cas = v il dout = enable 1 cas -before- ras refresh current i cc6 1100 1000 900 ma t rc = min fast page mode current i cc7 1100 1000 900 ma t pc = min 1, 3 battery backup operation current (cbr refresh) (l-version) i cc10 2 2 2mat rc = 125 m s, t ras 1 m s we = v ih , cas = v il oe , address, din = v ih or v il , dout = high-z 4 input leakage current i li 10 10 10 10 10 10 m a 0 v vin 7 v output leakage current i lo 10 10 10 10 10 10 m a 0 v vout 7 v dout = disable output high voltage v oh 2.4 v cc 2.4 v cc 2.4 v cc v iout = 5 ma output low voltage v ol 0 0.4 0 0.4 0 0.4 v iout = 4.2 ma notes: 1. i cc depends on output load condition when the device is selected. i cc max is specified at the output open condition. 2. address can be changed once or less while ras = v il . 3. address can be changed once or less while cas = v ih . 4. v cc 0.2 v v ih 6.5 v, 0 v v il 0.2 v.
hb56a140br series 7 capacitance (ta = 25 c, v cc = 5 v 5%) parameter symbol typ max unit notes input capacitance (address a0 a9) c i1 90 pf 1 input capacitance ( we , oe )c i2 90 pf 1 input capacitance ( ras , cas )c i3 90 pf 1 input/output capacitance (dq0 dq39) c i/o 20 pf 1, 2 notes: 1. capacitance measured with boonton meter or effective capacitance measuring method. 2. cas = v ih to disable dout. ac characteristics refer to the hm514400c series data sheet. physical outline unit : mm/inch 5.28 max 0.208 3.17 min 0.125 107.95 4.25 101.19 3.98 2 ? 3.175 0.125 r1.57 r0.062 6.35 0.25 2.03 0.08 6.35 0.25 1.27 0.05 r1.57 r0.062 6.35 0.25 44.45 1.75 1.04 0.041 2.54 min 0.10 10.16 0.40 25.4 1.00 1.27 0.05 f 44.45 1.75 +0.10
-0.08 +0.004
-0.003 a detail a 60 ns 70 ns 80 ns
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