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rev. a a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. high current output, triple video amplifier features drives 13 v output drives unlimited capacitive load high current output drive: 70 ma excellent video specifications (r l = 150 ) gain flatness 0.1 db to 10 mhz 0.06% differential gain error 0.02 differential phase error power operates on 2.5 v to 7.5 v supply 10.0 ma/amplifier max power supply current high speed 250 mhz unity gain bandwidth (3 db) 1200 v/ s slew rate fast settling time of 35 ns (0.1%) high speed disable function turn-off time 30 ns easy to use 200 ma short circuit current output swing to 1 v of rails applications lcd displays video line driver broadcast and professional video computer video plug-in boards consumer video rgb amplifier in component systems ad8023 product description the ad8023 is a high current output drive, high voltage output drive, triple video amplifier. each amplifier has 70 ma of output current and is optimized for driving large capacitive loads. the amplifiers are current feedback amplifiers and feature gain flatness of 0.1 db to 10 mhz while offering differential gain and phase error of 0.06% and 0.02 . the ad8023 uses maximum supply current of 10.0 ma per amplifier and runs on 2.5 v to 7.5 v power supply. the outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals. the ad8023 is unique am ong current feedback op amps by virtue of its large capacitive load drive with a small series resistor, while still achieving rapid settling time. for instance, it can settle to 0.1% in 35 ns while driving 300 pf capacitance. the bandwidth of 250 mhz along with a 1200 v/ s slew rate make the ad8023 useful in high speed applications requiring a single +5 v or dual power sup plies up to 7.5 v. further- more, the ad8023 contains a high speed disable function for each amplifier in order to power down the amplifier or high impedance the output. this can then be used in video multi- plexing applications. the ad8023 is available in the indus- trial temperature range of ?0 c to +85 c. pin configuration 14-lead soic 14 13 12 11 10 9 8 1 2 3 4 7 6 5 disable 1 ? s +in 2 ?n 2 out 2 disable 2 disable 3 +v s ad8023 out 3 ?n 3 +in 3 +in 1 ?n 1 out 1 v in figure 1. pulse response driving a large load capacitor, c l = 300 pf, g = +3, r f = 750 ? , r s = 16.9 ? , r l = 10 k ? figure 2. output swing voltage, r l = 150 ? ; v s = 7.5 v, g = +10 v in v o v o one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000
ad8023?pecifications model ad8023a conditions v s min typ max units dynamic performance bandwidth (3 db) r fb = 750 ? no peaking, g = +3 125 mhz bandwidth (0.1 db) no peaking, g = +3 7 mhz slew rate 5 v step 1200 v/ s settling time to 0.1% 0 v to 6 v (6 v step) c load = 300 pf r load > 1 k ? , r fb = 750 ? t a = +25 c to +70 c, r s = 16.9 ? 30 ns noise/harmonic performance total harmonic distortion f c = 5 mhz, r l = 150 ? , v o = 2 p-p ?2 dbc input voltage noise f = 10 khz 2.0 nv/ hz input current noise f = 10 khz (? in ) 14 pa/ hz differential gain (r l = 150 ? ) f = 3.58 mhz, g = +2, r fb = 750 ? 0.06 % differential phase (r l = 150 ? ) f = 3.58 mhz, g = +2, r fb = 750 ? 0.02 degrees dc performance input offset voltage t min to t max ? 2 5 mv offset drift 2 v/ c input bias current (? t min to t max ?5 15 45 a input bias current (+) t min to t max ?5 5 25 a open-loop transresistance 67 111 k ? t min to t max 50 111 k ? input characteristics input resistance +input t min to t max 100 k ? ?nput t min to t max 75 ? input capacitance 2pf input common-mode voltage range 6.0 v common-mode rejection ratio input offset voltage 50 56 db ?nput current 0.2 a/v +input current 5 a/v output characteristics output voltage swing r l = 1 k ? v ol ? ee 0.8 1.0 v v cc ? oh 0.8 1.0 v r l = 150 ? v ol ? ee 1.0 1.3 v v cc ? oh 1.0 1.3 v output current 50 70 ma short-circuit current 300 ma capacitive load drive 1000 pf matching characteristics dynamic crosstalk g = +2, f = 5 mhz 70 db dc input offset voltage ? 0.3 5 mv ?nput bias current ?0 3 10 a power supply operating range single supply +4.2 +15 v dual supply 2.1 7.5 v quiescent current/amplifier 6.2 ma 7.0 10.0 ma t min to t max power-down 1.3 4.0 ma (@ t a = +25 c, v s = 7.5, c load = 10 pf, r load = 150 , unless otherwise noted) ? rev. a
ad8023 model ad8023a conditions v s min typ max units power supply (continued) power supply rejection ratio v s = 2.5 v to 7.5 v db input offset voltage 54 76 db ?nput current 0.03 a/v +input current 0.07 a/v disable characteristics off isolation f = 6 mhz ?0 db off output capacitance g = +1 12 pf turn-on time 50 ns turn-off time r l = 150 ? 30 ns switching threshold v th ?v ee 1.6 v specifications subject to change without notice. ? rev. a absolute maximum ratings * supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 15.5 v total internal power dissipation small outline (r) . . . . 1.0 watts (observe derating curves) input voltage (common mode) . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . 3 v (clamped) output voltage limit maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +v s minimum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s output short circuit duration . . . . . . . . . . . . . . . . . . . . observe power derating curves storage temperature range r package . . . . . . . . . . . . . . . . . . . . . . . . ?5 c to +125 c operating temperature range ad8023a . . . . . . . . . . . . . . . . . . . . . . . . . . ?0 c to +85 c lead temperature range (soldering 10 sec) . . . . . . . . +300 c *stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ordering guide temperature package package model range description option ad8023ar ?0 c to +85 c 14-lead plastic soic r-14 ad8023ar- ?0 c to +85 c 13" tape and reel r-14 reel ad8023ar- ?0 c to +85 c 7" tape and reel r-14 reel7 ad8023achips ?0 c to +85 cdie maximum power dissipation the maximum power that can be safely dissipated by the ad8023 is limited by the associated rise in junction temperature. the maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150 c. temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the ad8023 is internally short circuit protected, this may not be enough to guarantee that the maximum junction temper- ature is not exceeded under all conditions. to ensure proper operation, it is important to observe the derating curves. it must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. this power must be included when computing the junction temperature rise due to total internal power. maximum power dissipation watts ambient temperature c 2.5 2.0 0.5 50 90 40 30 20 0 1020 30 4050 6070 80 1.5 1.0 10 t j = +150 c 14-lead soic figure 3. maximum power dissipation vs. ambient temperature caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8023 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recom- mended to avoid performance degradation or loss of functionality. warning! esd sensitive device
ad8023 rev. a ? figure 4. input common-mode voltage range vs. supply voltage typical performance characteristics metalization photo contact factory for latest dimensions. dimensions shown in inches and (mm). in1 6 +in 5 in3 9 +in 3 10 v s 11 +v s 4 disable 3 3 disable 2 2 disable 1 1 +in 2 12 0.0634 (1.61) 0.0713 (1.81) 7 out 1 8 out 3 in 2 13 14 out 2 figure 5. output voltage swing vs. load resistance common-mode voltage range volts supply voltage volts 8 0 7 4 3 2 1 6 5 28 34567 load resistance 14 13 6 10 10k 100 1k 10 9 8 7 12 11 output voltage swing v p-p v s = 7.5v
? rev. a ad8023 supply voltage volts 25 20 0 1 9 2 3 4 5 6 7 8 15 10 5 t a = +25 c total supply current ma figure 6. total supply current vs. supply voltage supply voltage volts output voltage swing vp-p 16 2 28 34567 14 12 10 6 4 8 t a = +25 c swing no load swing r l = 150 figure 7. output voltage swing vs. supply voltage temperature c 24 16 10 50 40 30 20 10 0 10 20 22 20 14 12 18 30 40 50 60 70 80 90 100 v s = 7.5v v s = 2.5v total supply current ma figure 8. total supply current vs. temperature temperature c 35 15 0 50 40 30 20 10 0 10 20 30 25 10 5 20 30 40 50 60 70 80 90 100 i b +i b input bias current a figure 9. input bias current vs. temperature temperature c 1 2 40 90 30 20 10 0 102030405060 70 80 0 1 v s = 2.5v v s = 7.5v input offset voltage mv figure 10. input offset voltage vs. temperature frequency mhz 100 1 300 10 100 31 10 0.1 3.1 1 0.31 g = +2 v s = 2.5v v s = 7.5v closed-loop output resistance v figure 11. closed-loop output resistance vs. frequency
ad8023 rev. a ? frequency khz 200 10 1 0.1 100 110 100 200 10 0 100 i noise +i noise v noise voltage noise nv hz current noise pa hz figure 12. input current and voltage noise vs. frequency temperature c 450 400 250 50 80 40 short circuit current ma 30 20 10 0 10203040506070 350 300 90 100 v s = 7.5v source sink figure 13. short circuit current vs. temperature frequency hz 10k 1 100 10 100 10 g = +1 v s = 7.5v 200 1k output resistance figure 14. output resistance vs. frequency, disabled state frequency mhz 90 80 0 1 200 10 70 60 20 50 40 30 10 v s = 7.5v v s = 2.5v 100 common-mode rejection db r r r r v cm figure 15. common-mode rejection vs. frequency v s = 2.5v (+psrr) v s = 2.5v ( psrr) v s = 7.5v ( psrr) frequency mhz 1 10 100 0 70 60 50 40 30 20 10 v s = 7.5v (+psrr) power supply rejection db figure 16. power supply rejection ratio vs. frequency 2nd 3rd frequency mhz 0 10 90 1 100 10 harmonic distortion dbc 20 30 70 40 50 60 80 g = +1 v s = 7.5v v o = 2v p-p figure 17. harmonic distortion vs. frequency, r l = 150 ?
? rev. a ad8023 frequency hz 100k 10 1k 1g 10k transimpedance 10m 10k 100 1k 100k 1m 100m figure 18. open-loop transimpedance vs. frequency output voltage step v p - p 1600 0 1400 800 600 400 200 1200 1000 0 6 1 2 345 g = +10 g = +1 g = +2 g = 1 slew rate v/ s figure 19. slew rate vs. output step size figure 20. large signal pulse response, gain = +1, (r f = 2 k ? , r l = 150 ? , v s = 7.5 v) figure 21. small signal pulse response, gain = +1, (r f = 2 k ? , r l = 150 ? , v s = 7.5 v) supply voltage v 1600 0 1400 800 600 400 200 1200 1000 28 34 5 67 g = 1 g = +2 g = +1 g = +10 slew rate v/ s figure 22. maximum slew rate vs. supply voltage figure 23. large signal pulse response, gain = +10, (r f = 274 ? , r l = 150 ? , v s = 7.5 v) v in v o v in v o v in v o
ad8023 rev. a ? frequency mhz +1 8 1 500 10 100 4 5 6 7 2 3 0 1 0 90 180 gain phase v s = 7.5v v s = 2.5v v s = 7.5v v s = 2.5v +2 g = +10 r l = 150 closed-loop gain (normalized) db phase shift degrees figure 24. closed-loop gain and phase vs. frequency, g = +10, r l = 150 ? frequency mhz +1 8 1 400 10 closed-loop gain (normalized) db 100 4 5 6 7 2 3 0 1 0 90 180 9 gain phase v s = 2.5v v s = 7.5v phase shift degrees figure 25. closed-loop gain and phase vs. frequency, g = +1, r l = 150 ? figure 26. large signal pulse response, gain = ?, (r f = 750 ? , r l = 150 ? , v s = 7.5 v) v in v o frequency mhz +1 8 1 500 10 closed-loop gain (normalized) db 100 4 5 6 7 2 3 0 1 phase shift degrees 0 90 180 gain phase g = +1 r l = 150 v s = 7.5v v s = 2.5v v s = 7.5v v s = 2.5v 9 figure 27. closed-loop gain and phase vs. frequency, g = ?, r l = 150 ? figure 28. small signal pulse response, gain = +10, (r f = 274 ? , r l = 150 ? , v s = 7.5 v) figure 29. small signal pulse response, gain = ?, (r f = 750 ? , r l = 150 ? , v s = 7.5 v) v in v o v in v o
? rev. a ad8023 acl g 1 + sc t ( r f + gn rin ) where: c t = transcapacitance 1 pf r f = feedback resistor g = ideal closed loop gain gn = 1 + r f r g ? ? ? ? ? ? = noise gain rin = inverting input resistance 150 ? acl = closed loop gain the 3 db bandwidth is determined from this model as: f 3 1 2 c t ( r f + gn rin ) this model will predict 3 db bandwidth to within about 10% to 15% of the correct value when the load is 150 ? and v s = 7.5 v. for lower supply voltages there will be a slight decrease in bandwidth. the model is not accurate enough to predict either the phase behavior or the frequency response peaking of the ad8023. it should be noted that the bandwidth is affected by attenuation due to the finite input resistance. also, the open-loop output resistance of about 6 ? reduces the bandwidth somewhat when driving load resistors less than about 150 ? . (bandwidths will be about 10% greater for load resistances above a couple hundred ohms.) table i. ? db bandwidth vs. closed-loop gain and feedback resistor, r l = 150 (soic) v s ?volts gain r f ?ohms bw ?mhz 7.5 +1 2000 460 +2 750 240 +10 300 50 1 750 150 10 250 60 2.5 +1 2000 250 +2 1000 90 +10 300 30 1 750 95 10 250 50 driving capacitive loads when used in combination with the appropriate feedback resistor, the ad8023 will drive any load capacitance without oscillation. the general rule for current feedback amplifiers is that the higher the load capacitance, the higher the feedback resistor required for stable operation. due to the high open-loop transresistance and low inverting input current of the ad8023, the use of a large feedback resistor does not result in large closed- loop gain errors. additionally, its high output short circuit current makes possible rapid voltage slewing on large load capacitors. for the best combination of wide bandwidth and clean pulse response, a small output series resistor is also recommended. table ii contains values of feedback and series resistors which result in the best pulse responses. figure 28 shows the ad8023 driving a 300 pf capacitor through a large voltage step with virtually no overshoot. (in this case, the large and small signal pulse responses are quite similar in appearance.) frequency mhz +1 8 1 500 10 closed-loop gain (normalized) db 100 4 5 6 7 2 3 0 1 gain phase g = 10 r l = 150 v s = 7.5v v s = 2.5v v s = 2.5v 9 phase shift degrees 0 90 180 figure 30. closed-loop gain and phase vs. frequency, g = ?0, r l = 150 ? general the ad8023 is a wide bandwidth, triple video amplifier that offers a high level of performance on less than 9.0 ma per amplifier of quiescent supply current. the ad8023 achieves bandwidth in excess of 200 mhz, with low differential gain and phase errors and high output c urrent making it an efficient video amplifier. the ad8023 s wide phase margin coupled with a high output short circuit current make it an excellent choice when driving any capacitive load up to 300 pf. it is designed to offer outstanding functionality and performance at closed-loop inverting or noninverting gains of one or greater. choice of feedback and gain resistors because it is a current feedback amplifier, the closed-loop band- width of the ad8023 may be customized using different values of the feedback resistor. table i shows typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 ? . the choice of feedback resistor is not critical unless it is desired to maintain the widest, flattest frequency response. the resistors recommended in the table (chip resistors) are those that will result in the widest 0.1 db bandwidth without peaking. in applications requiring the best control of bandwidth, 1% resistors are adequate. resistor values and widest bandwidth figures are shown. wider bandwidths than those in the table can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. increasing the feedback resistor is especially useful when driving large capacitive loads as it will increase the phase margin of the closed-loop circuit. (refer to the driving capacitive loads section for more information.) to estimate the 3 db bandwidth for closed-loop gains of 2 or greater, for feedback resistors not listed in the following table, the following single pole model for the ad8023 may be used:
ad8023 rev. a ?0 figure 33. 50% overload recovery, gain = +10, (r f = 300 ? , r l = 1 k ? , v s = 7.5 v) as noted in the warning under maximum power dissipation, a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. though this current is internally limited to about 30 ma, its effect on the total power dissipation may be significant. disable mode operation pulling the voltage on any one of the disable pins about 1.6 v up from the negative supply will put the corresponding amplifier into a disabled, powered down, state. in this condition, the amplifier s quiescent current drops to about 1.3 ma, its output becomes a high impedance, and there is a high level of isolation from input to output. in the case of a gain of two line driver for example, the impedance at the output node will be about the same as for a 1.5 k ? resistor ( the feedback plus gain resistors) in parallel with a 12 pf capacitor. leaving the disable pin disconnected (floating) will leave the corresponding amplifier operational, in the enabled state. the input impedance of the disable pin is about 25 k ? in parallel with a few picofarads. when driven to 0 v, with the negative supply at 7.5 v, about 100 a flows into the disable pin. when the disable pins are driven by complementary output cmos logic, on a single 5 v supply, the disable and enable times are about 50 ns. when operated on dual supplies, level shifting will be required from standard logic outputs to the disable pins. figure 33 shows one possible method, which results in a negligible increase in switching time. +7.5v 10k to disable pin v i v i high => amplifier enabled v i low => amplifier disabled 7.5v 4k 15k +5 figure 34. level shifting to drive disable pins on dual supplies the ad8023 s input stages include protection from the large differential input voltages that may be applied when disabled. internal clamps limit this voltage to about 3 v. the high input to output isolation will be maintained for voltages below this limit. figure 31. circuit for driving a capacitive load table ii. recommended feedback and series resistors vs. capacitive load and gain r s ?ohms c l ?pf r f ?ohms g = 2 g 3 20 2k 0 0 50 2k 10 10 100 2k 15 15 200 3k 10 10 300 3k 10 10 500 3k 10 10 figure 32. pulse response driving a large load capacitor. c l = 300 pf, g = +3, r f = 750 ? , r s = 16.9 ? , r l = 10 k ? overload recovery the three important overload conditions are: input common- mode voltage overdrive, output voltage overdrive, and input current overdrive. when configured for a low closed-loop gain, this amplifier will quickly recover from an input common-mode voltage overdrive; typically in under 25 ns. when configured for a higher gain, and overloaded at the output, the recovery time will also be short. for example, in a gain of +10, with 50% overdrive, the recovery time of the ad8023 is about 20 ns (see figure 31). for higher overdrive, the response is somewhat slower. for 100% overdrive, (in a gain of +10), the recovery time is about 80 ns. v in v o v in v o 4 +v s ad8023 1.0 f 0.1 f 11 1.0 f 0.1 f v s r g r t v in 15 c l v o r f r s
?1 rev. a ad8023 outline dimensions dimensions shown in inches and (mm). 14-lead plastic soic (r-14) 14 8 7 1 0.3444 (8.75) 0.3367 (8.55) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0500 (1.27) bsc 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 printed in u.s.a. c3137??/00 (rev. a)

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