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1 rt9703 preliminary ds9703-00 september 2003 features pin configurations applications 80m ? ? ? ? ? , 3a smart universal power switch with flag general description the rt9703 is a low voltage, high performance single n-channel mosfet power switch, designed for power rail on/off control with low r ds(on) dd 80m ? and full protection functions. the rt9703 equipped with a charge pump circuitry to drive the internal mosfet switch and a flag output is available to indicate fault conditions against large di/dt which may cause the supply to fall out of regulation. in order to fit different application, an ip pin is offered for current limit point setting, a resistor from ip to ground sets the current limit for the switch. additional features include soft-start to limit inrush current during plug-in, thermal shutdown to prevent catastrophic switch failure from high-current loads, under-voltage lockout (uvlo) to ensure that the device remains off unless there is a valid input voltage present, a precision resistor-programmable output current limit up to 3.5a. besides, the lower quiescent current as 30 a making this device ideal for portable battery-operated equipment. the rt9703 is available in sop-8 package requiring minimum board space and smallest components. ordering information rt9703 package type s : sop-8 operating temperature range c : commercial standard lcd monitor, lcd-tv usb power module for adsl information appliance and set-top box battery-powered equipment hot-plug power supplies acpi power distribution pci bus power switching motherboard & notebook pcs pc card hot swap application adjustable current limiting up to 3.5a built-in (typically 80m ? ? ? ? ? ) n-channel mosfet reverse current flow blocking (no body diode) i.e. output can be forced higher than input (off-state) low supply current: 30 a typical at switch on state less than 1 a typical at switch off state guaranteed 3a continuous load current wide input voltage ranges: 2v to 5.5v open-drain fault flag output hot plug-in application (soft-start) 1.7v typical under-voltage lockout (uvlo) thermal shutdown protection smallest sop-8 package minimizes board space (top view) sop-8 flg vout vout gnd ce vin vin ip 2 3 4 5 8 7 6
2 rt9703 preliminary function block diagram typical application circuit functional pin description vin ce flg ip vout gnd rt9703 + peripheral + 33uf r set pull-up resistor (10k to 100k) supply voltage 10uf fault flag off on pin name pin function vin supply input vout switch output gnd common ground ce chip enable control input flg open-drain fault flag output ip current limit programming input gate control output voltage detection delay oscillator uvlo charge pump bias thermal protection flg vout ce + - + - ip vin vref
3 rt9703 preliminary test circuits vin ce flg vout gnd rt9703 + + r l a c out i l v out r fg c in v in v flg ip r set i supply a i out off on s1 v in vin ce flg vout gnd rt9703 + r l a c in a ip r set i supply i leakage off on vin ce flg vout gnd rt9703 + + i out c out v r ds(on) c in v in v ip r set vin ce flg vout gnd rt9703 + + r l c out i l v out r fg c in v in v flg v ce ip r set vin ce flg vout gnd rt9703 + + r l a i out s3 c out i l v out c in v in s2 ip r set note: above test circuits reflected the graphs shown on ? typical operating characteristics ? are as follows: 1 ? turn-on rising & turn-off falling time vs. temperature, turn-on & off response, flag response at chip enable, flag response (enable into current limit) 2 ? on-state & off-state supply current vs. input voltage/temperature, turn-off leakage current vs. temperature 3 ? on-resistance vs. input voltage/temperature 4 ? ce threshold voltage vs. input voltage/temperature, flag delay time vs. input voltage/temperature, uvlo threshold vs. temperature, uvlo at rising & falling 5 ? current limit vs. input voltage/temperature/r set , current limit factor vs. r set , short circuit current vs. input voltage, inrush current response, soft-start response, current-limit & short circuit with thermal shutdown, short-circuit response 12 34 5
4 rt9703 preliminary electrical characteristics recommended operating conditions (note 3) supply input voltage ------------------------------------------------------------------------------------------------- 2v to 5.5v chip enable input voltage ------------------------------------------------------------------------------------------ 0v to 5.5v junction temperature range -------------------------------------------------------------------------------------- ? 20 c to 100 c (v in = 5v, c in = c out = 1 f, t a = 25 c, unless otherwise specified) supply voltage --------------------------------------------------------------------------------------------------------- 6.5v chip enable input voltage ------------------------------------------------------------------------------------------ ? 0.3v to 6.5v flag voltage ------------------------------------------------------------------------------------------------------------ 6.5v power dissipation, p d @ t a = 25 c sop-8 -------------------------------------------------------------------------------------------------------------------- 0.95w package thermal resistance sop-8, ja -------------------------------------------------------------------------------------------------------------- 104 c/w junction temperature ------------------------------------------------------------------------------------------------ 125c lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------- 260c storage temperature range --------------------------------------------------------------------------------------- ? 65 c to 150 c esd susceptibility (note 2) hbm (human body mode) ----------------------------------------------------------------------------------------- 8kv mm (machine mode) ------------------------------------------------------------------------------------------------- 800v absolute maximum ratings (note 1) parameter symbol test conditions min typ max units switch on resistance r ds(on) i out = 3a (note 8) -- 80 100 m ? i sw_on switch on, v out = open -- 30 50 supply current i sw_off switch off, v out = open -- 0.1 1 a logic-low voltage v il switch off -- -- 0.8 v ce threshold (note 7) logic-high voltage v ih switch on 2.0 -- -- v ce input current i ce v ce = 0v to 5.5v -- 0 -- a output leakage current i leakage v ce = 0v, r load = 0 ? -- 0.5 10 a output turn-on rise time t on_rise 10% to 90% of v out rising -- 1.5 -- ms current limit factor (note 5) i lim x r set -- 180k -- a ? max. current limit setting (note 6) i limset v in = 3.3v to 5.5v, r set = 51.4k ? -- -- 3.5 a current limit setting accuracy ? i limset i limset = 0.5a to 3a (r set = 360k ? to 60k ? ) ? 20 -- +20 % flag output resistance r flg i sink = 1ma -- 15 400 ? flag off current i flg_off v flg = 5v -- 0.01 1 a flag delay time (note 4) t d form fault condition to flg assertion 2 4.6 8 ms under-voltage lockout v uvlo v in increasing 1.3 1.7 -- v under-voltage hysteresis ? v uvlo v in decreasing -- 0.1 -- v
5 rt9703 preliminary note 1. stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 2. devices are esd sensitive. handling precaution recommended. the human body model is a 100pf capacitor discharged through a 1.5k ? resistor into input and output pins. note 3. the device is not guaranteed to function outside its operating conditions. note 4. the flag delay time is input voltage dependent, see ? typical operating characteristics ? graph for further details. note 5. current limit is determined by: i limit = 180k/r set , where r set is in ohms. note 6. it is important to note that the maximum current limit value shall be set properly in accordance with its supply voltage otherwise which it may result in the failure occurrence. see ? maximum current limit vs. supply voltage ? graph shown on the applications information section for further details. note 7. for input voltage lower than 5v, the threshold level will subject to 0.6v deviation throughout the operating junction temperature range. refer to the ? typical operating characteristics ? graph for further details. note 8. r ds(on) is measured at constant junction temperature by using a 1ms current pulse. parameter symbol test conditions min typ max units thermal shutdown protection t sd -- 130 -- c thermal shutdown hysteresis ? t sd -- 10 -- c
6 rt9703 preliminary typical operating characteristics on-state supply current vs. input voltage 10 15 20 25 30 35 40 45 50 1.5 2 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) v ce = 5v c in = 10uf r l = open r set = 100k ? off-state supply current vs. input voltage -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 1.522.533.544.555.5 input voltage (v) v ce = 5v c in = 10uf c out = 33uf r l = open r set = 100k ? on-state supply current vs. temperature 10 15 20 25 30 35 40 45 50 -40 -20 0 20 40 60 80 100 120 temperature v in = v ce = 5v c in = 10uf c out = 33uf r l = open r set = 100k ? ( c) off-state supply current vs. temperature -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 -40-20 0 20406080100120 temperature v in = 5v, v ce = 0v c in = 10uf c out = 33uf r l = open r set = 100k ? ( c) current limit vs. input voltage 1.6 1.7 1.8 1.9 2 2.1 22.533.5 44.555.5 input voltage (v) c in = 10uf, c out = 33uf r l = 0.5 ?, r set = 100k ? s2 = on, s3 = off current limit vs. temperature 1.6 1.7 1.8 1.9 2 2.1 -40-20 0 20406080100120 temperature v in = 5v c in = 10uf, c out = 33uf r l = 0.5 ? , r set = 100k ? s2 = on, s3 = off ( c) 5 5 2 2 2 2
7 rt9703 preliminary current limit factor vs. r set -10 -8 -6 -4 -2 0 2 4 6 8 10 12 50 100 150 200 250 300 350 400 r set (k ? ) on-resistance vs. temperature 48 58 68 78 88 -40 -20 0 20 40 60 80 100 120 temperature on-resistance vs. input voltage 62 63 64 65 66 67 68 69 70 2 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) v in = 5v, r l = 0.5 ? c in = 10uf, c out = 33uf s2 = on, s3 = off current limit vs. r set 0 0.5 1 1.5 2 2.5 3 3.5 4 50 100 150 200 250 300 350 400 450 500 r set (k ) v in = 5v, r l = 0.5 ? c in = 10uf, c out = 33uf s2 = on, s3 = off ? inrush current response time (5ms/div) c out = 1000uf v in = 5v, c in = 10uf r l = 0.5 ?, r set = 150k ?, s2 = on, s3 = off c out = 470uf c out = 1uf short circuit current response time (10ms/div) v out i out v in = 5v, c in = 10uf, c out = 0.1uf r set = 150k ?, s2 = s3 = on 55 5 5 ( c) 33 i out = 0.5a, r set = 50k ? c in = 10uf, c out = 33uf i out = 0.5a, r set = 50k ? c in = 10uf, c out = 33uf v in = 5v
8 rt9703 preliminary ce threshold voltage vs. input voltage 0 0.4 0.8 1.2 1.6 2 2.4 22.5 33.5 44.5 55.5 input voltage (v) c in = 10uf, c out = 33uf i l = 100ma, r set = 100k ? turn-on rising time vs. temperature 0 0.5 1 1.5 2 2.5 3 3.5 4 -40 -20 0 20 40 60 80 100 120 temperature v in = v ce = 5v c in = 10uf, c out = 1uf r l = 30 ? , r set = 200k ? s1 = on ( c) turn-off leakage current vs. temperature -0.3 -0.2 -0.1 0 0.1 0.2 0.3 -40-20 0 20406080100120 temperature v in = 5v, v ce = 0v c in = 10uf, c out = 33uf r l = 0 ? , r set = 100k ? ( c) ce threshold voltage vs. temperature 0 0.4 0.8 1.2 1.6 2 2.4 -40 -20 0 20 40 60 80 100 120 temperature ( c) v in = 5v, i l = 100mv c in = 10uf, c out = 33uf r set = 100k ? turn-off falling time vs. temperature 0 1 2 3 4 5 6 -40 -20 0 20 40 60 80 100 120 temperature ( c) v in = 5v, v ce = 0v c in = 10uf, c out = 1uf r l = 30 ? , r set = 200k ? s 1 = on flag dealy time vs. input voltage 0 2 4 6 8 10 2 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) v ce = 5v c in = 10uf, c out = 33uf r l = 0.5 ? , r set = 100k ? r fg = 1k ? 1 1 2 4 4 4
9 rt9703 preliminary flag delay time vs. temperature 4 5 6 7 8 9 -40-20 0 20406080100120 temperature ( c) v in = v ce = 5v c in = 10uf, c out = 33uf r l = 0.5 ? , r set = 100k ? r fg = 1k ? uvlo threshold vs. temperature 0 0.5 1 1.5 2 2.5 3 3.5 -40-20 0 20406080100120 temperature ( c) c in = 10uf, c out = 33uf r l = 1k ? , r set = 100k ? turn-on response time (250us/div) v ce v out v in = 5v c in = 10uf, c out = 1uf r l = 33 ? , r set = 200k ? s1 = on turn-off response time (100us/div) v ce v out v in = 5v c in = 10uf, c out = 1uf r l = 30 ? , r set = 200k ? s1 = off i l uvlo at rising time (1ms/div) v in v out v in = v ce = 5v c in = 1000uf, c out = 1uf r l = 30 ? , r set = 200k ? uvlo at falling time (25ms/div) v in v out v in = v ce = 5v c in = 1000uf, c out = 1uf r l = 30 ? , r set = 200k ? 1 1 4 4 4 4
10 rt9703 preliminary flag response (enable into current limit) time (1ms/div) v flg v ce v in = 5v c in = 1uf, c out = 33uf r l = 0.5 ? , r set = 150k ? r fg = 1k ?, s1 = off i l (1a/div) flag response at chip enable time (10ms/div) v flg v ce r l = 0.5 ? , r set = 350k ? r fg = 1k ?, s1 = off i l (0.5a/div) v in = 5v c in = 1uf, c out = 33uf v out current limit with thermal shutdown time (50ms/div) v ce i l (1a/div) v in = 5v c in = 10uf c out = 33uf r l = 0.5 ?, r set = 100k ? s2 = on, s3 = off soft-start response time (2ms/div) v ce i l v out v in = 5v, r l = 0.5 ?, c in = 10uf, c out = 1uf s2 = off on, s3 = off short- circuit with thermal shutdown time (10ms/div) v trigger i l (0.5a/div) v in = 5v, c in = 10uf, c out = 33uf r set = 100k ?, s2 = on, s3 = on 11 5 5 5
11 rt9703 preliminary applications information the rt9703 is a high-side, n-channel, power switch available with active-high enable input. low r ds(on) dd 80m ? and full protection functions make it optimized to replace complex discrete on/off control circuitry. input and output v in (input) is the power source connection to the internal circuitry and the drain of the mosfet. v out (output) is the source of the mosfet. in a typical application, current flows through the switch from v in to v out toward the load. if v out is greater than v in , current will flow from v out to v in since the mosfet is bidirectional when on. unlike a normal mosfet, there is no a parasitic body diode between drain and source of the mosfet, the rt9703 prevents reverse current flow if v out being externally forced to a higher voltage than v in when the output disabled (v ce < 0.8v). d s g normal mosfe t rt9704 d s g d s g d s g normal mosfe t rt9704 d s g d s g chip enable input the switch will be disabled when the ce pin is in a logic low condition. during this condition, the internal circuitry and mosfet are turned off, reducing the supply current to 0.1 a typically. the maximum guaranteed voltage for a logic low at the ce pin is 0.8v. a minimum guaranteed voltage of 2v at the ce pin will turn the rt9703 back on. floating the input may cause unpredictable operation. ce should not be allowed to go negative with respect to gnd. the ce pin may be directly tied to v in to keep the part on. soft-start for hot plug-in applications in order to eliminate the upstream voltage droop caused by the large inrush current during hot-plug events, the ? soft-start ? feature effectively isolates the power source from extremely large capacitive loads. fault flag the rt9703 provides a flg signal pin which is an n-channel open drain mosfet output. this open drain output goes low when v out < v in -1v, current limit or the die temperature exceeds 130 c approximately. the flg output is capable of sinking a 10ma load to typically 150mv above ground. the flg pin requires a pull-up resistor, this resistor should be large in value to reduce energy drain. a 100k ? pull-up resistor works well for most applications. in the case of an over-current condition, flg will be asserted only after the flag response delay time, t d , has elapsed. this ensures that flg is asserted only upon valid over-current conditions and that erroneous error reporting is eliminated. for example, false over-current conditions may occur during hot-plug events when a highly large capacitive load is connected and causes a high transient inrush current that exceeds the current limit threshold. the flg response delay time t d is typically 4.6ms. under-voltage lockout under-voltage lockout (uvlo) prevents the mosfet switch from turning on until input voltage exceeds approximately 1.7v. if input voltage drops below approximately 1.3v, uvlo turns off the mosfet switch, flg will be asserted accordingly. under- voltage detection functions only when the chip enable input is enabled. current limiting and short-circuit protection the current limit circuitry prevents damage to the mosfet switch and external load. it is user adjust- able with an external set resistor, r set , i limit = 180k/r set in the range of 500ma to 3.5a. the accuracy of current limit set point may vary with operating temperature and supply voltage. see ? typical operating characteristics ? graph for further details.
12 rt9703 preliminary the normal current limit value, i limit , is set with an external resistor between ip (pin 8) and gnd (pin 4). when a heavy load or short circuit is applied to an enabled switch, a large transient current may flow until the current limit circuitry responds. once this current limit threshold is exceeded, the device enters constant current mode until the thermal shutdown occurred or the fault is removed. it is important to note that the maximum current limit value shall be set properly in accordance with its supply voltage otherwise it may result in the failure occurrence. the graph below shows the maximum current limit and supply voltage on the safe operation area. thermal shutdown thermal shutdown is employed to protect the device from damage if the die temperature exceeds approxi- mately 130 c. if enabled, the switch automatically restarts when the die temperature falls 10 c. the output and flg signal will continue to cycle on and off until the device is disabled or the fault is removed. power dissipation the device's junction temperature depends on several factors such as the load, pcb layout, ambient temperature and package type. the output pin of rt9703 can deliver a current of up to 3a over the full operating junction temperature range. however, the maximum output current must be derated at higher ambient temperature to ensure the junction temperature does not exceed 100c. with all possible conditions, the junction temperature must be within the range specified under operating conditions. power dissipation can be calculated based on the output current and the r ds(on) of switch as below. p d = r ds(on) x i out 2 although the devices are rated for 3a of output current, but the application may limit the amount of output current based on the total power dissipation and the ambient temperature. the final operating junction temperature for any set of conditions can be estimated by the following thermal equation: p d (max) = ( t j (max) - t a ) / ja where t j (max) is the maximum junction temperature of the die (100c) and t a is the maximum ambient temperature. the junction to ambient thermal resistance ( ja ) for sop-8 package at recommended minimum footprint is 104 c/w ( ja is layout dependent). supply filter/bypass capacitor a 10 f low-esr ceramic capacitor from v in to gnd (the amount of the capacitance may be increased without limit), located at the device is strongly recommended to prevent the input voltage drooping during hot-plug events. however, higher capacitor values will further reduce the voltage droop on the input. furthermore, without the bypass capacitor, an output short may cause sufficient ringing on the input (from source lead inductance) to destroy the internal control circuitry. an important note to be award of is the parasitic inductance of pcb traces can cause over-voltage transients if the pcb trace has even a few tens of nh of inductance. it is recommended to use aluminum electrolytic acted the supply capacitor to prevent the device from being damaged. the input transient must not exceed 6.5v of the absolute maximum supply voltage even for a short duration. maximun current limit vs. supply voltage 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 2 2.5 3 3.5 4 4.5 5 5.5 supply voltage (v) t a = 25 c
13 rt9703 preliminary fault flag filtering (optional) the transient inrush current to downstream capacitance may cause a short-duration error flag, which may cause erroneous over-current reporting. a simple 1ms rc low- pass filter (10k ? and 0.1 f) in the flag line eliminates short-duration transients. pcb layout in order to meet the voltage drop, droop, and emi requirements, careful pcb layout is necessary. the following guidelines must be considered: keep all input and output traces as short as possible and use at least 150-mil, 2 ounce copper for all races. avoid vias as much as possible. if vias are necessary, make them as large as feasible. place a ground plane under all circuitry to lower both resistance and inductance and improve dc and transient performance (use a separate ground and power plans if possible). locate the bypass capacitors as close as possible to the input and output pin of the rt9703.

board layout
14 rt9703 preliminary outline dimension 8-lead sop plastic package a b j f h m c d i dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.178 0.254 0.007 0.010 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 richtek technology corp. headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corp. taipei office (marketing) 8f-1, no. 137, lane 235, paochiao road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)89191466 fax: (8862)89191465 email: marketing@richtek.com

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