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agilent hfbr-5710l/lp small form factor pluggable optical transceiver for gigabit ethernet (1.25 gbd) data sheet description the hfbr-5710l optical transceiver is compliant with the specifications set forth in both the ieee802.3 (1000base-sx), and the small form-factor pluggable (sfp) multi-source agreement (msa). its primary application is servicing gigabit ethernet links between optical networking equipment. it offers previously unavailable system cost, upgrade, and reliability benefits by virtue of being hot-pluggable. further, it incorporates the latest 3.3 vdc compatible transceiver technology including an 850 nm vcsel transmitter as well as a convenient lc-duplex optical interface. applications ? switch to switch interface ? switched backplane applications ? file server interface ? iscsi applications related products ? hfbr-5701l: dual specified 1.25 gbd ethernet (1000base-sx) and 1.0625 gbd fibre channel (100-m5- sn-i, 100-m6-sn-i) sfp ? hfbr-5720l: 2.125 gbd fibre channel (200-m5-sn-i, 200-m6-sn-i) multi-mode sfp ? hfbr-5730l: 1.0625 gbd fibre channel (100-m5-sn-i, 100-m6-sn-i) multi-mode sfp ? hdmp-1687: quad channel serdes ic 1.25 gbd ethernet ? hdmp-1646a: single channel serdes ic for 1.25 gbd ethernet and 1.0625 gbd fibre channel features ? ieee 802.3 gigabit ethernet (1.25 gbd) 1000base-sx compliant ? small form factor pluggable (sfp) multi-source agreement (msa) compliant ? manufactured in an iso 9001 compliant facility ? hot-pluggable ? optional extended de-latch for high density applications as shown in figure 10 C HFBR-5710LP extended de-latch C hfbr-5710l standard de-latch ? +3.3 v dc power supply ? industry leading emi performance for high port density ? 850 nm vertical cavity surface emitting laser (vcsel) ? eye safety certified: C us 21 cfr(j) C en 60825-1 (+all) ? lc-duplex fiber connector compatible ? fiber compatibility: C 2 to 550 meters with 50/125 m m fiber C 2 to 275 meters with 62.5/125 m m fiber
2 figure 1. hfbr-5710l block diagram. overview the hfbr-5710l offers maxi- mum flexibility to designers, manufacturers, and operators of gigabit ethernet networking equipment. a pluggable architec- ture allows the module to be installed into msa standard sfp ports at any time C even with the host equipment operating and online. this facilitates the rapid configuration of equipment to precisely the users needs C reducing inventory costs and network downtime. compared with traditional transceivers, the size of the small form factor package enables higher port densities. module diagrams figure 1 illustrates the major functional components of the hfbr-5710l. the external configuration of the module is depicted in figure 7. figure 8 depicts the panel and host board footprints. installation the hfbr-5710l can be installed in or removed from any msa- compliant pluggable small form figure 2. pin description of the sfp electrical interface. factor port regardless of whether the host equipment is operating or not. the module is simply inserted, electrical-interface first, under finger-pressure. controlled hot-plugging is ensured by 3-stage pin sequencing at the electrical interface. this printed circuit board card-edge connector is depicted in figure 2. as the hfbr-5710l is inserted, first contact is made by the housing ground shield, dis- charging any potentially component-damaging static electricity. ground pins engage next and are followed by tx and rx power supplies. finally, signal lines are connected. pin functions and sequencing are listed in table 2. v ee t 20 td 19 td+ 18 v ee t 17 v cc t 16 v cc r 15 v ee r 14 rd+ 13 rd 12 v ee r 11 top of board v ee t 1 tx fault 2 tx disable 3 mod-def(2) 4 mod-def(1) 5 mod-def(0) 6 rate select 7 los 8 v ee r 9 v ee r 10 bottom of board (as viewed through top of board) engagement sequence 3 2 1 3 2 1 incoming optical signal outgoing optical signal photodetector receiver amplification & quantization rd+ (receive data) rd?(receive data) loss of signal vcsel transmitter laser driver & safety circuitry tx_disable td+ (transmit data) td?(transmit data) tx_fault electrical interface mod-def2 mod-def1 mod-def0 eeprom optical interface
3 before extracting the module, the black plastic tab beneath the optical port must be depressed, releasing the latch mechanism. the transceiver can then be pulled out of the port manually by gripping the side of the lc ports. for easier fingertip delatching in high port density applications, an optional extended tab is offered as shown in figure 10. serial identification (eeprom) the hfbr-5710l features an eeprom for serial id. it contains the product data stored for retrieval by host equipment. this data is accessed via the 2- wire serial eeprom protocol of the atmel at24c01a or similar in compliance with the industry standard sfp multi-source agreement. contents of the hfbr-5710l serial id memory are displayed in table 9. transmitter section the transmitter section includes the transmitter optical sub- assembly (tosa) and laser driver circuitry. the tosa, containing an 850 nm vcsel (vertical cavity surface emitting laser) light source, is located at the optical interface and mates with the lc optical connector. the tosa is driven by a custom ic, which converts differential logic signals into an analog laser diode drive current. this tx driver circuit regulates the optical power at a constant level provided the data pattern is dc balanced (8b10b code for example). tx disable the hfbr-5710l accepts a transmit disable control signal input which shuts down the transmitter. a high signal implements this function while a low signal allows normal laser operation. in the event of a fault (e.g., eye safety circuit activated), cycling this control signal resets the module as depicted in figure 6. eye safety circuit the hfbr-5710l provides class 1 eye safety by design and has been tested for compliance with the requirements listed in table 1. the eye safety circuit continuously monitors optical output power levels and will disable the transmitter and assert a tx_fault signal upon detecting an unsafe condition. such unsafe conditions can be created by inputs from the host board (vcc fluxuation, unbalanced code) or faults within the module. receiver section the receiver section includes the receiver optical subassembly (rosa) and amplification/ quantization circuitry. the rosa, containing a pin photodiode and custom trans-impedance preamplifier, is located at the optical interface and mates with the lc optical connector. the rosa is mated to a custom ic that provides post-amplification and quantization. also included is a loss of signal (los) detection circuit. loss of signal the loss of signal (los) output indicates an unusable optical input power level. a high los output signal indicates a loss of signal while a low los output signal indicates normal operation. the loss of signal thresholds are set to indicate a definite optical fault has occurred (e.g., disconnected or broken fiber connection to receiver, failed transmitter, etc.). functional i/o the hfbr-5710l accepts industry standard differential signals such as lvpecl and cml within the scope of the sfp msa. to simplify board requirements, transmitter bias resistors and coupling capacitors are incorporated into the transceiver module. the module is ac- coupled and internally terminated. figure 4 illustrates a recom- mended interface circuit to link the hfbr-5710l to the supporting physical layer integrated circuits. timing diagrams for the msa compliant control signals implemented in this module are depicted in figure 6. figure 3. msa required power supply filter. 1 ? 1 ? 0.1 ? v cc r sfp module 10 ? v cc t 0.1 ? 10 ? 3.3 v host board 0.1 ?
4 required host board components the msa power supply noise rejection filter is required on the host pcb to meet data sheet performance. the msa filter incorporates an inductor which should be rated 400 madc and 1 w series resistance or better. it should not be replaced with a ferrite. the required filter is illustrated in figure 3. the msa also specifies that 4.7 k to 10 k w pull-up resistors for tx_fault, los, and mod_def0,1,2 are required on the host pcb. application support evaluation kit to assist in the transceiver evaluation process, agilent offers a 1.25 gbd gigabit ethernet evaluation board which facilitates testing of the hfbr-5710l. it can be obtained through the agilent field organization by referencing agilent part number hfbr-0571. reference designs a reference design including the hfbr-5710l and the hdmp- 1687 gigabit quad serdes is available. it may be obtained through the agilent field sales organization. regulatory compliance see table 1 for transceiver regulatory compliance. certi- fication level is dependent on the overall configuration of the host equipment. the transceiver performance is offered as a figure of merit to assist the designer. electrostatic discharge (esd) there are two design cases in which immunity to esd damage is important. the first case is during handling of the transceiver prior to insertion into the transceiver port. to protect the transceiver, its important to use normal esd handling precautions. these precautions include using grounded wrist straps, work benches, and floor mats in esd controlled areas. the esd sensitivity of the hfbr-5710l is compatible with typical industry production environments. the second case to consider is static discharges to the exterior of the host equipment chassis after installation. to the extent that the optical interface is exposed to the outside of the host equipment chassis, it may be subject to system-level esd requirements. immunity the esd performance of the hfbr-5710l exceeds typical industry standards. equipment hosting hfbr-5710l modules will be subjected to radio-frequency electromagnetic fields in some environments. the transceiver has good immunity to such fields due to its shielded design. electromagnetic interference (emi) equipment incorporating gigabit ethernet transceivers is typically required to meet the require- ments of the fcc in the united states, cenelec en55022 (cispr 22) in europe, and vcci in japan. the metal housing and shielded design of the hfbr-5710l minimize the emi challenge facing the host equipment designer. flammability the hfbr-5710l transceiver is made of metal and high strength, heat resistant, chemically resistant, and ul 94v-0 flame retardant plastic. caution there are no user serviceable parts nor any maintenance required for the hfbr-5710l. all adjustments are made at the factory before shipment to our customers. tampering with, modifying, misusing or improp- erly handling the hfbr-5710l will void the product warranty. it may also result in improper operation of the hfbr-5710l circuitry, and possible overstress of the laser source. device degradation or product failure may result. connection of the hfbr-5710l to a non-gigabit ethernet-compliant optical source, operating above the recommended absolute maximum conditions or operating the hfbr-5710l in a manner inconsistent with its design and function may result in hazardous radiation exposure and may be considered an act of modifying or manufacturing a laser product. the person(s) performing such an act is required by law to re- certify and re-identify the laser product under the provisions of u.s. 21 cfr (subchapter j).
5 table 1. regulatory compliance feature test method performance electrostatic discharge (esd) jedec/eia class 2 (> +2000 volts) to the electrical pins jesd22-a114-a electrostatic discharge (esd) variation of iec 6100-4-2 typically withstands at least 25 kv without to the duplex lc receptacle damage when the duplex lc connector receptacle is contacted by a human body model probe electromagnetic interference fcc class b applications with high sfp port counts are (emi) cenelec en55022 class b expected to be compliant; however, margins are (cispr 22a) vcci class 1 dependent on customer board and chassis design. immunity variation of iec 61000-4-3 typically shows a negligible effect from a 10 v/m field swept from 80 to 1000 mhz applied to the transceiver without a chassis enclosure. eye safety [1] us fda cdrh ael class 1 cdrh certification #9720151-13 en(iec)60825-1,2, en60950 tuv file #e9971083.07 class 1 component recognition underwriters laboratories and ul file #e173874 canadian standards associa- tion joint component recognition for information technology equipment including electrical business equipment note: 1. changes to iec 60825-1,2 are currently anticipated to allow higher eye-safe optical output power levels. agilent may choose to take advantage of these in future revisions to this part. figure 4. typical application configuration. laser driver & eye safety circuitry 50 w 50 w so1+ so1 amplification & quantization 50 w 50 w si1+ si1 vrefr tbc ewrap rbc rx_rate rx_los gpio(x) gpio(x) gp14 tx_fault gp04 sync loop syn1 rc1(0:1) rfct tx[0:9] rx[0:9] tx_fault tx_disable veet rd+ rd rx_los mod_def2 eeprom mod_def1 mod_def0 ref_rate note: * 4.7 k < res < 10 k w v cc t,r 125 mhz agilent hfbr-5710l v cc t 1 ? 1 ? 10 ? 0.1 ? v cc t,r v cc r 10 ? 0.1 ? 0.1 ? agilent hdmp-1687 r rcm0 c c refclk mac asic *res *res *res *res veer td+ td c c r *res housing ground *res
6 table 2. pin description engagement order pin name function/description (insertion) notes 1 veet transmitter ground 1 2 tx fault transmitter fault indication 3 1 3 tx disable transmitter disable - module disables on high or open 3 2 4 mod-def2 module definition 2 - two wire serial id interface 3 3 5 mod-def1 module definition 1 - two wire serial id interface 3 3 6 mod-def0 module definition 0 - grounded in module 3 3 7 rate select not connected 3 8 los loss of signal 3 4 9 veer receiver ground 1 10 veer receiver ground 1 11 veer receiver ground 1 12 rd- inverse received data out 3 5 13 rd+ received data out 3 5 14 veer receiver ground 1 15 vccr receiver power - 3.3 v 5% 2 6 16 vcct transmitter power - 3.3 v 5% 2 6 17 veet transmitter ground 1 18 td+ transmitter data in 3 7 19 td- inverse transmitter data in 3 7 20 veet transmitter ground 1 notes: 1. tx fault is an open collector/drain output which should be pulled up externally with a 4.7k C 10 k w resistor on the host board to a supply < vcct+0.3 v or vccr+0.3 v. when high, this output indicates a laser fault of some kind. low indicates normal operation. in the low state, the output will be pulled to < 0.8 v. 2. tx disable input is used to shut down the laser output per the state table below. it is pulled up within the module with a 4.7-10 k resistor. low (0 C 0.8 v): transmitter on between (0.8 v and 2.0 v): undefined high (2.0 C 3.465 v): transmitter disabled open: transmitter disabled 3. mod-def 0,1,2. these are the module definition pins. they should be pulled up with a 4.7-10 k w resistor on the host board to a supply less than vcct +0.3 v or vccr+0.3 v. mod-def 0 is grounded by the module to indicate that the module is present mod-def 1 is clock line of two wire serial interface for optional serial id mod-def 2 is data line of two wire serial interface for optional serial id 4. los (loss of signal) is an open collector/drain output which should be pulled up externally with a 4.7 k C 10 k w resistor on the host board to a supply < vcct,r+0.3 v. when high, this output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). low indicates normal operatio0n. in the low state, the output will be pulled to < 0.8 v. 5. rd-/+: these are the differential receiver outputs. they are ac coupled 100 w differential lines which should be terminated with 100 w differential at the user serdes. the ac coupling is done inside the module and is thus not required on the host board. the voltage swing on these lines must be between 370 and 2000 mv differential (185 C 1000 mv single ended) according to the msa. typically it will be 1500mv differential. 6. vccr and vcct are the receiver and transmitter power supplies. they are defined as 3.135 C 3.465 v at the sfp connector pin. the in-rush current will typically be no more than 30 ma above steady state supply current after 500 nanoseconds. 7. td-/+: these are the differential transmitter inputs. they are ac coupled differential lines with 100 w differential termination inside the module. the ac coupling is done inside the module and is thus not required on the host board. the inputs will accept differential swings of 500 C 2400 mv (250 C 1200 mv single ended). however, the applicable recommended differential voltage swing is found in table 5.
7 table 5. transceiver electrical characteristics (t c = 0 c to 70 c, v cct,r = 3.3 v 5%) parameter symbol minimum typical maximum unit notes module supply current i cc 160 220 ma power dissipation p diss 530 765 mw power supply noise psnr 100 mv pp 1 rejection (peak-peak) data input: transmitter differential v i 500 1660 mv pp 2 input voltage (td +/C) data output: receiver differential v o 370 1500 2000 mv pp 3 output voltage (rd +/C) receive data rise & fall t rf 220 ps times sense outputs: transmit fault v oh 2.0 v cc v [tx_fault, loss of signal (los), mod_def2] v ol 0 0.8 v control inputs: transmitter disable v ih 2.0 v cc v [tx_disable, mod_def1,2] v il 0 0.8 v table 3. absolute maximum ratings parameter symbol minimum maximum unit notes ambient storage temperature ts C40 +100 c1 (non-operating) case temperature t c C40 +85 c1 relative humidity rh 5 95 % 1 supply voltage v cct,r C0.5 3.6 v 1 voltage at any input pin v ih C0.5 v cc v1 sense output current C los, tx fault id 150 ma 1 sense output current C mod_def2 id 5 ma 1 table 4. recommended operating conditions parameter symbol minimum typical maximum unit notes case temperature t c 02570 c 1, 2 supply voltage v cc 3.135 3.3 3.465 v 1 date rate 1.25 gb/s 1 notes: 1. recommended operating conditions are those within which functional performance within data sheet characteristics is intended. 2. refer to the reliability data sheet for specific reliability performance predictions. notes: 1. measured at the input of the required msa filter on host board. 2. internally ac coupled and terminated to 100 w differential load. 3. internally ac coupled, but requires a 100 ohm differential termination at or internal to serializer/deserializer. notes: 1. absolute maximum ratings are those values beyond which damage to the device may occur if these limits are exceeded. see reliability data sheet for specific reliability performance. 2. between absolute maximum ratings and the recommended operating conditions functional performance is not intended, device reliability is not implied, and damage to the device may occur.
8 table 6. transmitter optical characteristics (t c = 0 c to 70 c, v cct,r = 3.3 v 5%) parameter symbol minimum typical maximum unit notes output optical power (average) pout C9.5 C6.5 0 dbm 1, 2, 3 optical extinction ratio er 9 14.5 db 1 center wavelength l c 830 850 860 nm 1 spectral width C rms s 0.85 nm 1 optical rise/fall time t rise/fall 150 260 ps 1 relative intensity noise, maximum rin C117 db/hz 1 total jitter tj 227 ps 1 (tp1 to tp2 contribution) 0.284 ui 1 pout tx_disable asserted p off C35 dbm 1 figure 5a. gigabit ethernet transmitter eye mask diagram. 80 50 20 0 22 37.5 78 normalized time (% of unit interval) normalized amplitude (%) 100 100 0 130 62.5 ?0 0.80 0.50 0.20 1.00 0 1.30 ?.20 normalized amplitude 0 0.22 0.375 0.78 1.0 0.625 normalized time (unit interval) notes: 1. ieee 802.3. 2. max. pout is the lesser of 0 dbm or maximum allowable per eye safety standard. 3. 50/125 m m fiber with na = 0.2, 62.5/125 m m fiber with na = 0.275. figure 5b. typical hfbr-5710l eye mask diagram.
9 table 7. receiver optical characteristics (t c = 0 c to 70 c, v cct,r = 3.3 v 5%) parameter symbol minimum typical maximum unit notes optical input power pr C17 0 dbm 1 receiver sensitivity prmin C21 C17 dbm 1 (optical input power) stressed receiver sensitivity C12.5 dbm 1, 2 C13.5 dbm 1, 3 total jitter tj 266 ps 1 (tp3 to tp4 contribution) 0.332 ui 1 return loss C12 db 1 los de-asserted p d C17 dbm 1 los asserted p a C31 dbm 1 los hysterisis p d - p a 3db1 table 8. transceiver timing characteristics (t c = 0 c to 70 c, v cct,r = 3.3 v 5%) parameter symbol minimum typical maximum unit notes tx disable assert time t_off 10 m s1 tx disable negate time t_on 1 ms 2 time to initialize, including t_init 300 ms 3 reset of tx_fault tx fault assert time t_fault 100 m s4 tx disable to reset t_reset 10 m s5 los assert time t_loss_on 100 m s6 los deassert time t_loss_off 100 m s7 serial id clock rate f_serial_clock 100 khz notes: 1. time from rising edge of tx disable to when the optical output falls below 10% of nominal. 2. time from falling edge of tx disable to when the modulated optical output rises above 90% of nominal. 3. from power on or negation of tx fault using tx disable. 4. time from fault to tx fault on. 5. time tx disable must be held high to reset tx_fault. 6. time from los state to rx los assert. 7. time from non-los state to rx los deassert. notes: 1. ieee 802.3. 2. 62.5/125 m m fiber. 3. 50/125 m m fiber.
10 figure 6. transceiver timing diagrams (module installed except where noted). tx_fault v cc > 3.15 v t_init tx_disable transmitted signal t_init tx_fault v cc > 3.15 v tx_disable transmitted signal t-init: tx disable negated t-init: tx disable asserted tx_fault v cc > 3.15 v t_init tx_disable transmitted signal t_off tx_fault tx_disable transmitted signal t-init: tx disable negated, module hot plugged t-off & t-on: tx disable asserted then negated insertion t_on tx_fault occurance of fault t_fault tx_disable transmitted signal tx_fault occurance of fault tx_disable transmitted signal t-fault: tx fault asserted, tx signal not recovered t-reset: tx disable asserted then negated, tx signal recovered t_reset t_init* * sfp shall clear tx_fault in t_init if the failure is transient tx_fault occurance of fault t_fault2 tx_disable transmitted signal occurance of loss los t-fault2: tx disable asserted then negated, tx signal not recovered note: t_fault2 timing is typically 1.7 to 2 ms. t-loss-on & t-loss-off t_loss_on t_init* t_reset * sfp shall clear tx_fault in t_init if the failure is transient t_loss_off optical signal
11 table 9. eeprom serial id memory contents address hex ascii address hex ascii address hex ascii address hex ascii 0 03 32 20 64 00 96 note 4 1043320651 a 97 note 4 2 07 34 20 66 00 98 note 4 3 00 35 20 67 00 99 note 4 4 00 36 00 68 note 1 100 note 4 5 00 37 00 69 note 1 101 note 4 6 01 38 30 70 note 1 102 note 4 720 39 d 3 71 note 1 103 note 4 8 40 40 48 h 72 note 1 104 note 4 90 c 41 46 f 73 note 1 105 note 4 10 00 42 42 b 74 note 1 106 note 4 11 01 43 52 r 75 note 1 107 note 4 12 0 c 44 2 d - 76 note 1 108 note 4 13 00 45 35 5 77 note 1 109 note 4 14 00 46 37 7 78 note 1 110 note 4 15 00 47 31 1 79 note 1 111 note 4 16 37 48 30 0 80 note 1 112 note 4 17 1 b 49 4 c l 81 note 1 113 note 4 18 00 50 20 82 note 1 114 note 4 19 00 51 20 83 note 1 115 note 4 20 41 a 52 20 84 note 2 116 note 4 21 47 g 53 20 85 note 2 117 note 4 22 49 i 54 20 86 note 2 118 note 4 23 4 c l 55 20 87 note 2 119 note 4 24 45 e 56 20 88 note 2 120 note 4 25 4 e n 57 20 89 note 2 121 note 4 26 54 t 58 20 90 note 2 122 note 4 27 20 59 20 91 note 2 123 note 4 28 20 60 00 92 00 124 note 4 29 20 61 00 93 00 125 note 4 30 20 62 00 94 00 126 note 4 31 20 63 a9 95 note 3 127 note 4 notes: 1. these addresses are reserved for serial number information and will vary from module to module. 2. these addresses are reserved for date code information and may vary from lot to lot. 3. byte address 95 is a check sum which may vary from module to module. 4. these fields are reserved for future use by agilent technologies.
12 figure 7. module drawing. 13.75 ?0.1 (0.54 ?0.004) 56.40 ?0.2 (2.22 ?0.01) 13.40 ?0.1 (0.53 ?0.004) agilent hfbr-5710l 850 nm laser prod 21cfr(j) class 1 country of origin yyww tuv xxxxxx ul 8.50 ?0.1 (0.33 ?0.004) 11.80 ?0.2 (0.46 ?0.008) 0.7 (0.03) max. uncompressed front edge of sfp transceiver cage 6.25 ?0.05 (0.25 ?0.002) see detail 1 14.20 ?0.1 (0.56 ?0.004) area for process plug 14.8 (0.58) max. uncompressed 13.0 ?0.1 (0.51 ?0.004) tcase reference point detail 1 scale 2x dimensions are in millimeters (inches) tx rx tx rx
13 figure 8. sfp host board mechanical layout. 2x 1.7 20x 0.5 ?0.03 0.9 2 ?0.05 typ. 0.06 l a s b s 10.53 11.93 20 10 11 pin 1 20 10 11 pin 1 0.8 typ. 10.93 9.6 2x 1.55 ?0.05 3.2 5 notes: 1. pads and vias are chassis ground. 2. through holes, plating optional. 3. hatched area denotes component and trace keepout (except chassis ground). 4. area denotes component keepout (traces allowed). dimensions in millimeters 4 3 2 1 1 26.8 5 11x 2.0 3x 10 41.3 42.3 10x 1.05 ?0.01 16.25 ref. 14.25 11.08 8.58 5.68 11x 2.0 11.93 9.6 4.8 8.48 a 3.68 see detail 1 9x 0.95 ?0.05 2.5 7.1 7.2 2.5 34.5 16.25 min. pitch y x detail 1 ? 0.85 ?0.05 pcb edge 0.06 s a s b s ? 0.1 l a s b s ? 0.1 l x a s ? 0.1 s x a s ? 0.1 s x y 3x 10 b
figure 9. assembly drawing. 15 (0.59) 41.73 ?0.5 (1.64 ?0.02) 3.5 ?0.3 (0.14 ?0.01) 1.7 ?0.9 (0.07 ?0.04) bezel pcb area for process plug 10 (0.39) to pcb ref 0.4 ?0.1 (0.02 ?0.004) below pcb 10.4 ?0.1 (0.41 ?0.004) 15.25 ?0.1 (0.60 ?0.004) msa-specified bezel 16.25 ?0.1 (0.64 ?0.004) min. pitch dimensions are in millimeters (inches). 11 (0.43) 1.5 (0.06) below pcb ref. 9.8 (0.39) cage assembly ref. max. max. figure 10. the extended de-latch for belly to belly application. 14
www.semiconductor.agilent.com data subject to change. copyright ? 2001 agilent technologies, inc. june 26, 2001 obsoletes 5988-2462en 5988-3323en

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