Part Number Hot Search : 
TDA4657 492LL DSPIC C550B 2SK108 BC108 2118M S2805D
Product Description
Full Text Search
 

To Download ICS841S012I Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  crystal-to-0.7v differential hcsl/ lvcmos frequency synthesizer ICS841S012I data sheet nrnd ics841s012bki revision a november 10, 2009 1 ? 2009 integrated device technology, inc. g eneral d escription the ICS841S012I is an optimized pcie, srio and gigabit ethernet frequency synthesizer and a member of hiperclocks? family of high perfor- mance clock solutions from idt. the ICS841S012I uses a 25mhz parallel resonant crystal to gener- ate 33.33mhz - 200mhz clock signals, replacing multiple oscillator and fanout buffer solutions. the device supports 0.25% center-spread, and -0.5% down- spread clocking with two spread select pins (ssc[1:0]). the vco operates at a fre- quency of 2ghz. the device has three output banks: bank a with two hcsl outputs, 100mhz ? 250mhz; bank b with seven 33.33mhz ? 200mhz lvcmos/ lvttl outputs; and bank c with one 33.33mhz ? 200mhz lvcmos/lvttl output. all banks a, b and c have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. the low jitter characteristic of the ICS841S012I makes it an ideal clock source for pcie, srio and gigabit ethernet applications. designed for networking and industrial applications, the ICS841S012I can also drive the high- speed clock inputs of communication processors, dsps, switches and bridges. hiperclocks? ic s f eatures ? two 0.7v differential hcsl outputs (bank a), configurable for pcie (100mhz or 250mhz) and srio (100mhz or 125mhz) clock signals eight lvcmos/lvttl outputs (banks b/c), 18 typical output impedance two ref_out lvcmos/lvttl clock outputs, 23 typical output impedance ? selectable crystal oscillator interface, 25mhz, 18pf parallel resonant crystal or one lvcmos/lvttl single-ended reference clock input ? supports the following output frequencies: hcsl bank a: 100mhz, 125mhz, 200mhz and 250mhz lvcmos/lvttl bank b/c: 33.33mhz, 50mhz, 66.67mhz, 100mhz, 125mhz, 133.33mhz, 166.67mhz and 200mhz ? vco: 2ghz ? spread spectrum clock: 0.25% center-spread (typical) and -0.6% down-spread (typical) ? pll bypass and output enable ? rms period jitter: 20ps (typical), qb outputs ? full 3.3v supply mode ? -40c to 85c ambient operating temperature ? available in lead-free (rohs 6) package ? not recommended for new designs p in a ssignment 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 36 37 38 39 40 41 42 35 34 33 32 31 30 29 v dd ref_out0 ref_out1 gnd gnd ref_in v dd v dd ref_sel xtal_in xtal_out bypass ref_oe nmr v ddoc qc gnd qbc_oe v dda v dda v dd gnd gnd iref qa0 nqa0 qa1 nqa1 gnd gnd ssc1 ssc0 f_selb2 f_selb1 f_selb0 f_selc2 f_selc1 f_selc0 f_sela1 f_sela0 qa_oe v dd qb6 gnd qb5 v ddob qb4 gnd qb3 v ddob v ddob qb2 gnd qb1 qb0 v ddob 48 49 50 51 52 53 54 55 56 47 46 45 44 43 ICS841S012I 56-lead vfqfn 8mm x 8mm x 0.925mm package body k package top view
ics841s012bki revision a november 10, 2009 2 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer b lock d iagram 0 1 1 0 pll vco 2ghz m = 80 na nc osc 2 3 2 qa0 nqa0 qa1 nqa1 qb0 qc qb1 qb2 qb3 qb4 qb5 qb6 ref_out0 ref_out1 qa_oe f_sela[1:0] bypass ref_in iref ref_oe ref_sel nmr ssc[1:0] xtal_in xtal_out 25mhz pulldown pullup 3 f_selc[2:0] pulldown pullup qbc_oe pullup f_selb[2:0] pulldown pulldown pulldown pulldown pulldown pullup spread spectrum nb
ics841s012bki revision a november 10, 2009 3 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 1. p in d escriptions r e b m u ne m a ne p y tn o i t p i r c s e d 9 2 , 8 2 , 4 1 , 7 , 1v d d r e w o p. s n i p y l p p u s e r o c , 2 3 , 0 t u o _ f e r 1 t u o _ f e r t u p t u o . s t u p t u o k c o l c e c n e r e f e r l t t v l / s o m c v l d e d n e - e l g n i s 3 2 . e c n a d e p m i t u p t u o l a c i p y t , 7 2 , 5 1 , 5 , 4 , 6 4 , 0 4 , 6 3 , 5 3 4 5 , 0 5 d n gr e w o p. d n u o r g y l p p u s r e w o p 6n i _ f e rt u p n in w o d l l u p. t u p n i k c o l c e c n e r e f e r l t t v l / s o m c v l d e d n e - e l g n i s 8l e s _ f e rt u p n in w o d l l u p , w o l n e h w . n i _ f e r s t c e l e s h g i h n e h w . n i p t c e l e s e c n e r e f e r . e 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l . l a t s y r c s t c e l e s , 9 0 1 , n i _ l a t x t u o _ l a t x t u p n i . t u p n i e h t s i n i _ l a t x . t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c . n o i t a r e p o r e p o r p r o f d e s u e b t s u m r o t i c a p a c g n i n u t l a n r e t x e 1 1s s a p y bt u p n in w o d l l u p . l l p s t c e l e s , w o l n e h w . l l p s e s s a p y b h g i h n e h w . j 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 2 1e o _ f e rt u p n in w o d l l u p . n i p s e l b a s i d / s e l b a n e t u o _ f e r h g i h e v i t c a . h 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 3 1r m nt u p n ip u l l u p t e s e r e r a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . t e s e r r e t s a m w o l e v i t c a e h t , h g i h c i g o l n e h w . ) z - i h ( e c n a d e p m i h g i h n i e r a s t u p t u o e h t d n a e c a f r e t n i l t t v l / s o m c v l . d e l b a n e e r a s t u p t u o e h t d n a s r e d i v i d l a n r e t n i . i 3 e l b a t e e s . s l e v e l , 6 1 7 1 , 1 c s s 0 c s s t u p n ip u l l u p. d 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l . n i p l o r t n o c c s s , 8 1 , 9 1 0 2 , 2 b l e s _ f , 1 b l e s _ f 0 b l e s _ f t u p n in w o d l l u p . b 3 e l b a t e e s . s t u p t u o x b q r o f s n i p t c e l e s y c n e u q e r f . s l e v e l e c a f r e t n i l t t v l / s o m c v l , 1 2 , 2 2 3 2 , 2 c l e s _ f , 1 c l e s _ f 0 c l e s _ f t u p n in w o d l l u p . c 3 e l b a t e e s . t u p t u o c q r o f s n i p t c e l e s y c n e u q e r f . s l e v e l e c a f r e t n i l t t v l / s o m c v l , 4 2 5 2 , 1 a l e s _ f 0 a l e s _ f t u p n in w o d l l u p . a 3 e l b a t e e s . s t u p t u o x a q n / x a q r o f s n i p t c e l e s y c n e u q e r f . s l e v e l e c a f r e t n i l t t v l / s o m c v l 6 2e o _ a qt u p n ip u l l u p . s t u p t u o a k n a b r o f n i p e l b a n e t u p t u o . f 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 1 3 , 0 3 3 3 , 2 3 1 a q , 1 a q n 0 a q , 0 a q n t u p t u o . s l e v e l e c a f r e t n i l s c h . s t u p t u o k c o l c a k n a b l a i t n e r e f f i d 4 3f e r it u p t u o 5 7 4 ( r o t s i s e r n o i s i c e r p d e x i f l a n r e t x e a s e d i v o r p d n u o r g o t n i p s i h t m o r f ) k c o l c x a q n / x a q e d o m - t n e r r u c l a i t n e r e f f i d r o f d e s u t n e r r u c e c n e r e f e r . s t u p t u o 8 3 , 7 3v a d d r e w o p. n i p y l p p u s g o l a n a 9 3e o _ c b qt u p n ip u l l u p . s t u p t u o c k n a b d n a b k n a b r o f n i p e l b a n e t u p t u o . g 3 e l b a t e e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 1 4c qt u p t u o 8 1 . s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p t u o k c o l c c k n a b d e d n e - e l g n i s . e c n a d e p m i t u p t u o l a c i p y t 2 4v c o d d r e w o p. t u p t u o s o m c v l c q r o f n i p y l p p u s t u p t u o 6 5 , 2 5 , 8 4 , 3 4v b o d d r e w o p. s t u p t u o s o m c v l x b q r o f s n i p y l p p u s t u p t u o , 5 4 , 4 4 , 9 4 , 7 4 5 5 , 3 5 , 1 5 , 1 b q , 0 b q , 3 b q , 2 b q 6 b q , 5 b q , 4 b q t u p t u o 8 1 . s l e v e l e c a f r e t n i l t t v l / s o m c v l . s t u p t u o k c o l c b k n a b d e d n e - e l g n i s . e c n a d e p m i t u p t u o l a c i p y t : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
ics841s012bki revision a november 10, 2009 4 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p c d p n o i t a p i s s i d r e w o p e c n a t i c a p a c c q , ] 6 : 0 [ b qv d d v , , b o d d v c o d d v 5 6 4 . 3 =4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r t u o e c n a d e p m i t u p t u o c q , ] 6 : 0 [ b q8 1 ] 0 : 1 [ t u o _ f e r3 2 t able 3c. f_selc f requency s elect f unction t able s t u p n i ) . f e r z h m 5 2 ( y c n e u q e r f t u p t u o 1 a l e s _ f0 a l e s _ fe u l a v r e d i v i d me u l a v r e d i v i d a n) z h m ( ] 1 : 0 [ a q n / ] 1 : 0 [ a q ll 0 80 2) t l u a f e d ( 0 0 1 lh 0 86 15 2 1 hl 0 80 10 0 2 hh 0 88 0 5 2 t able 3a. f_sela f requency s elect f unction t able t able 3b. f_selb f requency s elect f unction t able s t u p n i ) . f e r z h m 5 2 ( y c n e u q e r f t u p t u o 2 c l e s _ f1 c l e s _ f0 c l e s _ fe u l a v r e d i v i d me u l a v r e d i v i d c n) z h m ( c q lll 0 80 6) t l u a f e d ( 3 3 . 3 3 llh 0 80 40 5 lhl 0 80 37 6 . 6 6 lhh 0 80 20 0 1 hl l 0 86 15 2 1 hlh 0 85 13 3 . 3 3 1 hhl 0 82 17 6 . 6 6 1 hhh 0 80 10 0 2 s t u p n i ) . f e r z h m 5 2 ( y c n e u q e r f t u p t u o 2 b l e s _ f1 b l e s _ f0 b l e s _ fe u l a v r e d i v i d me u l a v r e d i v i d b n) z h m ( ] 6 : 0 [ b q lll 0 80 6) t l u a f e d ( 3 3 . 3 3 llh 0 80 40 5 lhl 0 80 37 6 . 6 6 lhh 0 80 20 0 1 hl l 0 86 15 2 1 hlh 0 85 13 3 . 3 3 1 hhl 0 82 17 6 . 6 6 1 hhh 0 80 10 0 2
ics841s012bki revision a november 10, 2009 5 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 3d. ssc f unction t able t u p n i e d o m 1 c s s0 c s s 00 d a e r p s - n w o d % 5 . 0 - o t 0 01 d a e r p s - r e t n e c % 5 2 . 0 10 d a e r p s - r e t n e c % 5 2 . 0 11 ) t l u a f e d ( f f o c s s t able 3e. ref_sel f unction t able t u p n i l e s _ f e r e c n e r e f e r t u p n i ) t l u a f e d ( 0l a t x 1n i _ f e r t able 3g. qbc_oe f unction t able t u p n i e o _ c b q n o i t c n u f 0) e c n a d e p m i - h g i h ( d e l b a s i d c q d n a ] 6 : 0 [ b q ) t l u a f e d ( 1d e l b a n e c q d n a ] 6 : 0 [ b q t able 3f. qa_oe f unction t able t u p n i e o _ a q n o i t c n u f 0) e c n a d e p m i - h g i h ( d e l b a s i d ] 1 : 0 [ a q n / ] 1 : 0 [ a q ) t l u a f e d ( 1d e l b a n e ] 1 : 0 [ a q n / ] 1 : 0 [ a q t able 3h. ref_oe f unction t able t u p n i e o _ f e r n o i t c n u f ) t l u a f e d ( 0) e c n a d e p m i - h g i h ( d e l b a s i d ] 1 : 0 [ t u o _ f e r 1d e l b a n e ] 1 : 0 [ t u o _ f e r t able 3i. nmr f unction t able t u p n i r m n n o i t c n u f 0 d e l b a s i d r e d i v i d t u p t u o , t e s e r e c i v e d ) e c n a d e p m i - h g i h ( ) t l u a f e d ( 1d e l b a n e t u p t u o o t p u - r e w o p r e t f a l a n g i s t e s e r a s e r i u q e r e c i v e d s i h t : e t o n . y l r e p o r p n o i t c n u f t able 3j. bypass f unction t able t u p n i s s a p y b n o i t c n u f ) t l u a f e d ( 0l l p 1) n e c n e r e f e r ( s s a p y b
ics841s012bki revision a november 10, 2009 6 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, v o -0.5v to v ddo + 0.5v package thermal impedance, ja 31.4c/w (0 mps) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional op- eration of product at these conditions or any conditions beyond those listed in the dc characteristics or ac characteristics is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability. t able 4a. p ower s upply dc c haracteristics , v dd = v ddob = v ddoc = 3.3v5%, t a = -40c to 85c t able 4b. lvcmos/lvttl dc c haracteristics , v dd = v ddob = v ddoc = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n a v d d 0 2 . 0 ?3 . 3v d d v v , b o d d v c o d d e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v i d d t n e r r u c y l p p u s r e w o pd a o l o n s o m c v l , d e d a o l l s c h0 3 3a m i a d d t n e r r u c y l p p u s g o l a n a 0 2a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 2v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 3 . 0 -8 . 0v i h i t u p n i t n e r r u c h g i h , e o _ c b q , e o _ a q , 1 c s s , 0 c s s , r m n v d d v = n i v 5 6 4 . 3 =0 1a . ] 2 : 0 [ b l e s _ f , ] 1 : 0 [ a l e s _ f , e o _ f e r , ] 2 : 0 [ c l e s _ f l e s _ f e r , n i _ f e r , s s a p y b v d d v = n i v 5 6 4 . 3 =0 5 1a i l i t u p n i t n e r r u c w o l , e o _ c b q , e o _ a q , 1 c s s , 0 c s s , r m n v d d v , v 5 6 4 . 3 = n i v 0 =0 5 1 -a . ] 2 : 0 [ b l e s _ f , ] 1 : 0 [ a l e s _ f , e o _ f e r , ] 2 : 0 [ c l e s _ f l e s _ f e r , n i _ f e r , s s a p y b v d d v , v 5 6 4 . 3 = n i v 0 =0 1 -a v h o e g a t l o v h g i h t u p t u ov , b o d d v c o d d i = h o a m 2 - =6 . 2v v l o e g a t l o v w o l t u p t u ov , b o d d v c o d d i = l o a m 2 =5 . 0v t able 5. c rystal c haracteristics r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 0 0 1w . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n
ics841s012bki revision a november 10, 2009 7 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 6. ac c haracteristics , v dd = v ddob = v ddoc = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o ] 6 : 0 [ b q3 3 . 3 30 0 2z h m ] 1 : 0 [ a q n / ] 1 : 0 [ a q0 0 10 5 2z h m c q3 3 . 3 30 0 2z h m t ) b ( k s ; w e k s k n a b 2 , 1 e t o n ] 6 : 0 [ b q 0 8s p ] 1 : 0 [ a q n / ] 1 : 0 [ a q 0 5s p t ) o ( k s3 , 1 e t o n ; w e k s t u p t u o c d n a b s k n a b s s o r c a ) y c n e u q e r f e m a s t a ( 0 6 1s p t ) c c ( t i j e l c y c - o t - e l c y c 1 e t o n ; r e t t i j ] 1 : 0 [ a q n / ] 1 : 0 [ a q y c n e u q e r f e m a s t a s t u p t u o l l a 5 6s p ] 6 : 0 [ b q 0 0 1s p c q 0 0 1s p t ) r e p ( t i jr e t t i j d o i r e p s m r ] 1 : 0 [ a q n / ] 1 : 0 [ a q , y c n e u q e r f e m a s t a s t u p t u o l l a 0 = e o _ f e r 0 1s p c q , ] 6 : 0 [ b q 0 2s p f m n o i t a l u d o m c s s y c n e u q e r f c , b , a s k n a b9 23 3 . 3 3z h k v h g i h 5 , 4 e t o n ; h g i h e g a t l o v 0 1 50 0 2 1v m v w o l 6 , 4 e t o n ; w o l e g a t l o v 0 5 1 -v m v s s o r c ; e g a t l o v g n i s s o r c e t u l o s b a 8 , 7 , 4 e t o n 0 0 10 0 6v m v s s o r c v f o n o i t a i r a v l a t o t s s o r c ; s e g d e l l a r e v o 9 , 7 , 4 e t o n 0 5 3v m t r t / f l l a f / e s i r t u p t u o e m i t a k n a bt n i o p s s o r c m o r f v m 0 5 1 5 20 0 1s p c , b s k n a b% 0 8 - % 0 20 5 10 2 4s n c d oe l c y c y t u d t u p t u o a k n a b5 45 5% c , b s k n a b5 45 5% e h t n e h w d e h s i l b a t s e s i h c i h w , e g n a r e r u t a r e p m e t g n i t a r e p o t n e i b m a d e i f i c e p s e h t r e v o d e e t n a r a u g e r a s r e t e m a r a p l a c i r t c e l e : e t o n r e t f a s n o i t a c i f i c e p s t e e m l l i w e c i v e d e h t . m p f l 0 0 5 n a h t r e t a e r g w o l f r i a e s r e v s n a r t d e n i a t n i a m h t i w t e k c o s t s e t a n i d e t n u o m s i e c i v e d . s n o i t i d n o c e s e h t r e d n u d e h c a e r n e e b s a h m u i r b i l i u q e l a m r e h t . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 1 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o f o k n a b a n i h t i w w e k s s a d e n i f e d : 2 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n v t a d e r u s a e m c , b o d d . 2 / . m r o f e v a w d e d n e - e l g n i s m o r f n e k a t t n e m e r u s a e m : 4 e t o n . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . t o o h s r e v o g n i d u l c n i e g a t l o v s u o e n a t n a t s n i m u m i x a m e h t s a d e n i f e d : 5 e t o n . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . t o o h s r e d n u g n i d u l c n i e g a t l o v s u o e n a t n a t s n i m u m i n i m e h t s a d e n i f e d : 6 e t o n . x q n f o e g d e g n i l l a f e h t s l a u q e x q f o e g d e g n i s i r e h t f o e u l a v e g a t l o v s u o e n a t n a t s n i e h t e r e h w t n i o p g n i s s o r c t a d e r u s a e m : 7 e t o n . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s l l a o t s r e f e r . g n i s s o r c s i e g d e h c i h w f o s s e l d r a g e r , t s e h g i h e h t o t t n i o p g n i s s o r c t s e w o l e h t m o r f n o i t a i r a v l a t o t e h t o t s r e f e r : 8 e t o n . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . t n e m e r u s a e m s i h t r o f s t n i o p g n i s s o r c n i e c n a i r a v d e w o l l a m u m i x a m e h t s i s i h t . x q n g n i l l a f d n a x q g n i s i r f o e g a t l o v g n i s s o r c l l a f o n o i t a i r a v l a t o t e h t s a d e n i f e d : 9 e t o n v e h t s s o r c . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . m e t s y s r a l u c i t r a p y n a r o f
ics841s012bki revision a november 10, 2009 8 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer p arameter m easurement i nformation r ref = 475 measurement point 0 50 50 0 measurement point 49.9 49.9 hcsl gnd 2pf 2pf 0v hcsl o utput s kew 3.3v c ore /3.3v lvcmos o utput l oad ac t est c ircuit 3.3v c ore /3.3v hcsl o utput l oad ac t est c ircuit scope qx lvcmos gnd 1.65v5% -1.65v5% v dda 1.65v5% v dd v dda t sk(o) v ddox 2 v ddox 2 t sk(o) qx nqx qy nqy qx qy lvcmos o utput s kew v dd, v ddob, v ddoc 3.3v5% 3.3v5% rms p eriod j itter lvcmos b ank s kew t sk(b) v ddox 2 v ddox 2 qx:qx qx:qx (where x = bank b or bank c) v oh v ref v ol mean period (first edge after trigger) reference point (trigger edge) 1 contains 68.26% of all measurements 2 contains 95.4% of all measurements 3 contains 99.73% of all measurements 4 contains 99.99366% of all measurements 6 contains (100-1.973x10 -7 )% of all measurements histogram
ics841s012bki revision a november 10, 2009 9 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer p arameter m easurement i nformation , continued lvcmos r ise /f all t ime lvcmos o utput d uty c ycle /p ulse w idth /p eriod t period t pw t period odc = v ddox 2 x 100% t pw qc, qb0:qb6 d ifferential c ycle - to -c ycle j itter ? ? ? ? cycle n t cycle n+1 t jit(cc) = t cycle n ? t cycle n+1 1000 cycles d ifferential m easurement p oints for d uty c ycle /p eriod q - nq 0.0v clock period (differential) positive duty cycle (differential) negative duty cycle (differential) s ingle -e nded m easurement p oints for d elta c ross p oint q nq v cross_delta s ingle -e nded m easurement p oints for a bsolute c ross p oint and s wing nq q v cross_max v cross_min v max v min 20% 80% 80% 20% t r t f qc, qb0:qb6 d ifferential m easurement p oints for r ise /f all t ime q - nq -150mv +150mv 0.0v fall edge rate rise edge rate nqa[0:1] qa[0:1]
ics841s012bki revision a november 10, 2009 10 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. to achieve optimum jitter perfor- mance, power supply isolation is required. the ICS841S012I pro- vides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd , v dda , v ddob , and v ddoc should be individually connected to the power supply plane through vias, and 0.01f bypass capacitors should be used for each pin. figure 1 illustrates this for a generic v dd pin and also shows that v dda requires that an additional10 resistor along with a 10f bypass capacitor be connected to the v dda pin. the 10 resistor can also be replaced by a ferrite bead. p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v dda 10 f .01 f 3.3v .01 f v dd i nputs : c rystal i nputs for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. ref_in i nput for applications not requiring the use of the reference clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the ref_in to ground. lvcmos c ontrol p ins all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvcmos o utputs all unused lvcmos output can be left floating. we recommend that there is no trace attached. d ifferential o utput all unused differential outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated.
ics841s012bki revision a november 10, 2009 11 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer f igure 3. g eneral d iagram for lvcmos d river to xtal i nput i nterface lvcmos to xtal i nterface the xtal_in input can accept a single-ended lvcmos signal through an ac coupling capacitor. a general interface diagram is shown in figure 3. the xtal_out pin can be left floating. the input edge rate can be as slow as 10ns. for lvcmos signals, it is recommended that the amplitude be reduced from full swing to half swing in order to prevent signal interference with the power rail and to reduce noise. this configuration requires that the output impedance of the driver (ro) plus the series resistance (rs) equals the transmission line impedance. in addition, matched termination at the crystal input will attenuate the signal in half. this can be done in one of two ways. first, r1 and r2 in parallel should equal the transmission line impedance. for most 50 applications, r1 and r2 can be 100 . this can also be accomplished by removing r1 and making r2 50 . by overdriving the crystal oscillator, the device will be functional, but note the device performance is guaranteed by using a quartz crystal. r2 zo = 50 vdd ro zo = ro + rs r1 vdd xta l _ i n xta l _ o u t .1uf rs c rystal i nput i nterface the ICS841S012I has been characterized with 18pf parallel resonant crystals. the capacitor values shown in figure 2 below were determined using a 25mhz, 18pf parallel resonant crystal f igure 2. c rystal i nput i nterface and were chosen to minimize the ppm error. note: external tun- ing capacitors must be used for proper operations. xtal_in xtal_out x1 18pf parallel crystal c1 15p c2 22p
ics841s012bki revision a november 10, 2009 12 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer s pread s pectrum spread-spectrum clocking is a frequency modulation technique for emi reduction. when spread-spectrum is enabled, a 32khz triangle waveform is used with 0.6% down-spread (+0.0% / - 0.5%) from the nominal output frequency. an example of a tri- angle frequency modulation profile is shown in figure 4a be- low. the ramp profile can be expressed as: ? fnom = nominal clock frequency in spread off mode ? fm = nominal modulation frequency (30khz) ? = modulation factor (0.6% down spread) the ics841s012bi triangle modulation frequency deviation will not exceed 0.7% down-spread from the nominal clock fre- quency (+0.0% / -0.5%). an example of the amount of down spread relative to the nominal clock frequency can be seen in the frequency domain, as shown in figure 4b. the ratio of this width to the fundamental frequency is typically 0.4%, and will not exceed 0.7%. the resulting spectral reduction will be greater than 5db, as shown in figure 4b . it is important to note the ics841s012di 5db minimum spectral reduction is the compo- nent-specific emi reduction, and will not necessarily be the same as the system emi reduction. f igure 4b. 200mh z c lock o utput in f requency d omain (a) s pread -s pectrum off (b) s pread -s pectrum on f igure 4a. t riangle f requency m odulation (1 - ) fnom + 2 fm x x fnom x t when 0 < t < , (1 - ) fnom - 2 fm x x fnom x t when < t < 1 2fm 1 2fm 1 fm ? ? 1/fm 0.5/fm fnom (1 - ) fnom frequency time ba ? 10 dbm = .6% ? ?
ics841s012bki revision a november 10, 2009 13 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer f igure 5. p.c.a ssembly for e xposed p ad t hermal r elease p ath ?s ide v iew (d rawing not to s cale ) vfqfn epad t hermal r elease p ath in order to maximize both the removal of heat from the package and the electrical performance, a land pattern must be incorporated on the printed circuit board (pcb) within the footprint of the package corresponding to the exposed metal pad or exposed heat slug on the package, as shown in figure 5. the solderable area on the pcb, as defined by the solder mask, should be at least the same size/shape as the exposed pad/slug area on the package to maximize the thermal/electrical performance. sufficient clearance should be designed on the pcb between the outer edges of the land pattern and the inner edges of pad pattern for the leads to avoid any shorts. while the land pattern on the pcb provides a means of heat transfer and electrical grounding from the package to the board through a solder joint, thermal vias are necessary to effectively conduct from the surface of the pcb to the ground plane(s). the land pattern must be connected to ground through these vias. the vias act as ?heat pipes?. the number of vias (i.e. ?heat pipes?) are application specific and dependent upon the package power dissipation as well as electrical conductivity requirements. thus, thermal and electrical analysis and/or testing are recommended to determine the minimum number needed. maximum thermal and electrical performance is achieved when an array of vias is incorporated in the land pattern. it is recommended to use as many vias connected to ground as possible. it is also recommended that the via diameter should be 12 to 13mils (0.30 to 0.33mm) with 1oz copper via barrel plating. this is desirable to avoid any solder wicking inside the via during the soldering process which may result in voids in solder between the exposed pad/ slug and the thermal land. precautions should be taken to eliminate any solder voids between the exposed heat slug and the land pattern. note: these recommendations are to be used as a guideline only. for further information, refer to the application note on the surface mount assembly of amkor?s thermally/ electrically enhance leadframe base package, amkor technology. thermal via land pattern solder pin solder pin pad pin pad pin ground plane exposed heat slug (ground pad)
ics841s012bki revision a november 10, 2009 14 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer r ecommended t ermination figure 6a is the recommended termination for applications which require the receiver and driver to be on a separate pcb. all traces should be 50 impedance. f igure 6a. r ecommended t ermination figure 6b is the recommended termination for applications which require a point to point connection and contain the f igure 6b. r ecommended t ermination driver and receiver on the same pcb. all traces should all be 50 impedance.
ics841s012bki revision a november 10, 2009 15 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer s chematic e xample figure 7 shows an example of the ICS841S012I application schematic. in this example, the device is operated at v d d = v ddob = v ddoc = 3.3v. the 18pf parallel resonant 25mhz crystal is used. the c1= 33pf and c2 = 33pf are recommended for frequency accuracy. for different board layout, the c1 and c2 may be slightly adjusted for optimizing frequency accuracy. two examples of hcsl and one example of lvcmos termination are shown in this schematic. the decoupling capacitors should be located as close as possible to the power pin. f igure 7. ICS841S012I s chematic e xample r1 35 qb0 vdd vddo vdd iref ref_oe bypass xtal_out xtal_in ref_sel logic control input examples set logic input to '0' set logic input to '1' to logic input pins to logic input pins note: this device requires a reset signal at nmr after power-up to function properly. vdd=3.3v using for pci express add-in card vddo=3.3v using for pci express point-to-point connection hcsl termination lvcmos r4 10 tl3 zo = 50 qa1 qa0 r5 33 r9 50 r8 50 r7 33 tl5 zo = 50 ro ~ 7 ohm q1 driv er_lvcmos r6 43 zo = 50 ohm ref_in vdd zo = 50 lvcmos zo = 50 r3 30 ref_out1 ref_out1 ref_out0 vddo nmr + - ru2 not install ru1 1k rd2 1k rd1 not install vdd vdd vddo f_selb1 f_selc2 f_selb0 f_selc1 f_selc0 f_sela0 qa_oe f_sela1 r12 50 r11 50 c3 0.01u vdd c4 10u vdda vdd nqa1 ssc0 f_selb2 ssc1 nqa0 vddo vdd c16 0.1u (u1, 29) + - (u1, 1) (u1, 28) (u1, 52) tl6 zo = 50 (u1, 48) (u1, 7) (u1, 14) tl7 zo = 50 (u1, 56) (u1, 42) (u1, 43) vdda c9 0.1u c10 0.1u c14 0.1u r2 10 note: external tuning ca pacitors must be used for proper operation. c12 0.1u c11 0.1u c8 0.1u x1 25mhz, cl=18pf c15 0. 1u c6 0.01u u1 ICS841S012I vdd 1 ref_out0 2 ref_out1 3 gnd 4 gnd 5 ref_in 6 vdd 7 ref_sel 8 xta l_ i n 9 xta l_ o u t 10 bypass 11 ref_oe 12 nmr 13 vdd 14 gnd 15 ssc1 16 ssc0 17 f_selb2 18 f_selb1 19 f_selb0 20 f_selc2 21 f_selc1 22 f_selc0 23 f_sela1 24 gnd 35 iref 34 qa0 33 nqa0 32 qa1 31 vdd 28 gnd 27 qa_oe 26 f_sela0 25 vddob 52 qb4 51 gnd 50 vddob 48 qb2 47 gnd 46 qb1 45 qb0 44 vddob 43 vdda 37 gnd 36 qb5 53 gnd 54 qb6 55 qb3 49 nqa1 30 vdd 29 vdda 38 vddoc 42 qc 41 gnd 40 qbc_oe 39 vddob 56 c13 0.1u c1 15pf c2 22pf c7 0.1u c5 10u r10 475 ohm
ics841s012bki revision a november 10, 2009 16 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer p ower c onsiderations this section provides information on power dissipation and junction temperature for the ICS841S012I. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ICS841S012I is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 3.3v + 5% = 3.465v, which gives worst case results. core and hcsl output power dissipation the maximum i dd current at 85 is 300ma. the hcsl output current (17ma per output pair) is included in this value. for power considerations, this output current is treated separately from the core current, so for power calculations, i dd = 300ma - 2 * 17ma = 266ma. ? power (core) = v dd_max * (i dd + i dda ) = 3.465v * (266ma + 20ma) = 991.0mw power (hcsl) = 44.5mw/load output pair if all outputs are loaded, the total power is 2 * 44.5mw = 89mw lvcmos output power dissipation ? dynamic power dissipation at 200mhz (qb, qc) power (200mhz) = c pd * frequency * (v ddo ) 2 = 4pf * 200mhz * (3.465v) 2 = 9.6mw per output total power (200mhz) = 9.6mw * 8 = 76.7mw ? dynamic power dissipation at 25mhz (ref_out) power (25mhz) = c pd * frequency * (v ddo ) 2 = 4pf * 25mhz * (3.465v) 2 = 1.2mw per output total power (25mhz) = 1.2mw * 2 = 2.4mw total power dissipation ? total power = power (core) + power (hcsl) + total power (200mhz) + total power (25mhz) = 991.0mw + 89mw + 76.7mw + 2.4mw = 1159mw
ics841s012bki revision a november 10, 2009 17 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 7. t hermal r esistance ja for 56 l ead vfqfn, f orced c onvection 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming 1 meter per second air flow and a multi-layer board, the appropriate value is 31.4c/w per table 7. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 1.159w * 31.4c/w = 121.4c. this is below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (multi-layer). ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 31.4c/w 27.5c/w 24.6c/w
ics841s012bki revision a november 10, 2009 18 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer 3. calculations and equations. the purpose of this section is to calculate power dissipation on the ic per hcsl output pair. hcsl output driver circuit and termination are shown in figure 8. hcsl is a current steering output which sources a maximum of 17ma of current per output. to calculate worst case on-chip power dissipation, use the following equations which assume a 50 load to ground. the highest power dissipation occurs at maximum v dd . power = (v dd_max ? v out ) * i out, since v out = i out * r l = (v dd_max ? i out * r l ) * i out = (3.465v ? 17ma * 50 ) * 17ma total power dissipation per output pair = 44.5mw f igure 8. hcsl d river c ircuit and t ermination v dd v out r l 50 ic ? i out = 17ma r ref = 475 1%
ics841s012bki revision a november 10, 2009 19 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer r eliability i nformation t ransistor c ount the transistor count for ICS841S012I is: 11,537 t able 8. ja vs . a ir f low t able for 56 l ead vfqfn ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 31.4c/w 27.5c/w 24.6c/w
ics841s012bki revision a november 10, 2009 20 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer p ackage o utline - k s uffix for 56 l ead vfqfn t able 9. p ackage d imensions reference document: jedec publication 95, mo-220 to p view index area d cham fer 4x 0.6 x 0.6 max optional anvil singula tion a 0. 0 8 c c a3 a1 s eating plan e e2 e2 2 l (n -1)x e (r ef.) (ref. ) n & n even n e d2 2 d2 (ref.) n & n odd 1 2 e 2 (ty p.) if n & n are even (n -1)x e (re f.) b th er mal ba se n or n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y sm u m i n i mm u m i x a m n 6 5 a 0 8 . 00 . 1 1 a 05 0 . 0 3 a e c n e r e f e r 5 2 . 0 b 8 1 . 00 3 . 0 e c i s a b 0 5 . 0 n d 4 1 n e 4 1 d 0 . 8 2 d 5 3 . 45 6 . 4 e 0 . 8 2 e 5 0 . 55 3 . 5 l 3 . 05 5 . 0 note: the following package mechanical drawing is a generic drawing that applies to any pin count vfqfn package. this draw- ing is not intended to convey the actual pin count or pin layout of this device. the pin count and pinout are shown on the front page. the package dimensions are in table 9 below.
ics841s012bki revision a november 10, 2009 21 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t able 10. o rdering i nformation r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t f l i k b 2 1 0 s 1 4 8l i b 2 1 0 s 1 4 8 s c in f q f v " e e r f - d a e l " d a e l 6 5y a r tc 5 8 o t c 0 4 - t f l i k b 2 1 0 s 1 4 8l i b 2 1 0 s 1 4 8 s c in f q f v " e e r f - d a e l " d a e l 6 5l e e r & e p a t 0 0 0 1c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n while the information presented herein has been checked for both accuracy and reliability, integrated device technology, incorp orated (idt) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or l icenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extraordinary environmental r equirements are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments.
ics841s012bki revision a november 10, 2009 22 ? 2009 integrated device technology, inc. ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer t e e h s y r o t s i h n o i s i v e r v e re l b a te g a pe g n a h c f o n o i t p i r c s e de t a d a a 4 t6 1 1 5 1 i o t s n o i t i d n o c t s e t d e d d a - e l b a t s c i t s i r e t c a r a h c c d y l p p u s r e w o p d d . w o r . f p 2 2 / f p 5 1 o t f p 3 3 m o r f e c a f r e t n i t u p n i l a t s y r c , 2 e r u g i f d e t a d p u . t u o y a l c i t a m e h c s d e t a d p u 9 0 / 1 1 / 8 a 1. t e l l u b d n a d n r n d d a 9 0 / 0 1 / 9
sales 800-345-7015 (inside usa) +408-284-8200 (outside usa) fax: 408-284-2775 www.idt.com/go/contactidt techical support netcom@idt.com +480-763-2056 6024 silver creek valley road san jose, ca 95138 ICS841S012I data sheet crystal-to-0.7v differential hcsl/lvcmos frequency synthesizer disclaimer integrated device technology, inc. (idt) and its subsidiaries reserve the right to modify the products and/or specif ications described herein at any time and at idt?s sole discretion. all information in this document, including descriptions of product features and performance, is subject to change without notice. performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. the in formation contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of idt?s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. this document is presented only as a guide and does not convey any license under intellectual property rights of idt or any third parties. idt?s products are not intended for use in life support systems or similar devices where the failure or malfunction of an idt p roduct can be reasonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own risk, absent an express, written agreement by idt. integrated device technology, idt and the idt logo are registered trademarks of idt. other trademarks and service marks used he rein, including protected names, logos and designs, are the property of idt or their respective third party owners. copyright 2009. all rights reserved. www.idt.com


▲Up To Search▲   

 
Price & Availability of ICS841S012I

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X