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copyright ? cirrus logic, inc. 2009 (all rights reserved) http://www.cirrus.com preliminary product information this document contains information for a new product. cirrus logic reserves the right to modify this product without notice. stereo 10 w high-efficiency class-d audio power amplifier features ? closed-loop advanced ? architecture ? true spread spectrum modulation ? premium quality audio amplification ? 99 db dynamic range - system level ? 0.025% thd+n @ 5 w - system level ? -96 db channel separation ? four selectable amplifier gain settings ? integrated protection and automatic recovery for over-current, under-voltage, and thermal overload ? single-supply operation (typ. = 9-12 v) ? no bootstrap capacitors required ? low-power standby mode ? supports differential or single-ended inputs ? thermally enhanced 32-pin, 6 x 6 mm qfn package requires no external heat sink common applications ? active speakers ? portable media player docking stations ? mini/micro shelf systems ? digital televisions general description the cs3511 is a high-efficiency class-d pwm amplifier that integrates on-chip over-current, under-voltage, over-temperature protection, a nd error reporting. an on- board regulator generates a 5 vdc supply used to power the internal low-voltage analog and digital cir- cuitry. the low r ds(on) outputs can source peak cur- rents up to 2.7 a, deliver high efficiency, allow a small device package, and lower power supply voltage levels. the cs3511 is available in a 32-pin qfn package in commercial grade (-10c to +70c). the CRD3511 customer reference design is also available. please re- fer to ?ordering information? on page 24 for complete ordering information. gain0 gain1 mute status gain control sleep positive input negative input positive input negative input channel 2 channel 1 pgnd charge pump 5 v regulator digital power analog power gate drive gate drive processing and modulation channel 2 positive output negative output channel 1 positive output negative output vp 12 v processing and modulation cs3511 aug ?09 ds845pp2
cs3511 2 ds845pp2 table of contents 1. pin descriptions ........................................................................................................... ................... 4 2. characteristics and specificatio ns .......... ................. ................ ................ ................ ........... 6 recommended operating conditions .................................................................................... 6 absolute maximum rating s ............... ................. ................ ................ ............. ............. ............ .. 6 ac electrical characteristics ................................................................................................ 7 dc electrical characteristics ................................................................................................ 8 digital interface specifications ............................................................................................. 8 digital i/o pin characteristics ............................................................................................... .. 9 3. typical connection diagrams ................................................................................................ .10 4. applications ............................................................................................................... .................... 12 4.1 cs3511 input stage ........................................................................................................ ............... 12 4.2 dynamic dc offset calibration ............................................................................................. ......... 12 4.3 cs3511 amplifier gain ..................................................................................................... ............. 13 4.4 mute pin .................................................................................................................. ..................... 13 4.5 sleep pin ................................................................................................................. .................... 13 4.6 power up and power down se quence .......................................................................................... 13 4.6.1 recommended power-up sequence .................................................................................... 13 4.6.2 recommended power-down sequence ............................................................................... 14 4.7 protection circuits ....................................................................................................... ................... 14 4.7.1 under-voltage protection ................................................................................................ ...... 14 4.7.2 over-temperature protection ................... .......................................................................... ... 14 4.7.3 over-current protection ................................................................................................. ....... 14 4.8 integrated 5 v regulator ................................................................................................... ............. 14 4.9 power dissipation de-rating ............................................................................................... .......... 14 4.10 performance measurements of the cs3511 ................................................................................ 15 4.11 full-bridge output filter ..................... ........................................................................... ............... 15 5. power supply, grounding, and pcb layout ....................................................................... 16 5.1 power supply and grounding ................................................................................................ ........ 16 5.1.1 maximum supply voltage .................................................................................................. .... 16 5.2 qfn thermal pad ........................................................................................................... ............... 16 5.3 layout considerations ..................................................................................................... .............. 16 6. typical audio performance plots ........................................................................................ 17 7. parameter definitions ...................................................................................................... .......... 21 8. package dimensions ......................................................................................................... ........... 22 9. thermal characteristics .................................................................................................... ..... 23 9.1 thermal flag .............................................................................................................. .................... 23 10. ordering information ...................................................................................................... ........ 24 11. revision history .......................................................................................................... ................ 25
cs3511 ds845pp2 3 list of figures figure 1.typical co nnection diagram - stereo amp lifier with differential inputs ...................................... 10 figure 2.typical co nnection diagram - stereo amp lifier with single-ended inputs ................................. 11 figure 3.cs3511 input stage ................................................................................................... ................. 12 figure 4.output filter ........................................................................................................ ........................ 15 figure 5.thd+n vs. output power (rl= 8 w) ..................................................................................... ..... 17 figure 6.thd+n vs. output power (rl= 6 w) ..................................................................................... ..... 17 figure 7.thd+n vs. output power (rl= 8 w) ..................................................................................... ..... 17 figure 8.thd+n vs. output power (rl= 6 w) ..................................................................................... ..... 17 figure 9.thd+n vs. output power (rl= 8 w) ..................................................................................... ..... 17 figure 10.thd+n vs. output power (rl= 6 w) .................................................................................... .... 17 figure 11.supply current vs. pout (rl= 8 w) ................................................................................... ..... 18 figure 12.supply current vs. pout (rl= 6 w) ................................................................................... ..... 18 figure 13.thd+n vs. frequency (rl= 8 w) ....................................................................................... ...... 18 figure 14.thd+n vs. frequency (rl= 6 w) ....................................................................................... ...... 18 figure 15.frequency response (pou t = 1 w, rl= 8 w) ........................................................................ 18 figure 16.frequency response (pou t = 1 w, rl= 6 w) ........................................................................ 18 figure 17.crosstalk vs. frequency (rl= 8 w) ....... ............................................................................ ....... 19 figure 18.crosstalk vs. frequency (rl= 6 w) ....... ............................................................................ ....... 19 figure 19.output fft (pout = 1 w, rl= 8 w) .................................................................................... .... 19 figure 20.output fft (pout = 1 w, rl= 6 w) .................................................................................... .... 19 figure 21.output fft (pout = 5 w, rl= 8 w) .................................................................................... .... 19 figure 22.output fft (pout = 5 w, rl= 6 w) .................................................................................... .... 19 figure 23.efficiency (rl= 8 w) ................................................................................................ ................. 20 figure 24.efficiency (rl= 6 w) ................................................................................................ ................. 20 list of tables table 1. i/o power rails ...................................................................................................... ....................... 9 table 2. low-pass filter components ........................................................................................... ........... 15
cs3511 4 ds845pp2 1. pin descriptions pin name # pin description in1+ in1- in2+ in2- 1 32 24 25 differential analog input ( input ) - differential audio signal inputs for channel 1 and channel 2. v5d 2 digital power ( input ) - supply for digital logic. connect to 5vgen. gain0 gain1 3 22 gain ( input ) - gain select bits. gain0 is the least significant bit. dgnd 4 digital ground ( input ) - ground reference for the internal logic and digital i/o. ref 5 reference ( output ) - internal reference voltage. sleep 6 sleep ( input ) - when set to logic high, device enters low power mode. if not used, this pin should be grounded. mute 7 mute ( input ) - when set to logic high, both amplifie rs are muted and in idle mode. when low (grounded), both amplifiers are fully operational. if not used, this pin should be grounded. status 8 status ( output ) - a logic high output indicates over-current or under-voltage condition, thermal over- load, that an output is shorted to ground or to another output, that the device is in low power mode (the sleep pin is high), or that the device is in reset. a lo gic low state indicates that the cs3511 is ready to output audio. thermal pad 10 9 8 7 6 5 4 3 2 1 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 in1- in2+ out1+ in1+ top-down (through package) view 32-pin qfn package vp pgnd out1- out2- pgnd vp out2+ v5d gain0 dgnd ref sleep mute status c1 agnd biascap v5a agnd c2 in2- agnd gain1 5vgen vp dcap cpump pgnd
cs3511 ds845pp2 5 out1+ out1- out2+ out2- 9 12 16 13 differential pwm output ( output ) - differential pwm outputs for channel 1 and channel 2. vp 10 15 20 high voltage power ( input ) - supply pins for high current h-bridges. pgnd 11 14 17 power ground ( input ) - high current ground for analog outputs. cpump 18 charge pump input ( input ) - input pin for charge pump. dcap 19 charge pump switching pin ( output ) - free-running 350 khz square wave between vp and ground. 5vgen 21 5 volt generator ( output ) - regulated 5 vdc source used to supply power to the input section (pins 2 and 28). agnd 23 27 30 analog ground ( input ) - connect all pins together directly at the thermal pad of the cs3511. in2+ in2- 24 25 negative analog input ( input ) - negative audio signal for channel 2 and channel 1, respectively. c2 c1 26 31 pop minimization capacitor ( input ) - external capacitor used to reduce turn on/off pops. v5a 28 analog power ( input ) - supply for analog circuitry. connect to 5vgen. biascap 29 analog input bias ( input ) - input stage bias voltage. thermal pad - thermal pad (input) - thermal relief pad for optimized heat dissipation. connect to pgnd. see ?qfn thermal pad? on page 16 for more information.
cs3511 6 ds845pp2 2. characteristics an d specifications recommended operating conditions agnd = dgnd = pgnd = 0 v; all voltages with respect to ground. (note 1) notes: 1. device functionality is not guaranteed or implied outs ide of these limits. operation outside of these limits may adversely affect device reliability. absolute maximum ratings agnd = dgnd = pgnd = 0 v; all volt ages with respect to ground. warning: operation at or beyond these limits may result in permanent damage to the device. notes: 2. the outputs will stop switching at the vp under-voltage error fa lling trigger point. see ?dc electrical char- acteristics? on page 8 . 3. any pin except supplies. transient currents of up to 100 ma on the inxx pins will not cause scr latch-up. 4. the maximum over/under voltage is limited by the input current. parameters symbol min typ max units dc power supply supply voltage vp 8.5 12 13.2 v temperature ambient temperature t a -10 - +70 c junction temperature t j -10 - +150 c parameters symb ol min max units dc power supply outputs switching and under load (note 2) vp - 13.2 v no output switching vp -0.3 14.0 inputs input current (note 3) i in -10ma digital input voltage (note 4) v ind -0.3 v5d + 0.3 v temperature ambient operating temper ature (power applied) t a -20 +85 c storage temperature t stg -65 +150 c
cs3511 ds845pp2 7 ac electrical characteristics test conditions (unless otherwise specified): agnd = dgn d = pgnd = 0 v; all voltages with respect to ground; t a = 25c; vp = 12 v; r l =8 full-bridge; gain1 = 0, gain0 = 1; 10 hz to 20 khz measurement bandwidth; per- formance measurements taken with a differential 997 h z sine wave and aes17 measurement filter; stereo full- bridge measurements taken through the full-bridge output filter shown in figure 4 on page 15 . notes: 5. see figure 5 on page 17 . 6. dbi is referenced to the input signal amplitude resu lting in the specified outp ut power at thd+n<1%. see ?parameter definitions? on page 21 for more information. 7. see section 4.2 ?dynamic dc offset calibration? on page 12 . parameters symbol test co nditions min typ max units output power (continuous average/channel) (note 5) p o thd+n = 1% r l = 8 r l = 6 - - 7.5 9.1 - - w w thd+n = 7% r l = 8 r l = 6 - - 8.8 10.8 - - w w thd+n = 10% r l = 8 r l = 6 - - 9.4 11.4 - - w w total harmonic distortion + noise (note 5) thd+n p o = 1 w, r l = 8 p o = 5 w, r l = 8 - - 0.019 0.025 - - % % dynamic range (note 6) dyr v in = -60 dbi a-weighted unweighted - - 99 96 - - db db signal to noise ratio (note 6) snr inputs ac coupled to agnd a-weighted unweighted - - 99 96 - - db db power supply rejection ratio psrr 200 mv p-p from 20 hz f 1 khz, inputs ac coupled to agnd -55-db ihf intermodulation distortion ihf-imd 19 khz, 20 khz, 1:1 (ihf), p o = 1 w -0.20- % channel separation cs p o =1 w, f = 1 khz 20 hz f 20 khz - - 104 78 - - db db output offset voltage (note 7) v offset mute = low -50-mv efficiency p o = 2 x 9.4 w, r l = 8 -85-% pwm output over-current error trigger point i ce -2.7-a junction thermal error rising trigger point t terise -155- c junction thermal error falling trigger point t tefall -135- c turn on time t on sleep = v il -155-ms turn off time t off sleep = v ih -3-ms amplifier gain gain1 = 0, gain0 = 0 - 13.6 - db gain1 = 0, gain0 = 1 - 19.5 - db gain1 = 1, gain0 = 0 - 23.8 - db gain1 = 1, gain0 = 1 - 27.3 - db gain matching between output channels - 0.1 - % input impedance gain1 = 0, gain0 = 0 36.8 46.0 55.2 k gain1 = 0, gain0 = 1 18.4 23.0 27.6 k gain1 = 1, gain0 = 0 11.0 13.8 16.6 k gain1 = 1, gain0 = 1 7.3 9.2 11.1 k
cs3511 8 ds845pp2 dc electrical characteristics test conditions (unless otherwise specified): agnd = dgn d = pgnd = 0 v; all voltages with respect to ground; t a = 25c; vp = 12 v; r l =8 full-bridge; gain1 = 0, gain0 = 1; st ereo full-bridge measurements taken through the full-bridge output filter shown in figure 4 on page 15 . digital interface specifications agnd = dgnd = pgnd = 0 v; all voltages with respect to ground; unless otherwise specified. notes: 8. levels between v ih and v il are invalid. the transition period between vih and vil should not exceed t i . parameters symbol test conditions min typ max units sleep supply current i cc(sleep) sleep = v ih -5.2-ma sleep = v ih ; no load, filter, or snubber -5.2-ma mute supply current i cc(mute) mute = v ih -38-ma mute = v ih ; no load, filter, or snubber -38-ma quiescent current i cc v in = 0 v; sleep = v il , mute = v il -68-ma v in = 0 v; sleep = v il , mute = v il ; no load, filter, or snubber -85-ma mosfet on resistance (each fet) r ds(on) i d = 0.5 a, t j =50 c - 325 - m 5vgen nominal voltage - 5.2 - v 5vgen dc current source - - 70 ma ref nominal voltage -1.2 -v biascap nominal voltage - 2.5 - v vp under-voltage error falling trigger point v uvvpfall -7.56- v vp under-voltage error rising trigger point v uvvprise -8.08- v v5a under-voltage error falling trigger point v uv5vfall -4.1-v v5a under-voltage error rising trigger point v uv5vrise -4.3-v charge pump under-voltage error falling trigger point v uvcpfall - 1.55*vp - charge pump under-voltage error rising trigger point v uvcprise - 1.62*vp - parameters symbol min max units high-level input voltage (mute, sleep) (note 8) v ih v5d - 2 - v high-level input voltage (gain1, gain0) v ih v5d - 0.8 - v low-level input voltage (mute, sleep, gain1, gain0) (note 8) v il -1v transition time between v ih and v il (mute, sleep) (note 8) t i - 500 ns high-level output voltage (status) i o =250 a v oh v5d - 0.5 - v low-level output voltage (status) i o =250 a v ol -0.5v input leakage current (mute, sleep) i in -10 a input leakage current (gain1, gain0) i in -300 a
cs3511 ds845pp2 9 digital i/o pin characteristics the logic level for each input is set by its corresponding power supply and should not exceed the maximum ratings. power supply pin number pin name i/o driver receiver 5vd 3 gain0 input - 5.0 v; internal 50 k pull-down 22 gain1 input - 5.0 v; internal 50 k pull-down 7 mute input - 5.0 v 6 sleep input - 5.0 v 8 status output 5.0 v - vp 35 out1+ output 8.5 v - 13.2 v power mosfet - 32 out1- output 8.5 v - 13.2 v power mosfet - 29 out2+ output 8.5 v - 13.2 v power mosfet - 26 out2- output 8.5 v - 13.2 v power mosfet - table 1. i/o power rails
cs3511 10 ds845pp2 3. typical connec tion diagrams figure 1. typical connection diagram - stereo amplifier with differential inputs 9 out1+ 12 out1- 1 in1+ 32 in1- 1.0 f differential analog inputs note(r1=r2) gain0 3 6 sleep gain1 22 mute 7 8 status 27 agnd system control logic 1.0 f 24 in2+ 25 in2- 1.0 f 1.0 f 28 v5a 31 c1 26 c2 29 biascap 30 agnd 18 cpump 19 dcap 20 vp 21 5vgen 23 agnd 2 v5d 5 ref 4 dgnd vp 1.0 f 0.1 f 0.1 f 0.1 f 1 f 20 k + + + 0.1 f 10 vp 220uf vp + 0.1 f 15 vp vp 16 out2+ 13 out2- 14 17 pgnd cs3511 1 f 10 f 10 f 1 f 1% 11 pgnd full-bridge output filter r l channel 1 audio output full-bridge output filter r l channel 2 audio output r1 r2 r3 r4 differential analog inputs note(r3=r4) 6 to 8 6 to 8 220 uf pgnd (note 1) (note 1) 1. see section 4.11 for typical full-brid ge output filter. 2. incorrectly connecting the external charge pump ci rcuitry can result in permanent damage to the device. (note 2)
cs3511 ds845pp2 11 figure 2. typical connection diagram - stereo amplifier with single-ended inputs 9 out1+ 12 out1- 1 in1+ 32 in1- 1.0 f single-ended analog input note(r1=r2) gain0 3 6 sleep gain1 22 mute 7 8 status 27 agnd system control logic 1.0 f 24 in2+ 25 in2- 1.0 f 1.0 f 28 v5a 31 c1 26 c2 29 biascap 30 agnd 18 cpump 19 dcap 20 vp 21 5vgen 23 agnd 2 v5d 5 ref 4 dgnd vp 1.0 f 0.1 f 0.1 f 0.1 f 1 f 20 k + + + 0.1 f 10 vp 220 uf vp + 0.1 f 15 vp 220 uf vp 16 out2+ 13 out2- 14 17 pgnd cs3511 1 f 10 f 10 f 1 f 1% 11 pgnd full-bridge output filter r l channel 1 audio output full-bridge output filter r l channel 2 audio output r1 r2 r3 r4 single-ended analog input note(r3=r4) 6 to 8 6 to 8 pgnd important: see (note 3) 1. see section 4.11 for typical full-brid ge output filter. 2. incorrectly connecting the external charge pump ci rcuitry can result in permanent damage to the device. 3. see section 4.1 for important information regarding us ing single-ended inputs with the cs3511. (note 1) (note 1) (note 2)
cs3511 12 ds845pp2 4. applications 4.1 cs3511 input stage the input stage of the cs3511 is configured as a diffe rential receiver to maximize common-mode rejection in typical audio circuits. to maximize this benefit, th e inx+ and inx- pins should be driven with differential signals from sources that have the same output impe dance. also, the signals should be routed parallel to one another from their source to the analog inputs of the cs3511. in some instances, there will be a necessity to drive the cs3511 with a single-ended i nput signal. in this case, the unused input should be ac coupled to ground using the same value of c i implemented for the driven channel. either input, inx+ or inx-, can be used for the signal input. to mi nimize the effects of ground noise in the system, c i should be terminated at the ground connection through a resistor, r i . please refer to figure 3 . the value of the resistor should match the output impedance of the audio source. figure 3. cs3511 input stage 4.2 dynamic dc offset calibration abrupt changes in dc output offset level are a known cause of audible turn-on and turn-off pops. typically, when a system turns on (begins s witching), the potential across the speaker changes abruptly from 0 v to the steady-state dc offset voltage of the system. sim ilarly, when the system turns off, the potential changes abruptly from the steady-state dc offset voltag e to 0 v. these abrupt changes are heard as a pop. the cs3511 employs a patented method for reducing th is pop. immediately before the outputs begin to switch, a calibration circuit dynamically minimizes the amp lifier?s internal offsets. wi th these offsets at a min- imum, the outputs begin to switch and the cs3511 begins to slowly ramp the dc output offset potential to the steady-state dc offset voltage. this ramp is slow enough to keep the speaker movement in the subsonic range. during turn-off, this procedure is reversed. th e static dc offset voltag e is ramped down to a dynam- ically minimized dc offset level be fore output switching is stopped. dynamic offset cancellation requires equal impedance s on the positive and negativ e inputs. if a single-end- ed audio source with a 600 output impedance is connected to the in 1+ (through a dc blocking capacitor), in1- must be terminated to ground with a 600 resistor (also through a dc blocking capacitor. (see figure 3 ). c i audio source cs3511 inx- r i = z out inx+ z out c i
cs3511 ds845pp2 13 4.3 cs3511 amplifier gain the closed-loop gain of the cs3511 is externally configured via two input pins, gain0 and gain1. the ?ac electrical characteristics? on page 7 shows the four different gain values available based on the pin voltag- es at gain0 and gain1. the gain0 and gain1 input pi ns have weak internal pull-down resistors; so they should be driven high when set to a logic high. inter nally, different input resistor values are used to imple- ment the four gain settings. thus , the input impedance will change based on the gain setting. the gain track- ing is very tightly matched within each device, but th e absolute input impedance will vary due to process variations. this variation must be consid ered when choosing the proper value of c i . the low-fr equency roll- off characteristic is dedicated by the choice of c i and r i . the -3 db frequency is: on the CRD3511, a value of 1.0 f is used for c i ; this value provides a nearly flat response down to 20 hz, even for the highest gain setting. in many cases, a lower value of c i can be used due to a lower gain setting or because the speakers used do not have the ability to re produce low-frequency signals. 4.4 mute pin the mute pin must be driven to a logic low or logic hi gh state for proper operation. to enable the amplifier, connect the mute pin to a logic low. to enable the mute function, connect the mute pin to a logic high signal. when in mute, the internal processor bias voltages re main active in the cs3511 . this state maintains the bias on the input coupling capacitor to prevent audible transients which would be caused by the charging and discharging of this capacitor. it is recommended that the mute pin be held high during power-up or power-down to eliminate audible transients. if power-up and/or power-down pops are present with a cs3511 amplifier, the cause may be other circuitry external to the cs3511, such as an audio processor or preamp. if the cs3511 is in the active state (mute pin is low), these audible pops will be amplified and output to the speakers. to eliminate this problem, acti- vate the mute pin before the power supply collapses during a power-down sequence. 4.5 sleep pin when pulled high, the sleep pin puts the device into a low quiescent cu rrent mode. to disable sleep mode, the sleep pin should be gr ounded. while the device is in low power mode the status pin will be in a logic high state to indicate that the device is not ready to produce audio. 4.6 power up and power down sequence to minimize power-on and power-off transients, the device should be held in the mute state while powering up or powering down th e cs3511. the sleep pin can be held in either the logic hi gh state or logic low state during power-up or power-down. 4.6.1 recommended power-up sequence 1. apply power to the system. 2. hold the mute pin in the logic high state until the po wer supply is stable. in th is state, all associated outputs are held in a high-impedance state. 3. set the mute pin to a logic low state to begin no rmal operation. if the sleep pin is held high during power-on (optional), it sh ould be set low before the mute pin is set low. f c - 3 db = 1 2 c i r i
cs3511 14 ds845pp2 4.6.2 recommended power-down sequence 1. set the mute pin to the logic hi gh state. this will mute the amplif ier outputs and hol d them in a high- impedance state. 2. optionally, the sleep pin can now be set to a logic high state to place the device into low power mode. 3. the power supplies can now be removed. 4.7 protection circuits the cs3511 is protected against under-voltage, over -current, and over-temperature conditions. if one of these fault conditions are present the amplifier will be muted, the outputs will be tri-stated, and the status pin will remain in a logic high state until the condition clears. the amplif ier will automatically attempt to re- cover from a detected fault condition. 4.7.1 under-voltage protection an under-voltage fault occurs if the voltage sensed on the vp terminals, the charge pump, or on v5a drops below the corresponding falling trigger point seen in the dc electrical characteristics table. the under-voltage fault will auto matically clear once the voltage exceed s the associated ri sing trigger point. v5gen, v5a, and v5d must be connected together in order to properly monitor v5d and v5gen. (see figure 1 and figure 2 ). 4.7.2 over-temperature protection an over-temperature fault occu rs if the junction temperature of the de vice exceeds the rising junction ther- mal error trigger point seen in the ac electrical characteristics table. the thermal hysteresis of the device will cause the fault to automatically clear when the junction temperature drop s below the falling junction thermal error trigger point. 4.7.3 over-current protection an over-current fault occurs if more current than the over-current error trigger point flows from any of the amplifier output pins, see ac electrical characteristics . over current can occur if the speaker wires are shorted together, if one side of the speaker is short ed to ground, or if the speaker impedance is too low. warning: the outputs of the cs3511 should never be shor ted to vp. doing so can result in permanent damage to the device. 4.8 integrated 5 v regulator the cs3511 includes an internal 5 v regulator in order to provide a supply to the internal digital and analog circuitry. the output of th e regulator is present on the 5vgen pin. the regulator output pin should have a bypass capacitor connected to agnd and be connected to the digita l and analog supply pins as shown in the typical connection diagrams in section 3 . the regulator output can be used to set the sleep, mute, gain0, and gain1 pins to a logic high state. the re gulator is able to source the maximum current shown in the dc electrical characteristics table. 4.9 power dissipation de-rating as a result of high-efficiency and good package thermal characteristics, the cs3511 can operate at elevated ambient temperatures without having to de-rate the output power, assuming 8 output loads or higher. the exposed pad must be soldered to the pc board to increase the maximum power dissipation capability of the cs3511 package. soldering will minimize the likelihood of an over -temperature fault occurring during
cs3511 ds845pp2 15 continuous heavy load conditions. there should be vi as for connecting the exposed pad to the copper area on the printed circuit board. the pad must be electrically connected to pgnd. see section 5.2 for more in- formation on the thermal pad and section 9.1 for more information on thermal dissipation for the cs3511. 4.10 performance measurements of the cs3511 the cs3511 operates by generating a high-frequency s witching signal based on the audio input. this signal is sent through a low-pass filter (external to the cs3511 amplifier) that recovers an amplified version of the audio input. the frequency of the switching pattern is spread spectrum and typically varies between 100 khz and 1.0 mhz, which is well above the 10 hz ? 20 khz audio band. the pattern itself does not alter or distort the audio input signal, but it does introduce some inaudible components outside of the audio band. the measurements of certain performance parameters, particularly noise-relat ed specifications such as thd+n, are significantly affected by the design of the low-pass filter us ed on the output as well as the band- width setting of the measurement instrument used. unless the filter has a very sharp roll-off just beyond the audio band or the bandwidth of the measurement inst rument is limited, some of the inaudible components introduced by the cs3511 amp lifier?s switching pattern will deg rade the measur ement result. one feature of the cs3511 is that it does not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. the CRD3511 evaluation board uses the filter described in section 4.11 , which has a simple two-pole output filter and excellent per- formance in listening tests. measuremen ts in this data sheet were taken using this sa me circuit with a limited bandwidth setting in the measurement instrument. 4.11 full-bridge output filter figure 4 shows the output filter for a full-bridge config uration. the transient-voltage suppression circuit (snubber circuit) is comprised of a resistor (5.6 ) and capacitor (680 pf) and should be placed as close as possible to the corresponding pwm output pins to greatly reduce radiated emi. the inductors, l1 and l2, and capacitor, c1, comprise th e low-pass filter. along with the nominal load impedance of the speaker, these values set the cutoff frequency of the filter. table 2 shows the component values based on nominal speaker (load) impedance for a corner frequen cy (-3 db point) of approximately 35 khz. load l1, l2 c1 8 22 h 0.47 f 6 15 h 0.47 f table 2. low-pass filter components outx+ outx- 680 pf 5.6 c1 l1 l2 5.6 680 pf figure 4. output filter
cs3511 16 ds845pp2 5. power supply, grounding, and pcb layout 5.1 power supply and grounding the cs3511 requires careful attention to power supply and grounding arrangements if its potential perfor- mance is to be realized. extensive use of power a nd ground planes, ground plane fill in un used areas and surfac e mount decoupling capacitors are recommended. it is necessary to de-cou ple the power supply by pl acing capacitors directly between the power and ground of the cs3511. decoupling capacitors should be as close to the pins of the cs3511 as possible. the lowest value ceramic capacito r should be closest to the pin and should be mount- ed on the same side of the board as the cs3511 to minimize inductance effects. the CRD3511 reference design demonstrates the optimum la yout and power supply arrangements. 5.1.1 maximum supply voltage the absolute maximum allowable voltage on the vp su pply pins (pins 10, 15 and 20) is shown in the ab- solute maximum ratings table. device damage can occur above th is voltage. please note that the abso- lute maximum voltage does not represent a valid operating condition. the maximum voltage on the vp pins during operation is shown in the recommended operating conditions table. during normal operation, the output pins (pins 9, 12, 13, and 16) ma y experience overshoot voltages due to inductive kickback. care should be taken to pr operly de-couple the vp pins because overshoot on the output pins can travel through the cs3511 output devices and appear on the vp pins. without proper power supply decoupling, this can cause ripple voltag es on the vp pins that mi ght exceed their absolute maximum voltage shown in the absolute maximum ratings table. however, this will only happen in ex- treme cases and can be prevented by placing the hi gh-frequency decoupling capacitors close to the vp pins. 5.2 qfn thermal pad the cs3511 is available in a compact qfn package. the underside of the qfn package reveals a large metal pad that serves as a thermal relief to provide for maximum heat dissipation. this pad must mate with an equally dimensioned copper pad on the pcb and mu st be electrically connected to pgnd. a series of thermal vias should be used to connect this copper pad to one or more larger ground planes on other pcb layers; the copper in thes e ground planes will act as a heat sink for the cs35 11. the CRD3511 reference design demonstrates the optimum thermal pad and via configuration. 5.3 layout considerations the cs3511 is a power (high current) amplifier that oper ates at relatively high switching frequencies. the outputs of the amplifier switch between the supply vo ltage and ground, at high speeds, while driving high currents. this high-frequency digital signal is passed th rough an lc low-pass filter to recover the amplified audio signal. since the amplifier must drive the inducti ve lc output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and be low ground by the energy in the output inductance. additionally, the cs3511?s junction temperature rises when supplying power to loads and relies on the pcb for heat sinking. to avoid subjecting the cs3511 to potentially damaging voltage stress and output-power-limiting elevated junction temperatures, it is critic al to have a good printed circuit board layout. it is strongly recommended that the cirrus CRD3511 layout be used for all applicat ions and only be deviated from after careful analysis of the effects of any changes. please refer to cirru s logic application note an315 for further information regarding the layout of the cs3511.
cs3511 ds845pp2 17 6. typical audio performance plots test conditions (unless otherwise sp ecified): all plots were taken using the CRD3511 reference design board sourced with a differential input; t a = 25c; 10 hz to 20 khz measurement bandwidth; performance measurements taken with a 997 hz sine wave and aes17 measur ement filter; gain1 = 0, gain0 = 1; vp = 12 vdc. 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 % 10m 20 20m 50m 100m 200m 500m 1 2 5 10 w 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 % 10m 20 20m 50m 100m 200m 500m 1 2 5 10 w figure 5. thd+n vs. output power (r l = 8 ) figure 6. thd+n vs. output power (r l = 6 ) 9.0 v 12.0 v 9.0 v 12.0 v 0.007 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 10m 20 20m 50m 100m 200m 500m 1 2 5 10 w 0.007 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 1m 20 2m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10 w figure 7. thd+n vs. output power (r l = 8 ) figure 8. thd+n vs. output power (r l = 6 ) 100 hz 1 khz 10 khz 100 hz 1 khz 10 khz 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 % 10m 20 20m 50m 100m 200m 500m 1 2 5 10 w 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 % 10m 20 20m 50m 100m 200m 500m 1 2 5 10 w figure 9. thd+n vs. output power (r l = 8 ) figure 10. thd+n vs. output power (r l = 6 ) gain=11 gain=10 gain=00 gain=00 gain=11 gain=10 gain=01 gain=01
cs3511 18 ds845pp2 0 0.5 1 1.5 2 2.5 02468101214161820 total output power (watts) supply current (a) 0 0.5 1 1.5 2 2.5 02468101214161820 total output power (watts) supply current (a) figure 11. supply current vs. p out (r l = 8 ) figure 12. supply current vs. p out (r l = 6 ) ) figure 14. thd+n vs. frequency (r l = 6 ) 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 20 20k 50 100 200 500 1k 2k 5k 10k hz 0.5 w 1.0 w 5.0 w 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 20 20k 50 100 200 500 1k 2k 5k 10k hz 0.5 w 1.0 w 5.0 w -5 +5 -4 -3 -2 -1 -0 +1 +2 +3 +4 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz -5 +5 -4 -3 -2 -1 -0 +1 +2 +3 +4 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz figure 15. frequency response (p out = 1 w, r l = 8 ) figure 16. frequency response (p out = 1 w, r l = 6 ) see note below. note: the full-bridge output filter found on the CRD3511 reference design board implements 22h inductors and is optimized for an 8 load.
cs3511 ds845pp2 19 figure 17. crosstalk vs. frequency (r l = 8 ) figure 18. crosstalk vs. frequency (r l = 6 ) -140 -40 -120 -100 -80 -60 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz ch1 to ch2 ch2 to ch1 -140 -40 -120 -100 -80 -60 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz ch1 to ch2 ch2 to ch1 figure 19. output fft (p out = 1 w, r l = 8 ) figure 20. output fft (p out = 1 w, r l = 6 ) figure 21. output fft (p out = 5 w, r l = 8 ) figure 22. output fft (p out = 5 w, r l = 6 )
cs3511 20 ds845pp2 0 10 20 30 40 50 60 70 80 90 100 012345678910 output power per channel (watts) efficiency (%) 0 10 20 30 40 50 60 70 80 90 100 012345678910 output power per channel (watts) efficiency (%) figure 23. efficiency (r l = 8 ) figure 24. efficiency (r l = 6 )
cs3511 ds845pp2 21 7. parameter definitions signal to noise ratio (snr) the ratio of the rms value of the output signal, wher e pout is equivalent to the specified output power at thd+n<1%, to the rms value of the noise floor with no input signal applied and measured over the spec- ified bandwidth, typically 20 hz to 20 khz. expressed in decibels. dynamic range (dyr) the ratio of the rms value of the output signal produ ced when pout is equivalen t to the specified output power at thd+n<1% to the rms sum of all other spectral components over the specified bandwidth, typi- cally 20 hz to 20 khz. dynamic range is a signal-to -noise ratio measurement made with a -60 dbi input signal where dbi is referenced to the input signal amplitude resulting in the specified output power at thd+n<1%. this technique ensures that the distorti on components are below the noise level and do not effect the measurement. expressed in decibels. total harmonic distortion + noise (thd+n) the ratio of the rms value of the signal to the rms su m of all other spectral components over the specified band width (typically 10 hz to 20 khz), including distortion components. expressed in decibels.
cs3511 22 ds845pp2 8. package dimensions 1. dimensioning and tolerance per asme y 14.5m-1994. 2. dimensioning lead width applies to the plated terminal and is measured between 0.25 mm and 0.30 mm from the terminal tip. inches millimeters note dim min nom max min nom max a 0.031 0.033 0.035 0.80 0.85 0.90 1 a1 0.00 -- 0.05 0.00 -- 0.05 1 a3 - 0.008 ref - - 0.203 ref - b 0.008 0.010 0.012 0.20 0.25 0.30 1 , 2 d - 0.2362 bsc - - 6.00 bsc - 1 d2 0.177 0.181 0.185 4.50 4.60 4.70 1 e 0.2362 bsc 6.00 bsc 1 e2 0.177 0.181 0.185 4.50 4.60 4.70 1 e 0.026 bsc 0.65 bsc 1 l 0.014 0.016 0.018 0.35 0.40 0.45 1 jedec #: mo-220 controlling dimension is millimeters. side view a1 bottom view top view a pin #1 corner d e d2 l b e pin #1 corner e2 32l qfn (6 x 6 mm body) package drawing
cs3511 ds845pp2 23 9. thermal characteristics 9.1 thermal flag this device is designed to have the metal flag on the bo ttom of the device soldered directly to a metal plane on the pcb. to enhance the thermal dissipation capabilities of the syst em, this metal plane should be cou- pled with vias to a large metal plane on the backside (and inner ground layer, if applicable) of the pcb. in either case, it is beneficial to use copper fill in any unused regions inside th e pcb layout, especially those immediately surrounding the cs3511. in addition to impr oving in electrical perfor mance, this practice also aids in heat dissipation. the heat dissipation capabilit y required of the metal plane for a gi ven output power can be calculated as follows: ca = [(t j(max) - t a ) / p d ] - jc where, ca = thermal resistance of the metal plane in c/watt t j(max) = maximum rated operating junction temperature in c, equal to 150 c t a = ambient temperature in c p d = rms power dissipation of the device, equal to 0.176*p rms-out (assuming 85% efficiency) jc = junction-to-case thermal resistance of the device in c/watt, equal to 1 c/watt parameter symbol min typ max units junction to case thermal impedance jc -1 -c/watt
cs3511 24 ds845pp2 10.ordering information product description package pb-free grade temp range container order# cs3511 stereo, 10w high-efficiency class-d audio amplifier 32-qfn yes commercial -10 to +70c rail cs3511-cnz tape and reel cs3511-cnzr CRD3511-q1 2x10w, 4layer / 1oz. copper reference design - - - - - CRD3511-q1
cs3511 ds845pp2 25 11.revision history release changes a1 initial release a2 ? updated cover diagram. ? removed dynamic output offs et voltage specification. ? updated section 4.2 on page 12 . a3 ? updated pwm output over-current specification in ?ac electrical characteristics? table on page 7 and in the general description on the front page. ? fault pin (8) name updated to status. ? updated section 4.7 on page 14 . ? updated ?under-voltage protection? table on page 14 and ?dc electrical characteristics? table on page 8 from v5gen to v5a for 5 v voltage sensing. ? updated input impedance specification in ?ac electrical characteristics? table on page 7 . pp1 ? updated front page features and common applications. ? updated dc power supply specification in ?absolute maximum ratings? table on page 6 . ? updated thd+n, dynamic range, snr, psrr, channel separation, amplifier gain, gain matching, and efficiency specifications in ?ac electrical characteristics? table on page 7 . ? updated sleep supply current, mute supply curren t, quiescent current, 5vgen nominal voltage, ref nominal voltage, and biascap nominal voltage in ?dc electrical characteristics? table on page 8 . ? updated leakage current specification in ?digital interface specifications? table on page 8 . ? updated the typical audio performance plots in section 6 . pp2 ? added sleep and mute pin transition ti me specification and information to the ?dc electrical characteristics? table on page 8 . ? added section 4.6 , section 4.6.1 , and section 4.6.2 . ? updated the typical audio performance plots in section 6 . ? updated input impedance specifications in ?ac electrical characteristics? table on page 7 . ? updated front page features, ?ac electrical characteristics? table on page 7 , and section 4.3 to reference four gain settings.
cs3511 26 ds845pp2 contacting cirrus logic support for all product questions and inquiries, contact a cirrus logic sales representative. to find one nearest you, go to www.cirrus.com . important notice ?preliminary? product information describes products that are in production, but for which full characterization data is not ye t available. cirrus logic, inc. and its sub- sidiaries (?cirrus?) believe that the information contained in this document is accurate and reliable. however, the information is subject to change without notice and is provided ?as is? without warranty of any kind (express or implied). customers are advised to obtain the latest version of re levant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and condit ions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnif ication, and limitation of liability. no responsibility is assu med by cirrus for the use of this informa- tion, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or ot her rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or implied under any patents, m ask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. cirrus owns the copyrights associated with the information contained herei n and gives consent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of c irrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resal e. certain applications using semi conductor products may involve po tential risks of death, perso nal injury, or severe prop- erty or environmental damage (? critical applications?). cirrus products are not designed, authorized or warranted for use in products surgically implanted into the body, automotive safety or security devices, life su pport products or other crit- ical applications. inclus ion of cirrus products in such appl ications is understood to be full y at the customer?s risk and cir- rus disclaims and makes no warranty, expres s, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or custom- er?s customer uses or permits the use of cirrus products in cr itical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any a nd all liability, including at- torneys? fees and costs, that may result fr om or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners.

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