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  rev.1.00 jun 08, 2005 page 1 of 5 hzm6.2zmwa silicon planar zener diode for surge absorb rej03g1208-0100 (previous: ade-208-1514) rev.1.00 jun 08, 2005 features ? hzm6.2zmwa has two devices in a monolithic, and can absorb surge. ? low capacitance (c = 8.5 pf max) and can protect esd of signal line. ? mpak package is suitable for high density surface mounting and high speed assembly. ordering information type no. laser mark package name package code (previous code) hzm6.2zmwa 62n mpak plsp0003zc-a (mpak) pin arrangement 1. cathode 2. cathode 3. anode (top view) 3 2 1
hzm6.2zmwa rev.1.00 jun 08, 2005 page 2 of 5 absolute maximum ratings (ta = 25 c) item symbol value unit power dissipation pd * 1 200 mw junction temperature tj 150 c storage temperature tstg ? 55 to +150 c note: 1. two device total, see fig.2. electrical characteristics * 1 (ta = 25 c) item symbol min typ max unit test condition zener voltage v z 5.90 ? 6.50 v i z = 5 ma, 40 ms pulse reverse current i r ? ? 3 a v r = 5.5 v capacitance c ? ? 8.5 pf v r = 0 v, f = 1 mhz dynamic resistance r d ? ? 60 ? i z = 5 ma esd-capability * 2 ? 13 ? ? kv c = 150 pf, r = 330 ? , both forward and reverse direction 10 pulse notes: 1. per one device 2. failure criterion ; i r > 3 a at v r = 5.5 v.
hzm6.2zmwa rev.1.00 jun 08, 2005 page 3 of 5 main characteristic t ta = 25 c nonrepetitive fig.3 surge reverse power ratings time t (s) 1.0 10 nonrepetitive surge reverses power p rsm (w) 10 2 10 3 10 4 10 ?2 10 ?1 1.0 10 ?5 10 ?4 10 ?3 p rsm 02 10 8 6 4 250 200 150 100 50 200 150 100 50 0 0 1.0mm 0.8mm fig.2 power dissipation vs. ambient temperature ambient temperature ta ( c) power dissipation pd (mw) printed circuit board 25 62 1.6t mm material: glass epoxy resin+cu foil cu foil 10 ?5 10 ?6 10 ?4 10 ?3 10 ?2 fig.1 zener current vs. zener voltage zener voltage v z (v) zener current i z (a)
hzm6.2zmwa rev.1.00 jun 08, 2005 page 4 of 5 1.0 10 10 2 10 3 10 4 10 10 2 10 3 10 ?2 10 ?1 1.0 time t (s) transient thermal impedance zth ( c/w) fig.4 transient thermal impedance * note: measurement value by forward bias.
hzm6.2zmwa rev.1.00 jun 08, 2005 page 5 of 5 package dimensions pattern of terminal position areas e e 1 l 1 b 2 b c a ? a section d a a b e h e e a a 1 q c l a1.0-1.3 a 1 0 - 0.1 b 0.35 0.4 0.5 c 0.1 0.16 0.26 d2.7-3.1 e 1.35 1.5 1.65 - 0.95 - -- e h e 2.2 2.8 3.0 l 0.65 b 2 - - 0.55 -1.95- e 1 l 1 - - 1.05 q-0.3- dimension in millimeters min nom max reference symbol sc-59a 0.011g mass[typ.] mpak(d) / mpak(d)v plsp0003zc-a renesas code jeita package code previous code
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is al ways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating i n the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents in formation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or e rrors. please also pay attention to information published by renesas technology corp. by various means, including the renesas technolo gy corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, an d algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under cir cumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materia ls. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lice nse from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com refer to " http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology hong kong ltd. 7th floor, north tower, world finance centre, harbour city, 1 canton road, tsimshatsui, kowloon, hong kong tel: <852> 2265-6688, fax: <852> 2730-6071 renesas technology taiwan co., ltd. 10th floor, no.99, fushing north road, taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. unit2607 ruijing building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1 harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 200 5. re nesas technology corp ., all rights reser v ed. printed in ja pan. colophon 2.0


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