1 16.5kv esd protected, +125c, 3.0v to 5.5v, tdfn packaged, 16mbps, full fail-safe, low power, rs-485/rs-422 receiver isl3282emrtep the intersil isl3282emrtep is a 16.5kv iec61000 esd protected, 3.0v to 5.5v powered, single receiver that meets both the rs-485 and rs-422 standards for balanced communication. this receiver has very low bus currents (+125a/-100a), so it presents a true ?1/8 unit load? to the rs-485 bus. this allows up to 256 receivers on the network without violating the rs-485 specification?s 32 unit load maximum and without using repeaters. receiver inputs feature a ?full fail-safe? design, which ensures a logic high rx output if rx inputs are floating, shorted, or terminated but undriven. the isl3282emrtep includes an ac tive low enable pin and is offered in the military temper ature range (-55c to +125c). a 26% smaller footprint is available with the tdfn package. this device also features a logic supply pin (v l ) that sets the v oh level of the ro output (and the switching points of the re/re input) to be compatible with another supply voltage in mixed voltage systems. device information the specifications for an enhanced product (ep) device are defined in a vendor item drawing (vid), which is controlled by the defense supply center in columbus (dscc). ?hot-links? to the applicable vid and ot her supporting application information are provided on our website. applications ?clock distribution ?high node count systems ? space constrained systems ?security camera networks ? building environmental control/lighting systems ? industrial/process control networks features ? specifications per dscc vid v62/10601-01xb ? full mil-temp electrical performance from -55c to +125c ? controlled baseline with one wafer fabrication site and one assembly/test site ? full homogeneous lot processing in wafer fab ? no combination of wafer fa brication lots in assembly ? full traceability through assembly and test by date/trace code assignment ? enhanced process change notification ? enhanced obsolescence management ? eliminates need for up-screening a cots component ? 16.5kv iec61000 esd protection on rs-485 inputs ? class 3 esd level on all other pins . . . . . . . . . . . . .>5kv hbm ? pb-free (rohs compliant) ? wide supply range . . . . . . . . . . . . . . . . . . . . . . . . 3.0v to 5.5v ?specified for +125 c operation ? logic supply pin (v l ) eases operation in mixed supply systems ? full fail-safe (open, short, terminated/undriven) ? true 1/8 unit load allows up to 256 devices on the bus ? high data rates . . . . . . . . . . . . . . . . . . . . . . . . . up to 16mbps ? low quiescent supply current . . . . . . . . . . . . . . 500a (max) ? very low shutdown supply current . . . . . . . . . . . 20a (max) ? -7v to +12v common mo de input voltage range ? tri-statable rx available (active low or high en input) ?5v tolerant logic inputs when v cc 5v table 1. summary of features part number function data rate (mbps) # devices on bus rx enable? v l pin? quiescent i cc ( a) low power shutdown? lead count isl3282emrtep 1 rx 16 256 active low yes 350 yes 8-tdfn february 15, 2011 fn7595.1 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2010, 2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners.
isl3282emrtep 2 fn7595.1 february 15, 2011 ordering information part number (notes 1, 2) vendor item drawing part marking temp. range (c) package (tape and reel) (pb-free) isl3282emrtep-t v62/10601-01xb 282 -55 to +125 8 ld tdfn ISL3282EMRTEP-TK v62/10601-01xb 282 -55 to +125 8 ld tdfn notes: 1. these intersil pb-free plastic packaged products employ spec ial pb-free material sets; molding compounds/die attach materials and 100% matte tin plate plus anneal - e3 termination finish, which is rohs compli ant and compatible with both snpb and pb-free soldering operatio ns. intersil pb- free products are msl classified at pb-free peak reflow temperat ures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 2. please refer to tb347 for details on reel specifications. 3. for moisture sensitivity level (msl), please see device information page for isl3282emrtep . for more information on msl please see techbrief tb363 . truth table receiving inputs output re a - b ro 0 -0.05v 1 0 -0.2v 0 0 inputs open/shorted 1 1xhigh-z* pin configurations isl3282emrtep (8 ld tdfn) top view 2 3 4 1 7 6 5 8 ro gnd nc v cc b re v l a r pin descriptions pin name function ro receiver output: if a - b -50mv, ro is high; if a - b -200mv, ro is low; ro = high if a and b are unconnected (floating) or shorted. re receiver output enable. ro is enabled when re is low; ro is high impedance when re is high. if the rx enable function isn?t used, connect re directly to gnd. re is internally pulled high. gnd ground connection. this is also th e potential of the tdfn thermal pad. a 16.5kv iec61000 esd protected rs-485, rs-422 level, noninverting receiver input. b 16.5kv iec61000 esd protected rs-485, rs-422 level, inverting receiver input. v cc system power supply input (3.0v to 5.5v). on devices with a v l pin, power-up v cc first. v l logic-level supply which sets the v il /v ih levels for the re pin, and sets the v oh level of the ro output. power-up this supply after v cc , and keep v l v cc. nc no connection.
isl3282emrtep 3 fn7595.1 february 15, 2011 typical operating circuits network with v l pin for interface to lower voltage logic devices 0.1f + r 5 8 4 1 7 2 v cc gnd ro re b a +3.3v to 5v 0.1f + d 7 6 8 2 3 4, 5 v cc gnd de di z y r t +3.3v isl3282emrtep isl3298emrtep 1 v l 2.5v 6 v l 1.8v v cc logic device (mp, asic, uart) v cc logic device (p, asic, uart) test circuits and waveforms figure 1a. test circuit figure 1b. measurement points figure 1. receiver propagation delay and data rate figure 2a. test circuit figure 2b. measurement points figure 2. receiver enable and disable times signal generators r ro re a b gnd 15pf re v cc ro +1v -1v t plh 0v 0v v cc or v l 0v 50% 50% t phl a b 1k ? v cc or v l gnd sw parameter a sw t hz +1.5v gnd t lz -1.5v v cc or v l t zh +1.5v gnd t zl -1.5v v cc or v l signal generator r ro re a b gnd 15pf ro 3v 0v 1.5v 1.5v v oh 0v 50% v oh - 0.25v t hz ro v cc or v l v ol 50% v ol + 0.25v t lz re output high output low t zl t zh
isl3282emrtep 4 fn7595.1 february 15, 2011 application information rs-485 and rs-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. rs-422 is a subset of rs-485, so rs-485 transceivers are also rs-422 compliant. rs-422 is a point-to-m ultipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. rs-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. another important advantage of rs-485 is the extended common mode range (cmr), whic h specifies that the driver outputs and receiver inputs with stand signals that range from +12v to -7v. rs-422 and rs-485 ar e intended for runs as long as 4000?, so the wide cmr is necessa ry to handle ground potential differences, as well as voltages induced in the cable by external fields. receiver features this device utilize a differential input receiver for maximum noise immunity and common mode rejectio n. input sensitivity is better than 200mv, as required by the rs-422 and rs-485 specifications. receiver input resistance of 96k surpasses the rs-422 specification of 4k and is eight times the rs-485 ?unit load (ul)? requirement of 12k minimum. thus, these products are known as ?one-eighth ul? transcei vers and there can be up to 256 of these devices on a networ k while still complying with the rs-485 loading specification. receiver inputs function with co mmon mode voltages as great as +9v/-7v outside the power supplies (i.e., +12v and -7v), making them ideal for long networks wh ere induced voltages, and ground potential differences are realistic concerns. the isl3282emrtep includes a ?full fail-safe? function that guarantees a high level receiver ou tput if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated but undriven bus. fail-safe with shorted inputs is achieved by setting the rx upper switching point to -50mv, thereby ensuring that the rx sees 0v di fferential as a high input level. the receiver can easily support a 16mbps data rate, and its output is tri-statable via the active low re input. wide supply range the isl3282emrtep is designed to operate with a wide range of supply voltages from 3.0v to 5.5v. this device meets the rs-422 and rs-485 specifications over this full range. logic supply (v l pin) note: power-up v cc before powering up the v l supply. the isl3282emrtep includes a v l pin that powers the logic input (re ) and/or the rx output. these pins interface with ?logic? devices such as uarts, asics, and microcontrollers. today, most of these devices use power supplie s significantly lower than 3.3v, thus, a 3.3v output level from a 3.3v powered rs-485 ic might seriously overdrive and damage the logic device input. similarly, the logic device?s low v oh might not exceed the v ih of a 3.3v or 5v powered re input. connecting the v l pin to the power supply of the logic device (as shown in figure 3) limits the isl3282emrtep?s rx output v oh to v l (see figures 6 through 10), and reduces the re input switching point to a value compatible with the logic device?s output levels. tailoring the logic pin input switching point and output levels to the supply voltage of the uart, asic, or microcontroller eliminates the need for a level shifter/translator between the two ics. v l can be anywhere from v cc down to 1.35v, but the input switching points may not provid e enough noise margin when v l < 1.6v. table 2 indicates typical v ih , v il , and data rate values for various v l settings so the user can ascertain whether or not a particular v l voltage meets his/her needs. the quiescent, ro unloaded, v l supply current (i l ) is typically less than 60a for v l 3.3v, as shown in figure 5. esd protection all pins on the device includ e class 3 (>4kv) human body model (hbm) esd protection structures, but the rs-485 pins (receiver inputs) incorporate advanced structures allowing them to survive esd events in excess of 16.5kv hbm and 16.5kv iec61000. the rs-485 pins are particularly vulnerable to esd damage because they typically connect to an exposed port on the exterior of the finished product. simply touching the port pins, or connecting a cable, can cause an esd event that might destroy unprotected ics. these new esd structures protect the device whether or not it is po wered up, and without degrading the rs-485 common mode range of -7v to +12v. this built-in table 2. v ih , v il and data rate vs v l for v cc =3.3v or 5v v l (v) v ih (v) v il (v) data rate (mbps) 1.35 0.55 0.5 11 1.6 0.7 0.6 16 1.8 0.8 0.7 23 2.3 1 0.9 27 2.7 1.1 1 30 3.3 1.3 1.2 30 5.5 (i.e., v cc )2 1.8 24 figure 3. using v l pin to adjust logic levels gnd r xd rxen v cc = +2v uart/processor gnd ro re v cc = +3.3v to 5v isl3282e v oh 2v v oh = 2v v ih = 1v esd diode v l
isl3282emrtep 5 fn7595.1 february 15, 2011 esd protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. iec61000-4-2 testing the iec61000 test method applies to finished equipment, rather than to an individual ic. therefore, the pins most likely to suffer an esd event are those that are exposed to the outside world (the rs-485 pins in this case), and the ic is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. the lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the hbm test. the extra esd protection built into this device?s rs-485 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the rs-485 port. air-gap discharge test method for this test method, a charged probe tip moves toward the ic pin until the voltage arcs to it. the current waveform delivered to the ic pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. the a and b rs-485 pins withstand 16.5kv air-gap discharges. contact discharge test method during the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. the result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 9kv. the isl3282emrtep can survive 9kv contact discharges on the rs- 485 pins. data rate, cables, and terminations rs-485, rs-422 are intended for network lengths up to 4000?, but the maximum system data rate decreases as the transmission length increases. networks operating at 16mbps are limited to lengths less than 100?, while a 250kbps network that uses slew rate limited transmitters can operate at that data rate over lengths of several thousand feet. twisted pair is the cable of choice for rs-485, rs-422 networks. twisted pair cables tend to pick up noise and other electromagnetically induced voltag es as common mode signals, which are effectively rejected by the differential receiver in these ics. to minimize reflections, proper termination is imperative for high data rate networks. short networks using slew rate limited transmitters need not be terminated, but terminations are recommended unless power dissipation is an overriding concern. in point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120 ) at the end farthest from the driver. in multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. stubs connecting a transmitter or receiver to the main cable should be kept as short as possible. low power shutdown mode this bicmos receiver uses a fraction of the power required by its bipolar counterparts, and include a shutdown feature that reduces the already low quiescent i cc to a 20a trickle. they enter shutdown whenever the receiver is disabled (re =v cc ).
isl3282emrtep 6 fn7595.1 february 15, 2011 typical performance curves c l = 15pf, t a = +25 c; unless otherwise specified. figure 4. supply current vs temperature figure 5. v l supply current vs enable pin voltage figure 6. receiver output current vs receiver output voltage figure 7. receiver output cu rrent vs receiver output voltage figure 8. receiver output current vs receiver output voltage figure 9. receiver output current vs receiver output voltage 370 380 390 400 410 420 430 440 -55 -35 -15 5 25 45 65 85 105 125 temperature (c) i cc (a) v cc = v l = 3.3v v cc = v l = 5.5v 024 re voltage (v) i l (ma) 135 0 50 100 150 200 250 677.5 v cc = 5v or 3.3v v l = 3.3v v l = 5v, v cc = 5v only v l = 2.5v v l 1.8v receiver output voltage (v) receiver output current (ma) 0345 2 1 0 10 20 30 40 50 60 v oh , +25c v ol , +25c v ol , +85c v cc = v l = 5v v oh , +125c v ol , +125c v oh , +85c 0 5 10 30 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 3.3v v oh , +125c v ol , +125c v oh , +85c 20 15 25 receiver output current (ma) 0 0.5 1.0 1.5 2.0 2.5 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 2.5v v oh , +125c v ol , +125c v oh , +85c 0 2 4 6 8 10 12 14 16 18 20 receiver output current (ma) 0 1 8 9 0 0.5 1.0 1.5 1.8 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.8v v oh , +125c v ol , +125c v oh , +85c receiver output current (ma) 2 3 4 5 6 7
isl3282emrtep 7 fn7595.1 february 15, 2011 figure 10. receiver output current vs receiver output voltage figure 11. receiver propagation delay vs temperature figure 12. receiver skew vs temperature figure 13. receiver propagation delay vs temperature figure 14. receiver skew vs temperature figure 15. receiver waveforms typical performance curves c l = 15pf, t a = +25 c; unless otherwise specified. (continued) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.5 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.5v v oh , +125c v ol , +125c v oh , +85c 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 receiver output current (ma) 20 25 30 35 40 45 -55 -35 -15 5 25 45 65 85 105 125 temperature (c) propagation delay (ns) v cc = 5.5v, tplh v cc = 5.5v, tphl 0.0 0.5 1.0 1.5 2.0 2.5 -55 -35 -15 5 25 45 65 85 105 125 temperature (c) propagation delay (ns) v cc = 3.3v, skew 20 25 30 35 40 45 50 -55 -35 -15 5 25 45 65 85 105 125 temperature (c) propagation delay (ns) v cc = 3.3v, tplh v cc = 3.3v, tphl 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 -55 -35 -15 5 25 45 65 85 105 125 temperature (c) propagation delay (ns) v cc = 5.0v, skew time (20ns/div) receiver output (v) 2.0 -2.0 0 0 1.0 receiver input (v) a - b 2.0 3.0 4.0 5.0 v l = 1.5v v l = 2.5v v l = 5v v cc = 5v
isl3282emrtep 8 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7595.1 february 15, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog signal processi ng functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentation an d related parts, please see the respective device information page on intersil.com: isl3282emrtep to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at: http://rel.intersil.com/reports/sear figure 16. receiver waveforms die characteristics substrate and tdfn thermal pad potential (powered up): gnd transistor count: 140 process: si gate bicmos typical performance curves c l = 15pf, t a = +25 c; unless otherwise specified. (continued) time (20ns/div) receiver output (v) 2.0 -2.0 0 0 1.0 receiver input (v) a - b 2.0 3.0 4.0 v l = 1.5v v l = 2.5v v l = 3.3v v cc = 3.3v revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 1/27/11 fn7595.1 in figure 4 on page 6, corrected units of y axis from ma to a. 2/26/10 fn7595.0 initial release.
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