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?2002 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.5 features ? 5-ch balanced transformerless (btl) driver ? 1-ch (forward reverse) control dc motor driver ? operating supply voltage (4.5 v ~ 13.2 v) ? built in thermal shut down circuit (tsd) ? built in channel mute circuit ? built in power save mode circuit ? built in tsd monitor circuit ? built in 2-op amps description the fan8034 is a monolithic integrated circuit suitable for a 6-ch motor driver which drives the tracking actuator, focus actuator, sled motor, spindle motor, and tray motor of the cdp/car-cd/dvdp systems. 48-qfph-1414 typical application ? compact disk player ? video compact disk player ? car compact disk player ? digital video disk player ordering information device package operating temperature fan8034 48-qfph-1414 -35 c ~ +85 c FAN8034L fan8034 6-ch motor driver
fan8034 2 pin assignments 1 2 3 4 5 6 7 8 9 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 30 29 28 33 32 31 36 35 34 fan8034 in1 ? out1 in2+ in2 ? out2 in3+ in3 ? out3 10 11 12 do2 ? pgnd1 do3+ do3 ? do4+ do4 ? do5+ do5 ? pgnd2 do6+ in1+ svcc vref pvcc1 do1+ do1 ? do2+ sgnd ps mute12 pvcc2 do6 ? in4+ in4 ? out4 in5+ in5 ? out5 fwd rev ctl mute34 mute5 tsd-m opin1+ opin1 ? opout1 opin2+ opin2 ? opout2 fin (gnd) fin (gnd) fin (gnd) fin (gnd)
fan8034 3 pin definitions pin number pin name i/o pin function description 1 in1- i ch1 op-amp input (-) 2 out1 o ch1 op-amp output 3 in2+ i ch2 op-amp input (+) 4 in2- i ch2 op-amp input (-) 5 out2 o ch2 op-amp output 6 in3+ i ch3 op-amp input (+) 7 in3- i ch3 op-amp input (-) 8 out3 o ch3 op-amp output 9 in4+ i ch4 op-amp input (+) 10 in4- i ch4 op-amp input (-) 11 out4 o ch4 op-amp output 12 in5+ i ch5 op-amp input (+) 13 in5- i ch5 op-amp input (-) 14 out5 o ch5 op-amp output 15 ctl i ch6 motor speed control 16 fwd i ch6 forward input 17 rev i ch6 reverse input 18 sgnd - signal ground 19 mute12 i mute for ch1,2 20 mute34 i mute for ch3,4 21 mute5 i mute for ch5 22 tsd-m o tsd monitor 23 pvcc2 - power supply voltage 2 (for ch5, ch6) 24 do6- o ch6 drive ouptut (-) 25 do6+ o ch6 drive output (+) 26 pgnd2 - power ground 2 (for ch5, ch6) 27 do5- o ch5 drive ouptut (-) 28 do5+ o ch5 drive output (+) 29 do4- o ch4 drive ouptut (-) 30 do4+ o ch4 drive output (+) 31 do3- o ch3 drive ouptut (-) 32 do3+ o ch3 drive output (+)
fan8034 4 pin definitions (continued) pin number pin name i/o pin function description 33 pgnd1 - power ground 1 (for ch1, ch2, ch3, ch4) 34 do2- o ch2 drive ouptut (-) 35 do2+ o ch2 drive output (+) 36 do1- o ch1 drive ouptut (-) 37 do1+ o ch1 drive output (+) 38 pvcc1 - power supply voltage 1 (for ch1, ch2, ch3, ch4) 39 ps i power save 40 opout2 o normal op-amp2 output 41 opin2- i normal op-amp2 input (-) 42 opin2+ i normal op-amp2 input (+) 43 vref i bias voltage input 44 svcc - signal & opamps supply voltage 45 opout1 o normal op-amp1 output 46 opin1- i normal op-amp1 input (-) 47 opin1+ i normal op-amp1 input (+) 48 in1+ i ch1 op-amp intput (+)
fan8034 5 internal block diagram ? + + ? + ? + ? + ? + ? pgnd1 do2+ do2 ? do3+ do3 ? do4+ do4 ? pgnd2 do5+ do5 ? do6+ 1 2 3 4 5 6 7 8 9 10 11 12 in1+ in1 ? out1 in2+ in2 ? out2 in3+ in3 ? out3 13 14 15 16 17 18 19 20 21 22 23 24 sgnd tsd-m pvcc2 do6 ? 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 do1 ? do1+ pvcc1 vref svcc opin1 ? opin1+ t. s . d mute12 power save ? + opout1 opin2 ? opin2+ opout2 ps in4+ in4 ? out4 in5+ in5 ? out5 ctl fwd rev + ? mute5 mute34 mute12 + ? + ? + ? + ? + ? + ? + ? + ? + ? + ? mute34 mute5 tsd-m 40k 10k fin (gnd) fin (gnd) fin (gnd) fin (gnd) note. + ? + ? 40k 10k pref do+ do- detailed circuit of the output power amp 10k 10k 40k 40k pref1 is almost pvcc1 / 2 pref2 is almost pvcc2 / 2 from input opamp vref s w m s c ? + d d
fan8034 6 equivalent circuits description pin no internal circuit btl input 1,4,7,10,13,46 3,6,9,12,47,48 op-amp input 41,42 vref 43 output 2,5,8,11,14,45 vcc vcc 2k 2k 6 3 9 12 47 48 4 1 7 10 13 46 vcc 5k 5k 41 42 vcc 43 1k 1k 5k vcc vcc vcc vcc 5 11 45 2 8 14
fan8034 7 equivalent circuits (continued) description pin no internal circuit opout 40 mute1234 19,20,21 mute5 21 tsd-m 22 vcc vcc 40 0.05k 0.05k vcc 20 50k 50k 20k 19 21 21 vcc 1k 39k 22 20k
fan8034 8 equivalent circuits (continued) description pin no internal circuit ps 39 fwd,rev 16,17 output 27,28,29,30,31,32, 34,35,36,37 output 24,25 50k 50k 100k 39 vcc vcc 17 30k 30k 16 30k 30k vcc 40 7k vcc 28 30 32 35 37 27 29 31 34 36 40k vcc parastic diode freewheeling diode vcc parastic diode freewheeling diode vcc 7k vcc 60k 25 24
fan8034 9 absolute maximum ratings ( ta=25 c) notes: 1. when mounted on 70mm 70mm 1.6mm pcb 2. power dissipation reduces 24mw/ c for using above t a = 25 c 3. do not exceed p d and soa recommended operating conditions ( ta=25 c) parameter symbol value unit maximum supply voltage svcc max 18 v pv cc1 18 v pv cc2 18 v power dissipation p d 3 note w operating temperature t opr -35 ~ +85 c storge temperature t stg -55 ~ +150 c maximum output current i omax 1a parameter symbol min. typ. max. unit operating supply voltage sv cc 4.5 - 13.2 v pv cc1 4.5 - 13.2 v pv cc2 4.5 - 13.2 v 3,000 2,000 1,000 0 0 25 50 75 100 125 150 175 pd (mw) ambient temperature, ta [ c]
fan8034 10 electrical characteristics (sv cc =5v, pv cc1 = pv cc2 = 11v, t a = 25 c, unless otherwise specified) note1: when the voltage of the pin 39 is below 0.5v then the power save circuit cuts off the main bias current, so that the whole circuits are disabled (whole circuits are " drive circuit ", " input op amp circuit " and " normal op amp circuit ") note2: guaranteed field(no eds/final test) parameter symbol conditions min. typ. max. unit quiescent circuit current i cc under no-load - 30 - ma power save on current i ps note1 under no-load - - 1 ma power save on voltage v pson pin39 = variation - - 0.5 v power save off voltage v psoff pin39 = variation 2 - - v mute12 on voltage v mon12 pin19 = variation - - 0.5 v mute12 off voltage v moff12 pin19 = variation 2 - - v mute34 on voltage v mon34 pin20 = variation - - 0.5 v mute34 off voltage v moff34 pin20 = variation 2 - - v mute5 on voltage v mon5 pin21 = variation - - 0.5 v mute5 off voltage v moff5 pin21 = variation 2 - - v btl driver circuit output offset voltage v oo v in = 2.5v -100 - +100 mv maximum output voltage1 v om1 r l = 10 ? 7.5 9.0 - v maximum output voltage2 v om2 r l = 18 ? 8.5 9.5 - v closed-loop voltage gain a vf v in = 0.1vrms 16.8 18 19.2 db ripple rejection ratio note2 rr v in = 0.1vrms, f = 120hz - 60 - db slew rate note2 sr square, vout = 4vp-p 1 2 - v/ s input opamp circuit input offset voltage1 v of1 - -10 - +10 mv input bias current1 i b1 - - - 400 na high level output voltage1 v oh1 -4.44.7-v low level output voltage1 v ol1 --0.20.5v output sink current1 i sink1 r l = 50 ? 12 -ma output source current1 i sou1 r l = 50 ? 12 -ma common mode input range1 note2 vicm1 - -0.3 - 4.0 v open loop voltage gain1 note2 g vo1 v in = -75db - 80 - db ripple rejection ratio1 note2 rr1 v in = -20db, f = 120hz - 65 - db common mode rejection ratio1 note2 cmrr1 v in = -20db - 80 - db slew rate1 note2 sr1 square, vout = 3vp-p - 1.5 - v/ s
fan8034 11 electrical characteristics (continued) (sv cc = 5v, pv cc1 = pv cc2 = 11v, t a = 25 c, unless otherwise specified) note: guaranteed field(no eds/final test) parameter symbol conditions min. typ. max. unit normal op amp circuit 1 input offset voltage2 v of2 - -10 - +10 mv input bias current2 i b2 - - - 400 na high level output voltage2 v oh2 -4.44.7-v low level output voltage2 v ol2 --0.20.5v output sink current2 i sink2 r l = 50 ? 24 -ma output source current2 i sou2 r l = 50 ? 24 -ma common mode input range2 note vicm2 - -0.3 - 4.0 v open loop voltage gain2 note g vo2 v in = -75db - 80 - db ripple rejection ratio2 note rr2 v in = -20db, f = 120hz - 65 - db common mode rejection ratio2 note cmrr2 v in = -20db - 80 - db slew rate2 note sr2 square, vout = 3vp-p - 1.5 - v/ s normal op amp circuit 2 input offset voltage3 v of3 - -15 - +15 mv input bias current3 i b3 - - - 400 na high level output voltage3 v oh3 -33.8-v low level output voltage3 v ol3 --1.01.5v output sink current3 i sink3 r l = 50 ? 10 - - ma output source current3 i sou3 r l = 50 ? 10 - - ma open loop voltage gain3 note g vo3 v in = -75db - 80 - db ripple rejection ratio3 note rr3 v in = -20db, f = 120hz - 65 - db common mode rejection ratio3 note cmrr3 v in = -20db - 80 - db slew rate3 note sr3 square, vout = 3vp-p - 1.5 - v/ s tray drive cirtuit input high level voltage v ih -2--v input low level voltage v il ---0.5v output voltage1 v o1 pv cc2 = 11v, v ctl = 3v, r l = 45 ? -6-v output voltage2 v o2 pv cc2 = 13v, v ctl = 4.5v, r l = 45 ? -9-v output voltage3 v o3 pv cc2 = 11v, v ctl = 1.5v, r l = 10 ? 2.533.5v output load regulation ? v rl v ctl =3v, i l =100ma 400ma - 300 700 mv output offset voltage1 v oo1 v in = 5v, 5v -40 - +40 mv output offset voltage2 v oo2 v in = 0v, 0v -40 - +40 mv
fan8034 12 application information 1. thermal shutdown ? when the chip temperature reaches to 160 c by abnormal condition, then the tsd circuit is activated. ? this shut down the bias current of the output drivers, and all the output drivers are in cut-off state. thus the chip temperature begin to decrease. ? when the chip temperature falls to 135 c, the tsd circuit is deactivated and the output drivers are normally operated. ? the tsd circuit has the hysteresis temperature of 25 c. 2. ch mute function ? when the pin19,20,21 is high, the tr q1 is turned on and q2 is off, so the bias circuit is enabled. on the other hand, when the pin19,20,21 is low (gnd) , the tr q1 is turned off and q2 is on, so the bias circuit is disabled. ? that is, this function will cause all the output drivers to be in mute state. ? truth table is as follows; 3. power save function ? when the pin39 is high, the tr q3 is turned on and q4 is off, so the bias circuit is enabled. on the other hand, when the pin39 is low (gnd) , the tr q3 is turned off and q4 is on, so the bias circuit is disabled. ? that is, this function keeps all the circuit blocks of the chip off, thus the low power quiscent state is established. ? truth table is as follows; pin 19, 20, 21 fan8034 high mute-off low mute-on pin39 fan8034 high power save off low power save on svcc r2 r3 q0 output driver bias hysteresis r1 ihys i ref 19 q1 bias blocks (5-ch btl) q2 svcc 20 21 39 q3 svcc q4 main bias
fan8034 13 4. tsd monitor function ? pin22 is tsd monitor pin which detects the state of the tsd block and generates the tsd-monitor signal. ? in normal state q5 is turned on, so q6 is turned off. on the otherhand, when the tsd block is is activated then q5 is turned off, so the voltage of pin22 is low. ? truth table is as follows 5. focus, tracking actuator, spindle, sled motor drive part ? the voltage, vref is the reference voltage given by the external bias voltage of the pin 43. ? the input signal (vin) through pins 1,4,7, 10 and 13 is amplified one time and then fed to the output stage. (assume that input opamp was used as a buffer) ? the total closed loop voltage gain is as follows ? if you want to change the total closed loop voltage gain, you must use the input opamp as an amplifier ? the output stage is the balanced transformerless (btl) driver. ? the bias voltage vp is expressed as ; tsd circuit pin22 fan8034 -high tsd off - low tsd on 22 q5 svcc q6 43 vref 48 3 6 + ? + ? 9 + ? in+ in- vp vp m r1 r2 r2 r2 r2 r1 r1 r2 do+ do- + ? pvcc1(pvcc2) 60k 62k dp qp vin 28 27 30 32 35 34 31 29 12 1 4 7 10 13 2 5 8 10 14 out 37 36 vin vref v ? + = dop vp 4 v ? + = don vp 4 ? v ? = vout dop don 8 v ? = ? = gain 20 vout v ? ------------ - log 20 8 log 18db = == vp pvcc1 vdp ? vcesatqp ? () 62k 60k 62k + ------------------------- - vcesatqp + = pvcc1 vdp ? vcesatqp + 1.97 -------------------------------------------------------------------------- - = vcesatqp + - - - - - - - - - - (1)
fan8034 14 6. tray, changer,panel motor drive part ? rotational direction control the forward and reverse rotational direction is controlled by fwd (pin16) and rev (pin17) and the input conditions are as follows. ? where vp(power reference voltage) is approximately about 3.75v at pv cc2 =8v ) according to equation (1). ? where out1 pins are pins24 and out2 pins are pins25 ? motor speed control (when sv cc =pv cc2 =8v) - the almost maximum torque is obtained when the pin (15(ctl)) is open. - if the voltage of the pins (15 (ctl)) is 0v, the motor will not operate. - when the control voltage of the pin15 is between 0 and 3.25v, the differential output voltage(v(out1,out2)) is about two times of control voltage. hence, the control to the differential output gain is two. - when the control voltage is greater than 3.25v, the output voltage is saturated at the 6.5v because of the output swing limitation. input output fwd rev out 1 out 2 state h h vp vp brake hlhlforward lhlhreverse l l - - hign impedance m 24 25 out 1 out 2 d level shift m.s.c s.w d ctl in fwd rev in 16 17 15 v(out1,out2) v ctl 0 6.5v 3.25v
fan8034 15 test circuits 37 38 39 40 41 42 43 44 45 46 47 48 9 10 11 12 8 7 6 5 4 1 2 3 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 31 32 33 34 35 36 op in (+) op in (-) op out ctl opin(+) opin( ? ) opout fan8034 in2+ in2- out2 in3+ in3 ? out3 in4+ in4 ? out4 opin1+ fwd rev sgnd tsd_m ctl ps mute12 pvcc2 do6 ? do6+ pgnd1 do5 ? do5+ do4 ? do4+ do3 ? do3+ pgnd2 29 30 op in (+) op in (-) op out op in (+) op in (-) op out op in (+) op in (-) op out do2- ina inb vref 2.5 v a 123 v pulse v a b 123 v b c d 50 ? v cc 1 2 v out op - amp part r l7 i l i l out1 in1 ? in1+ svcc vref pvcc1 do1+ do1 ? do2+ opin1 ? opout1 opin2+ opin2 ? opout2 in5+ in5 ? out5 mute34 mute5 r l1 r l2 r l3 r l4 r l5 op in (+) op in (-) op out op in (+) op in (-) op out op in (-) op in (+) op out + 100 f + 1 2 50 ? 1000 f v cc ripple
fan8034 16 typical application circuits 1 [voltage control mode] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 m tray control tray input vref focus input tracking input sled input [servo pre amp] [controller] fan8034 m focus, tracking, mute sled spindle tracking focus spindle mute m tray in2+ in2- out2 in3 ? out3 in4+ in4 ? out4 opin1+ fwd rev sgnd mute5 ctl ps mute12 pvcc2 do6 ? do6+ pgnd1 do5 ? do5+ do4 ? do4+ do3 ? do3+ pgnd2 do2- in1+ svcc vref pvcc1 do1+ do1 ? do2+ opin1 ? opout1 opin2+ opin2 ? opout2 in5 ? out5 mute34 tsd_m in3+ out1 in1 ? sled mute power save spindle input in5+ tsd monitor svcc pvcc1 pvcc2 pvcc2
fan8034 17 typical application circuits 2 [ differential pwm control mode ] note: radiation pin is connected to the internal gnd of the package. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 m tray control tray input vref focus input tracking input sled input spindle input [servo pre amp] [controller] fan8034 power save focus, tracking mute tray spindle tracking focus spindle mute m in2+ in2- out2 in3 ? out3 in4+ in4 ? out4 opin1+ fwd rev sgnd tsd_m ctl ps mute12 pvcc2 do6 ? do6+ pgnd1 do5 ? do5+ do4 ? do4+ do3 ? do3+ pgnd2 do2- in1+ svcc vref pvcc1 do1+ do1 ? do2+ opin1 ? opout1 opin2+ opin2 ? opout2 in5 ? out5 mute34 mute5 in3+ out1 in1 ? in5+ sled mute tsd monitor m sled svcc pvcc1 pvcc2 pvcc2
fan8034 9/6/02 0.0m 001 stock#dsxxxxxxxx ? 2002 fairchild semiconductor corporation life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

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