mk2308-2 mds 2308-2 c 1 revision 070705 integrated circuit systems 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com z ero d elay , l ow s kew b uffer description the mk2308-2 is a low jitter, low skew, high performance phase-lock loop (pll) based zero delay buffer for high speed applications. based on ics? proprietary low jitter pll techniques, the device provides eight low skew outputs at speeds up to 133.3 mhz at 3.3 v. the mk2308-2 includes a bank of four outputs running at 1/2x. in the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all eight outputs. compared to competitive cmos devices, the mk2308-2 has the lowest jitter. features ? packaged in 16-pin soic ? available in pb (lead) free package ? zero input-output delay ? four 1x outputs plus four 1/2x outputs ? output to output skew is less than 250 ps ? output clocks up to 133.3 mhz at 3.3 v ? ability to generate 2x the input ? full cmos outputs with 18 ma output drive capability at ttl levels at 3.3 v ? spread smart tm technology works with spread spectrum clock generators ? advanced, low power, sub micron cmos process ? operating voltage of 3.3 v block diagram clka4 clkb1 clka3 clkb2 clkb3 clka2 clka1 clkb4 control logic s2, s1 2 pll fbin clkin /2 vdd 2 gnd 2 bank a bank b
z ero d elay , l ow s kew b uffer mds 2308-2 c 2 revision 070705 integrated circuit systems 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com mk2308-2 pin assignment feedback configuration table output clock mode select table pin descriptions 1 2 3 gnd 4 clka1 5 6 clka4 7 8 clka3 vdd clkb3 clkb2 fbin clkb1 s1 clka2 16 clkin vdd s2 clkb4 gnd 15 14 13 12 11 10 9 16-pin (150 mil) soic feedback from clka1:a4 clkb1:b4 bank a clkin clkin/2 bank b 2xclkin clkin s2 s1 clocks a1:a4 clocks b1:b 4 internet generation pll status 0 0 tri-state (high impedance) tr i-state (high impedance) none on 0 1 running tri-state (high impedance) pll on 1 0 running running buffer only (no zero delay) off 1 1 running running pll on pin number pin name pin type pin description 1 clkin input clock input. connect to input clock source. 2 - 3 clka1:a4 output clock a bank of four outputs. 4 vdd power power supply. connect pin to same voltage as pin 13 (either 3.3 v ). 5 gnd power connect to ground. 6 - 7 clkb1:b4 output clock b bank of four outputs. these are low skew divide by two of bank a. 8 s2 input select input 2. selects mode for outputs per table above. 9 s1 input select input 1. selects mode for outputs per table above. 10 - 11 clkb1:b4 output clock b bank of four outputs. these are low skew divide by two of bank a. 12 gnd power connect to ground. 13 vdd power power supply. connect pin to same voltage as pin 4 (either 3.3 v ). 14 - 15 clka1:a4 output clock a bank of four outputs. 16 fbin input feedback input. determines outputs per table above.
z ero d elay , l ow s kew b uffer mds 2308-2 c 3 revision 070705 integrated circuit systems 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com mk2308-2 external components the mk2308-2 requires a minimum number of external components for proper operation. decoupling capacitors of 0.1 f should be connected between vdd and gnd, as close to the part as possible. a 33 ? series terminating resistor should be used on each clock output to reduce reflections. absolute maximum ratings stresses above the ratings listed below can cause permanent damage to the mk2308-2. these ratings, which are standard values for ics commercially rated parts, are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods can affect product reliability. electrical parameters are guaranteed only over the recommended operating temperature range. recommended operation conditions dc electrical characteristics vdd=3.3 v 10% , temp 0 to +70 / -40 to +85 c item rating supply voltage, vdd 7 v all inputs and outputs -0.5 v to vdd+0.5 v ambient operating temperature 0 to +70 c storage temperature -65 to +150 c junction temperature 175 c soldering temperature 260 c parameter min. typ. max. units ambient operating temperature 0 +70 c power supply voltage (measured in respect to gnd) +3.0 +5.5 v parameter symbol conditions min. typ. max. units operating voltage vdd 3.0 3.3 3.6 v input high voltage v ih clkin pin only (vdd/2)+1 vdd/2 v input low voltage v il clkin pin only vdd/2 (vdd/2)-1 v input high voltage v ih 2v input low voltage v il 0.8 v output high voltage v oh i oh = -18 ma 2.4 v output low voltage v ol i ol = 18 ma 0.4 v output high voltage v oh i oh = -5 ma vdd-0.4 v
z ero d elay , l ow s kew b uffer mds 2308-2 c 4 revision 070705 integrated circuit systems 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com mk2308-2 ac electrical characteristics vdd = 3.3v 10% , temp 0 to +70 / -40 to +85 c thermal characteristics operating supply current 100 mhz, clkin idd no load s1=s2=1 44 ma short circuit current i os each output 65 ma input capacitance c in s1, s1, fbin 7 pf parameter symbol conditions min. typ. max. units input frequency fbin to clka1 s1=s2=1 20 133. 3 mhz output frequency fbin to clka1 s1=s2=1 20 133. 3 mhz output rise time t or 0.8 to 2.0 v, c l =30 pf 1.5 ns output fall time t of 0.8 to 2.0 v, c l =30 pf 1.5 ns output clock duty cycle at 1.4v 40 50 60 % device to device skew, equally loaded rising edges at vdd/2 700 ps output to output skew, equally loaded rising edges at vdd/2 200 ps maximum absolute jitter 300 ps cycle to cycle jitter 30 pf loads 66.67 mhz outputs 400 ps 15 pf loads 66.67 mhz outputs 400 ps skew from output bank a to output bank b all outputs equally loaded 400 ps delay clkin rising edge to fbin rising edge measured at vdd/2 250 ps pll lock time t lock stable power supply, valid clocks on clkin, fbin 1ms parameter symbol conditions min. typ. max. units parameter symbol conditions min. typ. max. units thermal resistance junction to ambient ja still air 120 c/w ja 1 m/s air flow 115 c/w ja 3 m/s air flow 105 c/w thermal resistance junction to case jc 58 c/w
z ero d elay , l ow s kew b uffer mds 2308-2 c 5 revision 070705 integrated circuit systems 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com mk2308-2 package outline and package dimensions (16-pin soic, 150 mil. narrow body) package dimensions are kept current with jedec publication no. 95 ordering information parts that are ordered with a "lf" suffix to the part nu mber are the pb-free configur ation and are rohs compliant. while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems (ics) assumes no responsibility for either its use or for the infringemen t of any patents or other rights of third parties, which wou ld result from its use. no other circuits, patents, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring ex tended temperature range, high re liability, or other extraordina ry environmental requirements are not recomm ended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices o r critical medical instruments. part / order number marking shipping packaging package temperature mk2308s-2 mk2308s-2 tubes 16-pin soic 0 to 70 c mk2308s-2t mk2308s-2 tape and reel 16-pin soic 0 to 70 c mk2308s-2lf mk2308s-2lf tubes 16-pin soic 0 to 70 c mk2308s-2lft mk2308s-2lf tape and reel 16-pin soic 0 to 70 c mk2308s-2i mk2308s-2i tubes 16-pin soic -40 to +85 c MK2308S-2IT mk2308s-2i tape and reel 16-pin soic -40 to +85 c mk2308s-2ilf 2308s-2ilf tubes 16-pin soic -40 to +85 c mk2308s-2ilft 2308s-2ilf tape and reel 16-pin soic -40 to +85 c index area 1 2 16 d e seating plane a1 a e - c - b .10 (.004) c c l h h x 45 *for reference only. controlling dimensions in mm. millimeters inches* symbol min max min max a 1.35 1.75 .0532 .0688 a1 0.10 0.25 .0040 .0098 b 0.330.51.013.020 c 0.19 0.25 .0075 .0098 d 9.80 10.00 .3859 .3937 e 3.80 4.00 .1497 .1574 e 1.27 basic 0.050 basic h 5.80 6.20 .2284 .2440 h 0.250.50.010.020 l 0.401.27.016.050 0 8 0 8
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