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contents features ..............................................................1 pin assignment....................................................1 pin functions.......................................................1 block diagram .....................................................2 instruction set......................................................2 absolute maximum ratings .................................2 recommended operating conditions ..................3 pin capacitance...................................................3 endurance ...........................................................3 dc electrical characteristics ...............................4 ac electrical characteristics................................5 operation.............................................................6 receiving a start-bit ............................................9 three-wire interface (di-do direct connection) .... 9 dimensions (unit:mm) .........................................10 ordering information............................................11 characteristic s .................................................... . 12 f re que nt ly as ke d qu es ti on s . . . . .. .. . . .. .. . .. .. ............ . 1 5
1 the s-29zx30a series are low power 4k/8k-bit e 2 prom with a low operating voltage range. they are organized as 256-word 16-bit and 512-word 16bit, respectively. each is capable of sequential read, at which time addresses are automatically incremented in 16- bit blocks. the instruction code is compatible with the nm93csxx series. pin assignment pin functions table 1 name pin number function sop2 ssop cs 1 1 chip select input sk 2 2 serial clock input di 3 3 serial data input do 4 4 serial data output gnd 5 5 ground test 66 test pin (normally kept open) (can be connected to gnd or vcc) nc 7 7 no connection v cc 8 8 power supply features low power consumption standby : 2.0 m a max. (vcc=3.6 v) operating : 0.6 ma max. (vcc=3.6 v) : 0.4 ma max. (vcc=2.7 v) wide operating voltage range write : 0.9 to 3.6 v read : 0.9 to 3.6 v se q uential read capable endurance : 10 5 cycles/word data retention : 10 years S-29Z330A : 4k bits nm93cs66 instruction code compatible s-29z430a : 8k bits nm93csxx series compatible figure 1 8-pin sop2 t o p vi e w cs sk v cc test gnd di do 6 5 8 7 3 4 1 2 nc S-29Z330Adfja s-29z430adfja 8-pin ssop top view 1 2 3 4 8 7 6 5 cs sk di do v cc nc test gnd S-29Z330Afs * see dimensions cmos serial e 2 prom s-29zx30a
cmos serial e 2 prom s-29zx30a 2 block diagram instruction set table 2 instruction start bit opo code address data S-29Z330A s-29z430a read (read data) 1 10 a 7 to a 0 xa 8 to a 0 d 15 to d 0 output* write (write data) 1 01 a 7 to a 0 xa 8 to a 0 d 15 to d 0 input erase (erase data) 1 11 a 7 to a 0 xa 8 to a 0 ? ewen (program enable) 1 00 11xxxxxx 11xxxxxxxx ? ewds (program disable) 1 00 00xxxxxx 00xxxxxxxx ? x : doesnt matter. * : addresses are continuously incremented. absolute maximum ratings parameter symbol ratings unit power supply voltage v cc -0.3 to +7.0 v input voltage v in -0.3 to v cc +0.3 v output voltage v out -0.3 to v cc v storage temperature under bias t bias -50 to +95 c storage temperature t stg -65 to +150 c fi g ure 2 memory array data register address decoder mode decode logic clock generator output buffer v cc gnd do di cs sk table 3
cmos serial e 2 prom s-29zx30a 3 recommended operating conditions table 4 parameter symbol conditions min. typ. max. unit power supply voltage v cc read/write/erase ewen/ewds 0.9 -- 3.6 v vcc= 1.8 to 3.6 v 0.8 vcc -- vcc v v cc = 0.9 to 1.8 v 0.9 vcc -- vcc v vcc= 1.8 to 3.6 v 0.0 -- 0.2 vcc v v cc = 0.9 to 1.8 v 0.0 -- 0.1 vcc v operating temperature t op - 40 -- + 85 c pin capacitance table 5 (ta=25 c, f=1.0 mhz, v cc =5 v) parameter symbol conditions min. typ. max. unit input capacitance c in v in =0 v ?? 8pf output capacitance c out v out =0 v ?? 10 pf endurance table 6 parameter symbol min. typ. max. unit endurance n w 10 5 ?? cycles/word high level input voltage low level input voltage v ih v il
cmos serial e 2 prom s-29zx30a 4 dc electrical characteristics parameter smbl conditions v cc =2.7 v to 3.6 vv cc =1.8 v to 2.7 v vcc=0.9 to 1.8 v unit min. typ. max. min. typ. max. min. typ. max. current consumption (read) i cc1 do unloaded ?? 0.6 ?? 0.4 ?? 0.2 ma current consumption (program) i cc2 do unloaded ?? 5.0 ?? 5.0 ?? 5.0 ma parameter smbl conditions v cc =2.7 v to 3.6 v v cc =1.8 to 2.7 v v cc =0.9 to 1.8 v unit min. typ. max. min. typ. max. min. typ. max. i sb cs=gnd do=open connected to v cc or gnd topr=-10 ~ +70 c ?? 1.0 ?? 1.0 ?? 1.0 m a cs=gnd do=open connected to v cc or gnd topr=-40 ~ +85 c ?? 2.0 ?? 2.0 ?? 2.0 m a input leakage current i li v in =gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 m a output leakage current i lo v out =gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 m a i ol = 100 m a ?? 0.1 ?? 0.1 ??? v v ol i ol = 30 m a ?? 0.1 ?? 0.1 ??? v i ol = 10 m a ?? 0.1 ?? 0.1 ?? 0.2 v i oh = -100 m av cc -0.7 ?? ? ? ? ? ? ? v v oh i oh = -10 m av cc - 0.7 ?? v cc - 0.3 ?? ? ?? v i oh = -5 m av cc - 0.7 ?? v cc - 0.3 ?? v cc - 0.2 ?? v write enable latch data hold voltage v dh only when write disable mode 0.8 ?? 0.8 ?? 0.8 ?? v table 7 table 8 standby current consumption low level output voltage high level output voltage
cmos serial e 2 prom s-29zx30a 5 ac electrical characteristics table 9 input pulse voltage 0.1 v cc to 0.9 v cc output reference voltage 0.5 v cc output load 100pf table 10 parameter symble conditions v cc =2.7 to 3.6v v cc =1.8 to 2.7 v v cc =0.9 to 1.8v unit min. typ. max. min. typ. max. min. typ. max. cs setup time t css 0.4 ?? 1.0 ?? 10 ?? m s cs hold time t csh 0.4 ?? 1.0 ?? 10 ?? m s cs deselect time t cds 0.2 ?? 0.4 ?? 4 ?? m s data setup time t ds 0.4 ?? 0.8 ?? 8 ?? m s data hold time t dh 0.4 ?? 0.8 ?? 8 ?? m s topr=-10 to +70 c ?? 1.0 ?? 2.0 ?? 50 m s topr=-40 to +85 c ?? 1.0 ?? 2.0 ?? 100 m s topr=-10 to +70 c0 ? 500 0 ? 250 ?? 10 khz topr=-40 to +85 c0 ? 500 0 ? 250 ?? 5 khz topr=-10 to +70 c 1.0 ?? 2.0 ?? 50 ?? m s topr=-40 to +85 c 1.0 ?? 2.0 ?? 100 ?? m s output disable time t hz1 , t hz2 0 ? 0.5 0 ? 1.0 0 ? 50 m s output enable time t sv 0 ? 0.5 0 ? 1.0 0 ? 50 m s programming time t pr ? 4.0 10.0 ? 4.0 10.0 ?? 10.0 ms figure 3 read timing t skh t cds t css cs valid data valid data di t skl sk t sv t hz2 t csh t hz1 t pd t pd t ds t dh t ds t dh hi-z hi-z hi-z do do (read) (verify) hi-z output delay clock pulse width clock frequency t pd f sk t skh, t skl
cmos serial e 2 prom s-29zx30a 6 operation instructions (in the order of start-bit, instruction, address, and data) are latched to di in synchronization with the rising edge of sk after cs goes high. a start-bit can only be recognized when the high of di is latched to the rising edge of sk when cs goes from low to high, it is impossible for it to be recognized as long as di is low, even if there are sk pulses after cs goes high. any sk pulses input while di is low are called "dummy clocks." dummy clocks can be used to adjust the number of clock cycles needed by the serial ic to match those sent out by the cpu. instruction input finishes when cs goes low, where it must be between commands during t cds . all input, including di and sk signals, is ignored while cs is low, which is stand-by mode. 1. read the read instruction reads data from a specified address. after a0 is latched at the rising edge of sk, do output changes from a high-impedance state (hi-z) to low level output. data is continuously output in synchronization with the rise of sk. when all of the data (d15 to d0) in the specified address has been read, the data in the next address can be read with the input of another sk clock. thus, it is possible for all of the data addresses to be read through the continuous input of sk clocks as long as cs is high. the last address (an a1 a0 = 1 11) rolls over to the top address (an a1 a0 = 0 00). figure 5 read timing (s-29z430a) figure 4 read timing (S-29Z330A) a 0 a 6 12 45 29 14 d 15 d 15 d 14 d 14 d 13 d 14 hi - z a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 13 d 0 d 1 d 2 d 15 0 hi-z a 1 a 2 a 3 a 4 a 5 a 7 0 1 1 28 27 26 25 24 11 10 9 8 7 6 5 4 3 2 1 44 43 42 41 40 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 13 d 0 d 1 d 2 13 cs sk di do 32 a 2 a 8 49 d 15 d 15 d 14 d 14 d 13 d 14 hi - z a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 13 d 0 d 1 d 2 d 15 0 hi-z a 3 a 4 a 5 a 6 a 7 x 0 1 1 10 9 8 7 6 5 4 3 2 1 48 46 45 44 43 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 13 d 0 d 1 d 2 cs sk di do a 0 a 1 12 11 14 16 13 15 17 31 30 29 28 27
cmos serial e 2 prom s-29zx30a 7 2.1 write this instruction writes 16-bit data to a specified address. after changing cs to high, input a start-bit, op-code (write), address, and 16-bit data. if there is a data overflow of more than 16 bits, only the last 16-bits of the data is considered valid. changing cs to low will start the write operation. it is not necessary to make the data "1" before initiating the write operation. figure 6 write timing (S-29Z330A) t cds t pr busy hi-z t sv verify standby hi-z 1 cs sk di do t hz1 2 3 4 5 6 7 8 9 10 11 12 27 0 1 d0 ready a7 a6 a5 a4 a3 a2 a1 a0 d15 figure 7 write timing (s-29z430a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 345678910 14 29 0 1 d0 ready a3 a2 a1 a0 d15 2. write (write, erase) there are two write instructions, write and erase. each automatically begins writing to the non-volatile memor y when cs goes low at the completion of the specified clock input. the write operation is completed in 10 ms (t pr max.), and the typical write period is less than 4 ms. in the s- 29zx30a series, it is easy to verify the completion of the write operation in order to minimize the write cycle by setting cs to high and checking the do pin, which is low during the write operation and high after its completion. this verify procedure can be executed over and over again. there are two methods to detect a change in the do output. one is to detect a change from low to high setting cs to high, and the other is to detect a change from low to high as a result of repetitious operations of returning the cs to low after setting cs to high and checking the do output. because all sk and di inputs are ignored during the write operation, any input of instruction will also be disregarded. when do outputs high after completion of the write operation or if it is in the high-impedence state (hi-z), the input of instructions is available. even if the do pin remains high, it will enter the high-impedence state upon the recognition of a high of di (start-bit) attached to the rising edge of an sk pulse. (see figure 3). di input should be low during the verify procedure. 11 12 13 a8 a7 a6 a5 a4 x standby
cmos serial e 2 prom s-29zx30a 8 2.2 erase this command erases 16-bit data in a specified address. after changing cs to high, input a start-bit, op-code (erase), and address. it is not necessary to input data. changing cs to low will start the erase operation, which changes every bit of the 16 bit data to "1." 3. write enable (ewen) and write disable (ewds) the ewen instruction puts the s-29zx30a series into write enable mode, which accepts write and erase instructions. the ewds instruction puts the s-29zx30a series into write disable mode, which refuses write and erase instructions. the s-29zx30a series powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or cpu malfunctions. it should be kept in write disable mode except when performing write operations. figure 8 erase timing (S-29Z330A) t cds t pr busy hi-z t sv verify standby hi-z 1 cs sk di do t hz1 234 567 8 9 10 11 1a0 ready 1 a7 a6 a5 a4 a3 a2 a1 figure 9 erase timing (s-29z430a) t cds t pr busy hi-z t sv hi-z 1 cs sk di do t hz1 2 345678 1a0 ready 1 x a8a7a6a5a4 9 10 11 a3 a2 12 13 a1 verify standby
cmos serial e 2 prom s-29zx30a 9 receiving a start-bit a start bit can be recognized by latching the high level of di at the rising edge of sk after changing cs to high (start-bit recognition). the write operation begins by inputting the write instruction and setting cs to low. the do pin then outputs low during the write operation and high at its completion by setting cs to high (verify operation). therefore, only after a write operation, in order to accept the next command by having cs go high, will the do pin switch from a state of high- impedence to a state of data output; but if it recognizes a start-bit, the do pin returns to a state of high-impedence (see figure 3). three-wire interface (di-do direct connection) although the normal configuration of a serial interface is a 4-wire interface to cs, sk, di, and do, a 3-wire interface is also a possibility by connecting di and do. however, since there is a possibility that the do output from the serial memory ic will interfere with the data output from the cpu with a 3-wire interface, install a resistor between di and do in order to give preference to data output from the cpu to di(see figure 12). 8 7 6 5 4 3 2 111 910 figure 11 ewen/ewds timing (s-29z430a) 8xs 11=ewen 00=ewds sk di cs figure 10 ewen/ewds timing (S-29Z330A) 6xs 11=ewen 00=ewds 0 sk di cs 13 12 standby di sio figure 12 do cpu s-29zx30a r : 10 to 100 k w 8 7 6 5 4 3 2 1 0 11 9 standby 10 0 0
cmos serial e 2 prom s-29zx30a 10 dimensions (unit : mm) 2. 8-pin sop (s-29zx30adfja) markings (s-29zx30adfja) figure 13 1.27 0.10 min. 0.40 0.05 1.50 0.05 1.75max. 3.90 4 5 8 1 4.90 (4.95 max.) 6.00 0.20 0.20 0.05 0.60 0.20 figure 14 1 2 3 4 5 7 8 9 10 11 12 13 1 to 6 : product name S-29Z330A sz330d s-29z430a sz430d 7 : d 8 : year of assembly (last digit of the year) 9 : month of assembly (1 to 9, x, y,and z) 10 to 13 : lot no. (last four digits of the lot no.) 6
cmos serial e 2 prom s-29zx30a 11 3. 8-pin ssop (S-29Z330Afs) markings (S-29Z330Afs) ordering information 4.4 3.12 (3.42 max.) 6.4 0.3 figure 15 0.65 0.22 0.10 1.15 0.05 1.30max. 0.05 0.05 0.15 +0.10 -0.05 0.5 0.2 figure 16 4 6 7 8 1 : year of assembly (last digit of the year) 2 to 3 : lot no. (abbreviation) 4 to 8 : product name sz330 5 3 2 1 s-29zx30a xxx package dfja : sop2 fs : ssop (S-29Z330A) product S-29Z330A : 4kbit s-29z430a : 8kbit
cmos serial e 2 prom s-29zx30a 12 characteristics 1. dc characteristics 1.3 current consumption (read) i cc1 -- power supply voltage v cc 1.1 current consumption (read) i cc1 -- ambient temperature ta ta (c) 0.4 0.2 v cc =3.6 v fsk=500 khz data=0101 0 -40 085 icc1 (ma) 1.2 current consumption (read) i cc1 -- ambient temperature ta ta (c) -40 0 85 0.4 0.2 0 icc1 (ma) 1.4 current consumption (read) i cc1 -- power supply voltage v cc 1.5 current consumption (read) i cc1 -- power supply voltage v cc 0.4 0.2 0 icc1 (ma) 1.6 current consumption (write) i cc2 -- ambient temperature ta 1.7 current consumption (write) i cc2 -- power supply voltage v cc 1.8 standby current consumption i sb -- ambient temperature ta 4 5 3 1 2 6 v cc (v) 0.4 0.2 0 icc1 (ma) 4 5 3 12 6 v cc (v) 0.4 0.2 0 icc1 (ma) ta=25 c fscl=100 khz data=0101 4 5 3 12 6 v cc (v) 10 - 6 10 -7 10 - 8 10 - 9 10 -10 10 - 11 isb (a) ta=25 c fscl=10 khz data=0101 ta (c) -40 0 85 ta=25 c fscl=500 khz data=0101 4 5 3 12 6 v cc (v) vcc=3.6 v ta=25 c v cc =1.8 v fsk=10 khz data=0101 ta (c) -40 0 85 2.0 1.0 0 icc2 (ma) vcc=3.6 v 2.0 1.0 0 icc2 (ma)
cmos serial e 2 prom s-29zx30a 13 1.9 input leakage current i li -- ambient temperature ta 1.10 input leakage current i li -- ambient temperature ta 1.11 output leakage current i lo -- ambient temperature ta 1.12 output leakage current i lo -- ambient temperature ta 1.13 high level output voltage v oh -- ambient temperature ta 1.14 high level output voltage v oh -- ambient temperature ta ta (c) -40 0 85 1.15 low level output voltage v ol -- ambient temperature ta ta (c) -40 0 85 1.0 0.5 0 ili ( m a) 1.16 low level output voltage v ol -- ambient temperature ta vcc=3.6 v cs,sk,di=3.6 v ta (c) -40 0 85 1.0 0.5 0 ilo ( m a) ta (c) -40 0 85 1.0 0.5 0 ili ( m a) vcc=3.6 v do=0 v vcc=3.6 v do=3.6 v ta ( c ) -40 0 85 vcc=3.6 v cs,sk,di=0 v ta (c) -40 0 85 1.0 0.5 0 ili ( m a) 2.8 2.7 2.6 voh (v) vcc=2.7 v ioh=100 ua 1.0 0.9 0.8 voh (v) vcc=0.9 v ioh=5 ua vcc=1.8 v iol=100 ua 0.03 0.02 0.01 vol (v) ta (c) -40 0 85 vcc=0.9 v iol=10 ua 0.03 0.02 0.01 vol (v) ta (c) -40 0 85
cmos serial e 2 prom s-29zx30a 14 2. ac characteristics 2.2 program time t pr -- power supply voltage v cc 2.1 maximum operating frequency f max -- power supply voltage v cc 2.4 program time t pr -- ambient temperature ta 2.3 program time t pr -- ambient temperature ta 10k ta=25 c fmax (hz) 234 5 v cc (v) 1 100k 1m ta (c) 6 4 v cc =3.6 v -40 0 85 2 twr (ms) ta (c) v cc =0.9 v -40 0 85 6 4 2 twr (ms) 2.6 data output delay time t pd -- ambient temperature ta 2.5 data output delay time t pd -- ambient temperature ta ta (c) -40 0 85 0.6 0.4 0.2 tpd ( m s) ta (c) 0.6 0.4 v cc =1.8 v -40 0 85 0.2 tpd ( m s) 2.7 data output delay time t pd -- ambient temperature ta ta (c) 30 20 v cc =0.9 v -4 0 085 10 tpd ( m s) 234 5 v cc (v) 1 6 4 2 twr (ms) ta=25 c v cc =2.7 v
1 5 collection of product faqs author: ebisawa takashi date: 99/01/13 (wednesday) 18:19 (modified: 99/01/14) a: public (printing o.k.) index: c: quality, reliability division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: what about the reliability and quality of the eeprom? answer: 1. the eeprom must have a quality that is special in a sense and that differs from that of the other ics. (1) number of possible rewrites: 105 or 106 a specified minimum number of data rewrites must be assured. (2) data retention: 10 years it must be ensured that written data (1 and 0) will be stored for at least 10 years. ensuring (1) and (2) is very difficult in a technical sense, as well as in the sense that high quality must be maintained despite the need for mass production. 2. why this guarantee is technically difficult as shown in the figure below, the eeprom functions as a non-volatile memory by holding charges in fg.
1 6 n + n + drain electrode select gate electrode control gate electrodesource electrode cg fg thin oxide film uto gnd sg n + p substrate [data rewrite] data rewrite refers to the injection or removal of electrons into or from the fg. in this process, electrons pass through a thin oxide film (uto). the oxide film inherently acts as an insulator, but in this case the film conducts electricity (electrons are transferred). [data retention] data retention refers to the prevention of leakage of electrons stored in the fg. this must be assured for at least 10 years. to meet the above stated contradictory properties, high-quality thin oxide films (uto) must be manufactured. such utos are very thin (on the order of 10 nm), and stably manufacturing them requires a very difficult technique. faq no.: 12022
1 7 collection of product faqs author: ebisawa takashi date: 99/01/13 (wednesday) 18:57 (modified: 99/01/13) x: working index: a: general division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what about the distribution of application notes, usage notes, and malfunctions? answer: distribution of application notes all eeproms, including ours, may malfunction (false-writes may occur) due to an operation in a low- voltage region upon power-on/off or improper recognition of a command due to a noise signal. this defect is particularly common in the voltage region of the microcomputer transmitting commands to the eeprom, where the voltage is lower than the lowest operating voltage of the microcomputer. to prevent this defect, usage notes have been prepared for the eeprom. - s-93c series, s29 series - s-24cxxa series - s-24cxxb series faq no.: 12022
18 collection of product faqs author: ebisawa takashi date: 99/01/13 (wednesday) 17:43 (modified: 99/01/13) a: public (printing o.k.) index: a: general division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what are some applications of the serial eeprom? answer: 1. applications of the eeprom the applications of the eeprom can be roughly divided into the following types: - tuning memory, mode setting, id codes: arbitrary data can easily be rewritten and data can be retained during power-off. - replacement of a dip switch (from a mechanical to an electronic switch): user costs are substantially reduced. - adjustment data for ic elements and other electronics: the accuracy of final products is increased. adjustments, which had been performed manually, can be automated. 2. specific examples of applications based on the above applications, general examples are shown below. basically, the eeprom (a non-volatile memory) is useful for electronic applications. [television] tv channel memory, screen setting data, data backup during power-off s-24c series [video] vtr channel memory, program reservation data, image-quality adjustment data, data backup during power-off s-93cx6a, s-29xx0a, s-24c series [white goods] maintenance data, adjustment data s-93cx6a, s-29xx0a, s-24c series [vehicle-mounted] troubleshooting data, maintenance data, adjustment data: air bags, abs, distance meters s-93cx6a, s-29xx0a, s-24c series [printers] printer maintenance data s-93cx6a, s-29xx0a, s-24c series
19 [modems] replacement of dip switches, software (firmware) data s-93cx6a, s-29xx0a, s-24c series [mobile telephones] personal id, telephone-number data, address data, adjustment data s-24c series [pagers] personal id, telephone-number data, address data s-93cx6a, s-29z series, s-24c series [pc cards] lan cards and modem cards, replacement of dip switches, software data s-93c46a, s-29, s-24c series faq no.: 12021
2 0 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what about the basic terms (verify, ready/busy function)? answer: verify, ready/busy (r/b) function this is a function to find out about an actual write operation (time). there are two methods, a monitoring method based on the output condition of the do pin and a method for monitoring the output condition of the ready/busy pin. this function eliminates the need to wait 10 ms for writing to be completed, thereby minimizing the write time according to the performance of the ic (performance value: 4 ms to 5 ms; 1 ms is ensured for the s-24c series). standby verify t cds t pr busy hi-z t sv t hz1 25 d0 ready hi-z 1 cs sk di do 23 4 56 7 8 9 10 1 01 a5 a4 a3 a2 a1 a0 d15 (note) note that this differs from a normal verify function, which checks written data for errors. faq no.: 12018
2 1 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what about the basic term (page write)? answer: page write s-24c series writing to memory is normally executed in addresses. with the page write function, however, writing can be executed in pages (multiple addresses). this function can improve the efficiency of write commands and reduce writing time. ex.:s-24c04b (4 k = 512 addresses x 8 bits) 16-byte page write function writing in addresses: a write time of 10 msec. x 512 = 5.1 sec. is required. page write: 10 msec. x 512 / 16 = 320 msec. however, compatibility with products from other companies must be confirmed. faq no.: 12017
2 2 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what about the basic terms (test pin, org pin) answer: test pin this is an input pin used to enter a test mode when tests are conducted during an sii inspection process. this information is not provided to users. it can be used with a gnd or vcc connection, or in an open state (see note). this is important in maintaining compatib ility with the pin layouts of other companies. some users fear that the test mode may be inadvertently entered during operation, but such fears are unnecessary, as a potential of at least 10 v must be constantly supplied to enter the test mode. (note) since the test pin has a c-mos input structure, the gnd or vcc connection is most suited for this pin. org (organization) pin input pin used to specify a memory configuration. a normal memory has a 16 bit/1 address data configuration and includes no org pin. competing manufacturers, however, have released products that enable data to be switched between x16 and x8 using h or l of the org pin. since this function is provided for the 93c series of the ns code, there is a compatib ility problem. sii has not yet released products featuring this function. faq no.: 12014
2 3 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: b: technical division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: malfunction (false-write, illegal data) answer: [malfunction of the eeprom] (key words: false-store(illegal data) the eeprom may malfunction (false-store) due to power-on/off or noise from the microcomputer. the defect rate, however, is on the order of ppm. even though, this could be a serious problem for the users and to the applications. - this problem essentially results from users design techniques, but the manufacturer should make efforts to prevent this defect. as the unit price continuously decreases, this is particularly important in discriminating us from our competitors. - improving the business techniques of the manufacturer malfunction basically results from a users inappropriate operation, so the user is the responsible party. we, however, must bear responsibility for defects in the ic. thus, the best action to take depends on whether the user or sii is responsible for the defect. in practice, however, it is difficult to determine from a users claim or inquiry, or through an agent, who is responsible for a defect. in such a case, inform the business techniques section of the situation as soon as possible. in addition, see faq on other malfunctions for technical information. faq no.: 12012
2 4 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: b: technical division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: power-on clear in s-93cxxa, s-29xxxa, notes for power-on (malfunction) answer: 1. this ic series has a built-in power-on clear circuit. this circuit instantly initializes the eeprom when the power voltage is activated. since malfunction may occur if initialization has not been completed normally, the conditions specified below are required to activate the power voltage in order to operate the power-on clear circuit normally. 2. notes on power-on method for activating the power voltage as shown in fig. 1, activate the power voltage starting from a maximum of 0.2 v so that the power voltage reaches the operating value within the time specified as trise. if the operating power voltage is, for example, 5.0 v, trise = 200 ms, as shown in fig. 2. thus, the power voltage must be activated within 200 ms.
2 5 0.2v 0v ( note1 ) trise ( max ) power volta g e vcc vinit ( max ) tinit ( max ) ( note2 ) fig. 1 activation of the power voltage power voltage vcc (v) 5.0 (msec) power-voltage activation time t rise (max) 20050 150100 4.0 3.0 2.0 fig. 2 maximum power-voltage activation time initialize time tinit the eeprom is instantly initialized when the power voltage is activated. since the eeprom does not accept commands during initialization, the transmission of commands to the eeprom must be started after this initialization time period. fig. 3 shows the time required to initialize the eeprom. *1 at 0 v, there is no potential difference between the vcc and gnd terminals of the eeprom. *2 t.nit is the time required for eeprom to initialize internally. during this time period, the eeprom will not accept commands. example) if the operating power voltage is 5 v, ensure that the power voltage reaches 5 v within 20.0 ms.
2 6 power-voltage activation time eeprom initialization time t int (seconds) 1m 1 m 100 m 10 m 10m 100m 1 m 10 m 100 m 1m 10m 100m t rise (seconds) fig. 3 eeprom initialization time when the power-on clear circuit has finished initialization normally, the eeprom enters a program- disabled state. if the power-on clear circuit does not operate, the following situation is likely: - in some cases, a previously entered command has been enabled. if, for example, a program- enabled command has been enabled and the input terminal mistakenly recognizes a write command due to extraneous noise while the next command is being entered, writing may be executed. the following may prevent the power-on clear circuit from operating: - if the power lines of the microcomputer and eeprom are separated from each other, and the output terminals of the microcomputer and eeprom are wired or connected to each other, there may be a potential difference between the power lines of the eeprom and microcomputer. if the voltage of the microcomputer is higher, a current may flow from the output terminal of the microcomputer to the power line of the eeprom via a parasitic diode in the do pin of the eeprom. therefore, the power voltage of the eeprom has an intermediate potential to prevent power-on from being cleared. - during an access to the eeprom, the voltage may decrease due to power-off. even if the microcomputer has been reset due to a decrease in voltage, the eeprom may malfunction if eeprom power-on clear operation conditions are not met. for the eeprom power-on clear operation conditions, see method for activating the power voltage. faq no.: 12011
2 7 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) b: for distri & rep (printing n.g.) index: b: technical division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: false-writes in s-93c, s-29 series: inadvertent activation of cs (malfunction) answer: inadvertent writing in the s-29 series in the s-29 series, when a cs input is inadvertently activated during a write command, undefined data may be written. relevant timings are shown below. a command is composed of the following: start bit + two command bits + address + (data). the figure below shows the timings in which commands are set (in the figure, the portion denotes the rising edge of sk.) in the case of a write command, after a final address has been input and while 16-bit data is being input, undefined data is written when the cs input is changed from h to l. activation of sk obtaining a verify t cds t pr busy hi-z t sv t hz1 25 d0 ready hi-z 1 [write] cs sk di do 23 4 56 7 8 9 10 1 01 a5 a4 a3 a2 a1 a0 d15 case in which, during a command entry, cs is changed from h to l with a timing that differs by a predetermined minimum number of clocks.
2 8 in the case of a write command, if the number of clocks is smaller than the predetermined value, data is loaded so as to be changed from d15 to d0. when, for example, cs is shifted from h to l after three clocks, data, which would otherwise have been stored in d15 to d13, is stored in d2 to d0, while undefined data is stored on the upper side a storage state in which the internal logic has been changed to either h or l). in addition, if the number of clocks is greater than the predetermined value, the last 16 pieces of data are stored correctly. faq no.: 12008
29 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: a: general division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: eeprom compatibility table, cross reference answer: eeprom compatibility table product name key word national semiconductor atmel st micro electronic s-29130adpa ee,1kb,dip,3w nm93c(s)46zen at93c46-10pi-2.5 st93c46(7)ab6 s-93c46adp -- - - s-29130afja-tb ee,1kb,sop1,3w nm93c(s)46zem8 at93c46r-10si-2.5 st93c46(7)tm6013tr s-93c46afj-tb --- s-29130adfja-tb ee,1kb,sop2,3w at93c46w-10si-2.5 st93c46(7)am6013tr s-93c46adfj-tb --- s-29131adpa ee,1kb,dip,3w,prot nm93c46zen at93c46-10pi-2.5 st93c46(7)b6 s-29131afja-tb ee,1kb,sop1,3w,prot nm93c46zem8 at93c46r-10si-2.5 st93c46(7)tm6013tr s-29220adpa ee,2kb,dip,3w nm93c(s)56zen at93c56-10pi-2.5 st93c56(7)ab6 s-29220afja-tb ee,2kb,sop1,3w nm93c(s)56zem8 at93c56r-10si-2.5 st93c56(7)tm6013tr s-29220adfja-tb ee,2kb,sop2,3w at93c56w-10si-2.5 st93c56(7)am6013tr s-29221adpa ee,2kb,dip,3w,prot nm93c56zen at93c56-10pi-2.5 st93c56(7)b6 s-29221afja-tb ee,2kb,sop1,3w,prot nm93c56zem8 at93c56r-10si-2.5 st93c56(7)tm6013tr s-29330adpa ee,4kb,dip,3w nm93c(s)66zen at93c66-10pi-2.5 st93c66(7)ab6 s-29330afja-tb ee,4kb,sop1,3w nm93c(s)66zem8 at93c66r-10si-2.5 st93c66(7)tm6013tr s-29330adfja-tb ee,4kb,sop2,3w at93c66w-10si-2.5 st93c66(7)am6013tr s-29331adpa ee,4kb,dip,3w,prot nm93c66zen at93c66-10pi-2.5 st93c66(7)b6 s-29331afja-tb ee,4kb,sop1,3w,prot nm93c66zem8 at93c66r-10si-2.5 st93c66(7)tm6013tr s-29430adp ee,8kb,dip,3w s-29430afe-tf ee,8kb,sop1,3w s-24c01adpa-01 ee,1kb,dip,2w at24c01a-10pi-2.5 st24(25)c(w)01b6 s-24c01afja-tb-01 ee,1kb,sop,2w at24c01a-10si-2.5 st24(25)c(w)01m6tr s-24c02adpa-01 ee,2kb,dip,2w nm24c02(03)len at24c02-10pi-2.5 st24(25)c(w)02b6 s-24c02afja-tb-01 ee,2kb,sop,2w nm24c02(03)lem8 at24c02n-10si-2.5 st24(25)c(w)02m6tr s-24c04adpa-01 ee,4kb,dip,2w nm24c04(05)len at24c04-10pi-2.5 st24(25)c(w)04b6
3 0 s-24c04afja-tb-01 ee,4kb,sop,2w nm24c04(05)lem8 at24c04n-10si-2.5 st24(25)c(w)04m6tr s-24c08adpa-01 ee,8kb,dip,2w nm24c08(09)len at24c08-10pi-2.5 st24(25)c(w)08b6 s-24c08afja-tb-01 ee,8kb,sop,2w nm24c08(09)lem8 at24c08n-10si-2.5 st24(25)c(w)08m6tr s-24c16adpa-01 ee,16kb,dip,2w nm24c16(17)len at24c16-10pi-2.5 st24(25)c(w)16b6 s-24c16afja-tb-01 ee,16kb,sop,2w nm24c16(17)lem8 at24c16n-10si-2.5 st24(25)c(w)16m6tr s-29l130afe-tb ee,1kb,sop1,3w,l/v nm93c(s)46xlzem8 at93c46r-10si-1.8 st93c46(7)tm6013tr s-29l130adfe-tb ee,1kb,sop2,3w,l/v at93c46w-10si-1.8 st93c46(7)am6013tr s-29l131adfe-tb ee,1kb,sop2,3w,l/v,prot nm93c(s)46xlzem8 at93c46w-10si-1.8 st93c46(7)am6013tr s-29l220afe-tb ee,2kb,sop1,3w,l/v nm93c(s)56xlzem8 at93c56r-10si-1.8 st93c56(7)tm6013tr s-29l220adfe-tb ee,2kb,sop2,3w,l/v at93c56w-10si-1.8 st93c56(7)am6013tr s-29l221adfe-tb ee,2kb,sop2,3w,l/v,prot nm93c(s)56xlzem8 at93c56w-10si-1.8 st93c56(7)am6013tr s-29l330afe-tb ee,4kb,sop1,3w,l/v nm93c(s)66xlzem8 at93c66r-10si-1.8 st93c66(7)tm6013tr s-29l330adfe-tb ee,4kb,sop2,3w,l/v at93c66w-10si-1.8 st93c66(7)am6013tr s-29l331adfe-tb ee,4kb,sop2,3w,l/v,prot nm93c(s)66xlzem8 at93c66w-10si-1.8 st93c66(7)am6013tr faq no.: 12007
3 1 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13) a: public (printing o.k.) index: d (technical terms) division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal. no.: overall related documents: question: what about the basic terms (memory protect, reset, cs)? answer: memory protect, reset ? s-29xx1a, s-29x94a, s-29x55a function for prohibiting a write command from being executed in a certain region of the memory space. this function is enabled by contro lling the protect or reset input pin (select/deselect protect). this reset prevents the microcomputer from running uncontrollably and also prevents false-writes caused by noise in order to protect data. ex.: storage of id codes and product shipment adjustment data (note) s-29xx1a and s-29x94a protect 50% of memory, starting with the leading address. cs, /cs (/cs: s-29x55a, s-29x94a) cs is an input pin used to select the execution of a command. it is selected using h and deselected using l (the reverse is true for /cs) ? /cs is useful on the interface of the microcomputer (l active is mainly used for the microcomputer). malfunction, however, is likely to be caused by noise upon power-on if a command is executed at the gnd level. a 0 a 6 1 7 50 34 19 d 1 d 1 d 1 d 1 d 1 d 1 hi - z a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 1 d 0 d 1 d 2 d 1 hi-z a 1 a 2 a 3 a 4 a 5 a 7 0 1 33 32 31 30 2 9 1 6 15 9 3 2 1 4 9 4 8 4 7 46 45 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 1 d 0 d 1 d 2 1 8 cs sk di do 8 7 6 5 4 1 2 14 11 10 13 xx x 00 **
3 2 faq no.: 12006
3 3 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13(wednesday)) a: public (printing o.k.) index: a: general division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: concept of the compatibility, features, and markets of the s-29 series answer: [compatibility of the eeprom] in terms of memory, most sii eeproms are compatible with our competitors standard products in their operation codes. if another companys product is to be replaced by a corresponding sii product, the dc/ac specifications desired by the user must be carefully determined. the key words for the products are given below. our competitors 93c-series products are compatible with siis s-29xx0a-series products, and our competitors 24c-series products are compatible with siis s-24c-series products. the key word for each company is given below. nm93c : national semiconductor at93c : atmel 93c : microchip m93c : st micro electronic (formerly sgs tomson st93c) cat93c : catalyst ak93c : asahi kasei br93c : rohm faq no.: 12005
3 4 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13(wednesday)) a: public (printing o.k.) index: a: general division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: how are operation codes classified? a: [eeprom operation codes] in the serial eeprom, the operation codes can be classified into several types. our competitors have released products compatible with each type of operation code. the key words of the operation codes are given below. 2-wire iicbus 3-wire microwire 4-wire type ns (national semiconductor) code gi (general instruments) code mitsubishi code sii original code serial eeprom spi 1. serial and parallel data reading and writing are divided into serial and parallel types.
3 5 ex.: parallel 1 0 0 d 0 d 1 d 2 d 3 a 0 a 1 a 2 a 3 0 0 1 0 1 d:1100 a:0101 :1100 d 0 a 1 ex.: serial 2. 3-wire type, microwire, 4-wire type composed of four pins, including three input pins cs, sk, and di, and an output pin do. since di and do can be directly coupled together, the eeprom can be virtually composed of three pins (the 4-wire type includes an additional ready/busy pin, but is still referred to as a 3-wire type). ns code: the key word is 93cx. compatible with sii s-29xxoa. general code used by many competing companies. mass produced and low in cost. gi code general instrument inc.s original code. its markets continue to dwindle. mitsubishi code: the key word is m6m8.compatible with sii s-29x55a. serial-port direct-coupling type in which commands and data are composed of x8 units. intended for the tv and vtr markets and primarily sold as a set with mitsubishi microcomputers. sii original code: s-29x9xa serial-port direct-coupling type in which commands and data are composed of x8 units. intended for technology-oriented users. 3. 2-wire type, iicbus: the key word is 24c. compatible with sii s-24cxxa. composed of two pins: an input pin (scl) and an i/o pin (sda). phillips inc. owns a relevant patent. [advantages] fewer wires are required, and the microcomputer port can be shared with another iicbus. tv set maker will be main market. 4. spi: the key word is 25c. not compatible with sii. under development. composed of four pins: three input pins cs, sck, and si, and an input pin so. in the case of the eeprom, the advantages are high speed (5 mhz at 5v) and a high capacity (128 kbytes). faq no.: 12004 addresses and data are processed in serial. [advantages] the size can be reduced due to the reduced number of i/o terminals, and fewer wires are required for the substrate. the package can be downsized and manufactured inexpensively. addresses and data are processed in parallel. [advantage] fast processing
3 6 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13(wednesday)) a: public (printing o.k.) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: what are the basic operation codes? answer: [terms required to understand eeprom data sheets (1)] basic commands - data read, read reads data from a specified address - data write, write or program writes data to a specified address - data erase, erase erases data at a specified address (all 1s) - chip write, wral writes the same (word) data in all address spaces - chip erase, eral erases data in all address spaces (all 1s) - program disable, ewds or pds prohibits write operations (write), and prevents false-writes caused by noise or uncontrollable running of the cpu - program enable, ewes or pen enables write operations (write) [note] when the power to the eeprom is turned on, the internal circuit of the ic is reset and the program disable mode is entered. thus, following power-on, the program enable command must be entered in order to write data.
3 7 memory space: in the case of the s-29130a (64 words x 16 bits) 64 words memory space in which a command can be used to write data freely data address faq no.: 12003
3 8 collection of product faqs author: kano tomoo date: 98/11/12 (thursday) 10:17 (modified: 99/01/13(wednesday)) a: public (printing o.k.) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: what about the basic terms. (continuous read, sequential read)? answer: - continuous read, sequential read ? s-93c series, s-29 series, s-24c series function by which data is read from a specified address using a read command, followed by the output of the next address. this is useful when there is a large amount of user data (ex.: id codes). d 15 d 15 d 14 d 14 d 13 d 14 hi-z d 13 d 0 d 1 d 2 d 15 0 hi-z a 0 a 1 a 2 a 3 a 4 a 5 0 1 1 28 27 26 25 24 23 12 11 10 9 8 7 6 5 4 3 2 1 44 43 42 41 40 39 d 13 d 0 d 1 d 2 cs sk di do continuos read - serial-port direct coupling, microcomputer interface , 8-bit command ? s-29x9xa, s-29x55a, s-2900a the serial port is a serial i/o port provided for a microcomputer. a device that can be easily and directly coupled to this port is referred to as a serial-port direct-coupling type or a microcomputer interface. 1. the eeprom is configured as follows for simple direct coupling: data is input at the rising edge of the sk input clock, and output at its falling edge. commands and data are input and output in 8 bits. 2. a microcomputer with a serial port communicates in 8 bits (8 clocks). this configuration can substantially reduce the number of programs required for the microcomputer. the advantages are easy programming and a reduced rom capacity.
3 9 faq no.: 12002
4 0 collection of product faqs creator: takashi ebisawa date: 98/01/13 (wednesday) 10:51 (modified: 99/01/13(wednesday)) a: public (printing o.k.) index: d: technical terms division name: 01 ic category 1: 12 memory category 2: 2. serial eeprom cal no.: overall related documents: question: what is the eeprom? answer: 1. electrically erasable programmable read only memory - why this memory is referred to as read only despite the fact that it enables data to be rewritten? the eeprom requires a longer time for writing than a ram, so it is used exclusively for reading. - what is the memory? elements storing data. data is generally represented by the digits 0 and 1. - what is the rom? read only memory reference: ram is random access read write memory. faq no.: 12001

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