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ta84006f/fg 2006-3-6 1 toshiba bipolar linear ic silicon monolithic ta84006f/fg three-phase wave motor driver ic the ta84006f/fg is a three-phase wave motor driver ic. used with a three-phase sensorless controller (tb6548f/fg or tb6537p/pg), the ta84006f/fg can provide pwm sensorless drive for three-phase brushless motors. features ? built-in voltage detector ? overcurrent detector incorporated ? overheating protector incorporated ? multichip (mch) structure uses pch-mos for the upper output power transistor ? rated at 25 v/1.0 a ? package: ssop30-p-375-1.00 note 1: this product has a multichip (mcp) structure utilizing pch-mos technology. the pch-mos structure is sensitive to electrostatic discharge and should therefore be handled with care. weight: 0.63 g (typ.) ta84006fg: the ta84006fg is pb-free product. the following conditions apply to solderability: *solderability 1. use of sn-37pb solder bath *solder bath temperature = 230oc *dipping time = 5 seconds *number of times = once *use of r-type flux 2. use of sn-3.0ag-0.5cu solder bath *solder bath temperature = 245oc *dipping time = 5 seconds *number of times = once *use of r-type flux
ta84006f/fg 2006-3-6 2 block diagram control circuit overheating protector in_up in_vp in_wp in_un in_vn in_wn v cc comp overcurrent detector isd pin voltage detector n vm v z out_u out_v out_w motor rf visd1 visd2 p_gnd s_gnd pch-mos fet 3
ta84006f/fg 2006-3-6 3 pin assignment 24 23 22 21 20 19 18 1 2 3 4 5 6 7 17 16 15 14 13 8 9 10 11 12 la0 la1 pwm cw_ccw nc fg_out nc sel_lap nc x t x tin gnd wave oc out_wn out_wp nc out_vn nc out_vp nc out_un out_up v dd 30 29 28 27 26 25 24 1 2 3 4 5 6 7 23 22 21 20 19 8 9 10 11 12 l v l w out_w vm2 v z rf1 p_gnd1 nc isd in_wn in_wp in_vn out_v vm1 out_u lu nc rf2 p_gnd2 nc nc visd2 visd1 comp 18 17 16 13 14 15 in_vp in_un in_up n v cc s_gnd
ta84006f/fg 2006-3-6 4 pin description pin no. pin symbol pin function remarks 1 l v v-phase output upper pch gate pin leave open. 2 l w w-phase output upper pch gate pin leave open. 3 out_w w-phase output pin connects motor. 4 vm2 motor drive power supply pin externally connects to vm1. 5 v z reference voltage pin used for the vm drop circuit reference voltage when vm (max) > = < = ? 9 isd overcurrent detection output pin inputs the inversion of the isd pin output to the oc pin of the tb6548f/fg (or tb6537p/pg/f/fg). 10 in_wn w-phase upper drive input pin connects to the out_wn pin of the tb6548f/fg (or tb6537p/pgf/fg); incorporates pull-down resistor. 11 in_wp w-phase lower drive input pin connects to the out_wp pin of the tb6548f/fg (or tb6537p/pg/f/fg); incorporates pull-up resistor. 12 in_vn v-phase upper drive input pin connects to the out_vn pin of the tb6548f/fg (or tb6537p/pg/f/fg); incorporates pull-down resistor. 13 in_vp v-phase lower drive input pin connects to the out_vp pin of the tb6548f/fg (or tb6537p/pg/f/fg); incorporates pull-up resistor. 14 in_un u-phase upper drive input pin connects to the out_un pin of the tb6548f/fg (or tb6537p/pg/f/fg); incorporates pull-down resistor. 15 in_up u-phase lower drive input pin connects to the out_up pin of the tb6548f/fg (or tb6537p/pg/f/fg); incorporates pull-up resistor. 16 s_gnd signal gnd pin ? 17 v cc control power supply pin v cc (opr) = 4.5 to 5.5 v 18 n mid-point pin mid-point pot ential confirmation pin; left open 19 comp location detection signal output pin connects to the wave pin of the tb6548f/fg (or tb6537p/pg/f/fg). 20 visd1 overcurrent detection input pin 1 externally connects to the rf2 pin. 21 visd2 overcurrent detection input pin 2 connect a capacitor between this pin and gnd. internal resistor and capacitor used to reduce noise. 22 nc not connected ? 23 nc not connected ? 24 p_gnd2 power gnd pin externally connects to the p_gnd1 pin. 25 rf2 output current detection pin externally connects to the rf1 pin. connect a detection resistor between this pin and gnd. 26 nc not connected ? 27 lu u-phase upper output pch gate pin leave open. 28 out_u u-phase output pin connects motor. 29 vm1 motor drive power supply pin exte rnally connects to the vm2 pin. 30 out_v v-phase output pin connects the motor.
ta84006f/fg 2006-3-6 5 absolute maximum ratings (ta = 25c) characteristic symbol rating unit motor power supply voltage vm 25 v control power supply voltage v cc 7 v output current i o 1.0 a/phase input voltage v in gnd ? 0.3 ~v cc + 0.3 v v 1.1 (note 2) power dissipation pd 1.4 (note 3) w operating temperature t opr ? 30~85 c storage temperature t stg ? 55~150 c note 2: standalone note 3: when mounted on a pcb (50 50 1.6 mm; cu area, 30%) recommended operating conditions (ta = ? 30~85c) characteristic symbol test circuit test conditions min typ. max unit control power supply voltage v cc ? ? 4.5 5.0 5.5 v motor power supply voltage vm ? ? 10 20 22 v output current i o ? ? ? ? 0.5 a input voltage v in ? ? gnd ? v cc v chopping frequency fchop ? ? 15 20 50 khz vz current i z ? ? ? ? 1.0 ma
ta84006f/fg 2006-3-6 6 electrical characteristics (ta = 25c, v cc = 5 v, vm = 20 v) characteristic symbol test circuit test conditions min typ. max unit v in (h) 1 in_up, in_vp, iv_wp in_un, in_vn, in_wn 2.5 ? 5.0 input voltage v in (l) 1 ? gnd ? 0.8 v i in1 (h) 2 v in = 5 v, in_up, in_vp, in_wp ? ? 20 i in2 (h) 2 v in = 5v, in_un, in_vn, in_wn 300 450 600 i in1 (l) 2 v in = gnd, in_un, in_vn, in_wn ? ? 1 input current i in2 (l) 2 v in = gnd, in_up, in_vp, in_wp 300 450 600 a i cc 1 3 upper phase 1 on, lower phase 1 on, output open ? 8.0 13.0 i cc 2 3 upper phase 2 on, synchronous regeneration mode, output open ? 7.0 12.0 i cc 3 3 all phases off, output open ? 6.0 11.0 im1 3 upper phase 1 on, lower phase 1 on, output open ? 2.0 3.5 im2 3 upper phase 2 on, synchronous regeneration mode, output open ? 2.0 3.5 power supply current im3 3 all phases off, output open ? 1.8 3.2 ma lower output saturation voltage vsat 4 i o = 0.5 a ? 1.0 1.5 v upper output on-resistance ron 5 i o = 0.5 a, bi-directional ? 0.65 1.0 ? lower diode forward voltage v f (l) 6 i f = 0.5 a ? 1.2 1.6 v upper diode forward voltage v f (h) 7 i f = 0.5 a ? 0.9 1.4 v mid-point voltage vn 8 vm = 20 v vrf = 0 v 9.88 10.4 10.92 v pin voltage detection level vcmp 9 vm = 20 v vrf = 0 v 9.88 10.4 10.92 v vol (cmp) 9 i ol = 1 ma gnd ? 0.5 v pin voltage detection output voltage roh (cmp) 9 ? 7 10 13 k ? overcurrent detection level vrf 10 ? 0.45 0.5 0.55 v voh (isd) 10 i oh = 0.1 ma 4.5 ? 5.0 v overcurrent detection output voltage vol (isd) 10 i ol = 0.1 ma gnd ? 0.5 v reference voltage v z 11 i z = 0.5 ma, t j = 25c 20.9 22.0 23.1 v tsd temperature tsd ? t j ? 165 ? c tsd hysteresis width ? t ? ? ? 30 ? c i l (h) 12 pch-mos ? 0 100 output leakage current i l (l) 13 ? ? 0 50 a
ta84006f/fg 2006-3-6 7 functions input output in-p in-n upper power transistor lower power transistor high high on off high low high on on prohibit mode (note 4) high low off off high impedance low low off on low connecting the tb6548f/fg (or tb6537p/pg/f/fg) to the ta 84006f/fg allows electric motors to be controlled by pwm. note 4: in prohibit mode, the output power transistor goes into vertical on mode and through current may damage the circuit. do not use the ta84006f/fg in this mode. this mode is not actuated when t he ta84006f/fg is connected to the tb6548f/fg or tb6537p/pg/f/fg, but can be triggered by input noi se during standalone testing. connecting the ta84006f/fg to the tb6537p/pg/f/fg controls the lower pwm. at chopping on, the diagonally output power transistors are on. at chopping off, the lower transistor is off, regenerating the motor current via the upper diode (incorporating the pch-mos). tb6548f/fg (tb6537p/ pg/f/fg) out-p out-n low active high active in-p in-n vm out vm v out on pch-mos off when chopping is on when chopping is off off
ta84006f/fg 2006-3-6 8 connecting the ta84006f/fg to the tb6548f/fg controls the synchronous rectification pwm. at chopping off, power dissipation is reduced by operating the pch-mos in reverse and regenerating the motor?s current. when controlling synchronous rectification pwm vm v out on pch-mos off when chopping is on when chopping is off in-p in-n v out
ta84006f/fg 2006-3-6 9 equivalent circuit ? input to the visd1 pin the voltage generated at the overcurrent detection resistor rf connected to the rf pin. ? at chopping on, voltage spikes at the rf pin as a re sult of the pch-mos output capacitance. to cancel the spike, externally connect a ca pacitor to the visd2 pin. (10 k ? resistor built-in) ? if the visd2 pin voltage exceeds th e internal reference voltage (vrf = 0.5 v), the overcurrent detection output isd pin goes low. inputting the inversion of the isd pin output to the tb6537p/pg/f/fg or tb6548f/fg oc pin limits the pwm on time and the current at the isd output rising edge. ? the pin voltage detector outputs the result of or-ing the output pin voltages and the virtual mid-point n voltage to determine the majority. (if at least two phases of the thr ee-phase output are greater than the mid-point potential, the detector outputs ?low?. conversely, if at least two phases ar e smaller than the mid-point potential, the circuit outputs ?high?.) ? with the virtual mid-point potential vn used as the reference for the pin voltage detection circuit considered as half the voltage applied to the motor, then vn = [ (vm ? ron (upper) * i o ) ? (v sat (lower) + vrf) ]/2 + v sat + vrf = [vm ? vrf + v sat (lower) ? ron (upper) * i o ]/2 + vrf. here, assuming that: v sat (lower) ? ron (upper) * i o ? = [vm ? vrf + v f ]/2 + vrf ? automatic restoration tsd (on) = 165c tsd (off) = 135c ? temperature hysteresis supported tsd (hys) = 30c comp v cc 10 k ? (typ.) gnd majority-determining or data isd v cc 0.5 v (typ.) 10 k ? external capacitor visd1 visd2
ta84006f/fg 2006-3-6 10 ? incorporate a zener diode and make the external co nnections shown in the di agram below. design the device so that the voltage applied to the vm is clamped at 22 v below the maximum operating power supply voltage. ? a capacitor is needed to control the e ffect of the counter-electromotive force. verification is particularly necessary when the motor current is large at startup or at shutdown (output off). v z pin fluctuation width 20.9 v to 23.1 v due to the temperature characteristics (3.5 3 mv/c), the following applies at an ambient temperature of 85c: v z (max) = 23.1 + (85 ? 25) 3.5 3 mv = 23.73 v by taking the measures shown in the diagram on the right to bring the voltage down to 22 v, the following becomes the case: v z (max) = 23.73 ? (0.7 ? 2 mv (85 ? 25) ) 3 = 21.99 v 24 v vm v z
ta84006f/fg 2006-3-6 11 example of application circuit note 5: utmost care is necessa ry in the design of the output, v cc , v m , and gnd lines since the ic may be destroyed by short-circuiting between outputs, air contamination f aults, or faults due to improper grounding, or by short-circuiting between contiguous pins. v dd = 5 v oc gnd wave overcurrent detection signal location detection signal pwm signal isd comp p_gnd vm = 20 v m rf visd1 visd2 tb6548f/fg ta84006f/fg s_gnd 0.01 f 1 ?
ta84006f/fg 2006-3-6 12 test circuit 1: v in (h), v in (l) input v in = 0.8 v/2.5 v, measure the output voltage, and test the function. test circuit 2: i in (h), i in (l) 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 0.8 v 2.5 v 20 v v v v 500 ? 5 v ta84006f/fg 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 5 v 20 v 5 v ta84006f/fg a a
ta84006f/fg 2006-3-6 13 test circuit 3: i cc 1, i cc 2, i cc 3, im1, im2, im3 i cc 1, im1: upper phase 1 on, lower phase 1 on (e .g., u-phase: h; v-phase: l; w-phase: z) i cc 2, im2: upper phase 1 on, synchronous regeneration mo de (e.g., u-phase: h; v-phase: h; w-phase: z) i cc 3, im3: all phases off test circuit 4: v sat 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 2.5 v 20 v 5 v ta84006f/fg a a 0.8 v im i cc 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 20 v 5 v ta84006f/fg v 0.5 a v sat
ta84006f/fg 2006-3-6 14 test circuit 5: ron test circuit 6: v f (l) 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 20 v 5 v ta84006f/fg v v1 5 v 0.5 a ron = v1/0.5 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 ta84006f/fg v 0.5 a v f
ta84006f/fg 2006-3-6 15 test circuit 7: v f (h) test circuit 8: vn 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 ta84006f/fg v v f 0.5 a 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 20 v 5 v ta84006f/fg v vn
ta84006f/fg 2006-3-6 16 test circuit 9: vcmp, vol (cmp), roh (cmp) (1) where output phase 2 is high (10.92 v) and phase 1 is low ( = 9.88 v), set sw1 = a and measure v2 = vol (cmp). (2) where output phase 1 is high (10.92 v) and phase 2 is low (9.88 v), set sw1 = b and confirm that 5 v 10 k ? /(10 k ? + 13 k ? ) < v2 < 5 v 10 k ? /(10 k ? + 7 k ? ). test circuit 10: vrf, voh (isd), vol (isd) (1) where visd = 0.55 v, set sw2 = a and measure v3 = voh (isd). (2) where visd = 0.45 v, set sw2 = b and measure v3 = vol (isd). 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 20 v 5 v ta84006f/fg v2 5 v v 10 k ? b sw1 a 9.88 v 10.92 v 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 20 v 5 v ta84006f/fg v3 v 0.1 ma b sw2 a 0.45 v 0.55 v 0.1 ma 5 v
ta84006f/fg 2006-3-6 17 test circuit 11: v z test circuit 12: i l (h) 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 ta84006f/fg v v z 5 0.5 ma 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 25 v 5 v ta84006f/fg a 5 v connect n pin to ? 0.3 v
ta84006f/fg 2006-3-6 18 test circuit test circuit 13: i l (l) 17 1 2 27 29 4 10 11 12 13 14 15 18 19 28 30 3 6 25 16 7 24 21 20 9 25 v 5 v ta84006f/fg a 5 v
ta84006f/fg 2006-3-6 19 package dimensions weight: 0.63 g (typ.)
ta84006f/fg 2006-3-6 20 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor de vice are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or ic fa ilure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, caus ing a large current to continuously flow and the breakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse ca pacity, fusing time and in sertion circuit location, are required. [3] if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. [4] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
ta84006f/fg 2006-3-6 21 points to remember on handling of ics (1) thermal shutdown circuit thermal shutdown circuits do not necessarily prot ect ics under all circumstances. if the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or ic breakdown before operation. (2) heat radiation design in using an ic with large current flow such as power amp, regulator or dr iver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (t j ) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, de terioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (3) back-emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back- emf. if the current sink capability of the power supply is small, the device?s motor power supply and output pins might be exposed to conditions beyond maximum ratings. to avoid this problem, take the effect of back-em f into consideration in system design.
ta84006f/fg 2006-3-6 22

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