STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 description STP4925 is the dual pchannel logic enhancement mod e power field effect transistor which is produced using high cell density, dmos tre nch technology. this high density process is especially tailored to minimize onstate resistance. these devices are particularly suited for low voltage application suc h as lcd backlight, notebook computer power management, and other battery powere d circuits. pin configuration sop-8 part marking sop-8 feature 30v/7.2a, r ds(on) = 20m (typ.) @v gs =10v 30v/5.6a, r ds(on) = 25m @v gs = 4.5v super high density cell design for extremely low r ds(on) exceptional onresistance and maximum dc current capability sop8 package design
STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drainsource voltage v dss 30 v gatesource voltage v gss 20 v continuous drain current (tj=150 ) t a =25 t a =70 i d 7.2 5.6 a pulsed drain current i dm 20 a continuous source current (diode conduction) i s 2.3 a power dissipation t a =25 t a =70 p d 2.8 1.8 w operation junction temperature t j 55/150 storgae temperature range t stg 55/150 thermal resistancejunction to ambient r ja 70 /w
STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drainsource breakdown voltage v (br)dss v gs =0v,i d =250ua 30 v gate threshold voltage v gs(th) v ds =v gs ,i d =250 ua 1.0 3.0 v gate leakage current i gss v ds =0v,v gs = 20v 100 na zero gate voltage drain current i dss t j =55 v ds =30v,v gs =0v 1 ua v ds =30v,v gs =0v 5 onstate drain current i d(on) v ds= 5v,v gs =10v 40 a drainsource onresistance r ds(on) v gs =10v, i d =9.2a v gs =4.5v, i d =7.0 0.020 0.025 0.030 0.037 forward tran conductance g fs v ds =10v,i d =9.0a 24 s diode forward voltage v sd i s =2.0a,v gs =0v 0.8 1.2 v dynamic total gate charge q g v ds =15v,v gs =10v i d 9.a 16 24 nc gatesource charge q gs 2.3 gatedrain charge q gd 4.5 input capacitance ciss v ds =15v,vgs=0v f=1mhz 1650 pf output capacitance coss 350 reverse transfercapacitance crss 235 turnon time t d(on) tr v dd =15v,r l =15 i d =1.0a,v gen =10v r g =6 16 30 ns 17 30 turnoff time t d(off) tf 65 110 35 80
STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 typical characterictics (25 unless note)
STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 typical characterictics (25 unless note)
STP4925 p dual channel enhancement mode mosfet 7.2a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STP4925 2007. v1 sop-8 package outline
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