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1. general description the 74lvc1gu04 is a high-performance, low-power, low-voltage, si-gate cmos device, superior to most advanced cmos compatible ttl families. the input can be driven from either 3.3 v or 5 v devices. this feature allows the use of this device in a mixed 3.3 v and 5 v environment. the 74lvc1gu04 provides the inverting single state unbuffered function. 2. features n wide supply voltage range from 1.65 v to 5.5 v n high noise immunity n 24 ma output drive (v cc = 3.0 v) n cmos low power consumption n latch-up performance exceeds 250 ma n input accepts voltages up to 5 v n multiple package options n esd protection: u hbm jesd22-a114-d exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n speci?ed from - 40 cto+85 c and - 40 c to +125 c 3. ordering information 74lvc1gu04 inverter rev. 08 12 june 2007 product data sheet table 1. ordering information type number package temperature range name description version 74lvc1gu04gw - 40 c to +125 c tssop5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 74lvc1gu04gv - 40 c to +125 c sc-74a plastic surface-mounted package; 5 leads sot753 74lvc1gu04gm - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm sot886 74lvc1gu04gf - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm sot891
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 2 of 15 nxp semiconductors 74lvc1gu04 inverter 4. marking 5. functional diagram 6. pinning information 6.1 pinning table 2. marking codes type number marking 74lvc1gu04gw vd 74lvc1gu04gv vu4 74lvc1gu04gm vd 74lvc1gu04gf vd fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram mna108 ay 2 4 mna109 4 1 2 mna636 a y 100 w v cc v cc fig 4. pin con?guration sot353-1 and sot753 fig 5. pin con?guration sot886 fig 6. pin con?guration sot891 74lvc1gu04 n.c. v cc a gnd y 001aab666 1 2 3 5 4 74lvc1gu04 a 001aab667 n.c. gnd n.c. v cc y transparent top view 2 3 1 5 4 6 74lvc1gu04 a 001aaf411 n.c. gnd n.c. v cc y transparent top view 2 3 1 5 4 6
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 3 of 15 nxp semiconductors 74lvc1gu04 inverter 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. [3] for tssop5 and sc-74a packages: above 87.5 c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 45 c the value of p tot derates linearly with 2.4 mw/k. table 3. pin description symbol pin description sot353-1/sot753 sot886/sot891 n.c. 1 1 not connected a 2 2 data input a gnd 3 3 ground (0 v) y 4 4 data output y n.c. - 5 not connected v cc 5 6 supply voltage table 4. function table [1] input (a) output (y) lh hl table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v i ik input clamping current v i < 0 v - - 50 ma v i input voltage [1] - 0.5 +6.5 v i ok output clamping current v o > v cc or v o < 0 v - 50 ma v o output voltage active mode [1] [2] - 0.5 v cc + 0.5 v i o output current v o = 0 v to v cc - 50 ma i cc supply current - +100 ma i gnd ground current - - 100 ma p tot total power dissipation t amb = - 40 c to +125 c [3] - 250 mw t stg storage temperature - 65 +150 c
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 4 of 15 nxp semiconductors 74lvc1gu04 inverter 9. recommended operating conditions 10. static characteristics table 6. recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v t amb ambient temperature - 40 - +125 c d t/ d v input transition rise and fall rate v cc = 1.65 v to 2.7 v 0 - 20 ns/v v cc = 2.7 v to 5.5 v 0 - 10 ns/v table 7. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ [1] max unit t amb = - 40 c to +85 c v ih high-level input voltage v cc = 1.65 v to 5.5 v 0.75 v cc -- v v il low-level input voltage v cc = 1.65 v to 5.5 v - - 0.25 v cc v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.65 v to 5.5 v v cc - 0.1 - - v i o = - 4 ma; v cc = 1.65 v 1.2 - - v i o = - 8 ma; v cc = 2.3 v 1.9 - - v i o = - 12 ma; v cc = 2.7 v 2.2 - - v i o = - 24 ma; v cc = 3.0 v 2.3 - - v i o = - 32 ma; v cc = 4.5 v 3.8 - - v v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc = 1.65 v to 5.5 v - - 0.1 v i o = 4 ma; v cc = 1.65 v - - 0.45 v i o = 8 ma; v cc = 2.3 v - - 0.3 v i o = 12 ma; v cc = 2.7 v - - 0.4 v i o = 24 ma; v cc = 3.0 v - - 0.55 v i o = 32 ma; v cc = 4.5 v - - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc =0v to 5.5 v - 0.1 5 m a i cc supply current v i = 5.5 v or gnd; i o =0a; v cc = 1.65 v to 5.5 v - 0.1 10 m a c i input capacitance v cc = 3.3 v; v i = gnd to v cc -6-pf
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 5 of 15 nxp semiconductors 74lvc1gu04 inverter [1] all typical values are measured at v cc = 3.3 v and t amb = 25 c. 11. dynamic characteristics t amb = - 40 c to +125 c v ih high-level input voltage v cc = 1.65 v to 5.5 v 0.8 v cc -- v v il low-level input voltage v cc = 1.65 v to 5.5 v - - 0.2 v cc v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.65 v to 5.5 v v cc - 0.1 - - v i o = - 4 ma; v cc = 1.65 v 0.95 - - v i o = - 8 ma; v cc = 2.3 v 1.7 - - v i o = - 12 ma; v cc = 2.7 v 1.9 - - v i o = - 24 ma; v cc = 3.0 v 2.0 - - v i o = - 32 ma; v cc = 4.5 v 3.4 - - v v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc = 1.65 v to 5.5 v - - 0.1 v i o = 4 ma; v cc = 1.65 v - - 0.7 v i o = 8 ma; v cc = 2.3 v - - 0.45 v i o = 12 ma; v cc = 2.7 v - - 0.6 v i o = 24 ma; v cc = 3.0 v - - 0.80 v i o = 32 ma; v cc = 4.5 v - - 0.80 v i i input leakage current v i = 5.5 v or gnd; v cc =0v to 5.5 v - 0.1 5 m a i cc supply current v i = 5.5 v or gnd; i o =0a; v cc = 1.65 v to 5.5 v - - 200 m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ [1] max unit table 8. dynamic characteristics voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 10 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay a to y; see figure 7 [2] v cc = 1.65 v to 1.95 v 0.3 1.7 5.0 0.3 6.5 ns v cc = 2.3 v to 2.7 v 0.3 1.3 4.0 0.3 5.5 ns v cc = 2.7 v 0.5 1.7 5.0 0.5 6.5 ns v cc = 3.0 v to 3.6 v 0.5 1.6 3.7 0.5 5.0 ns v cc = 4.5 v to 5.5 v 0.5 1.3 3.0 0.5 4.0 ns
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 6 of 15 nxp semiconductors 74lvc1gu04 inverter [1] typical values are measured at t amb =25 c and v cc = 1.8 v, 2.5 v, 2.7 v, 3.3 v and 5.0 v respectively. [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. 12. waveforms c pd power dissipation capacitance v i = gnd to v cc ; v cc = 3.3 v [3] - 14.9 - - - pf table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 10 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max measurement points are given in t ab le 9 . v ol and v oh are typical output voltage drop that occur with the output load. fig 7. the input a to output y propagation delay times mna637 t phl t plh v m v m a input y output gnd v i v oh v ol table 9. measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5 v cc 0.5 v cc 2.3 v to 2.7 v 0.5 v cc 0.5 v cc 2.7 v 1.5 v 1.5 v 3.0 v to 3.6 v 1.5 v 1.5 v 4.5 v to 5.5 v 0.5 v cc 0.5 v cc
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 7 of 15 nxp semiconductors 74lvc1gu04 inverter t amb = 25 c. f i = 1 khz at v o is constant fig 8. typical forward transconductance as a function of supply voltage fig 9. test set-up for measuring forward transconductance 0246 120 100 40 0 80 20 60 mna639 v cc (v) g fs (ma/v) mna638 v cc r bias = 560 k w input 0.47 m f 100 m f output a i o v i g fs d i o d v i --------- = test data is given in t ab le 10 . de?nitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 10. load circuitry for switching times v ext v cc v i v o mna616 dut c l r t r l r l pulse generator table 10. test data supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl 1.65 v to 1.95 v v cc 2.0 ns 30 pf 1 k w open 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 w open
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 8 of 15 nxp semiconductors 74lvc1gu04 inverter 13. application information some applications are: ? linear ampli?er (see figure 11 ) ? in crystal oscillator design (see figure 12 ) remark: all values given are typical unless otherwise speci?ed. 2.7 v 2.7 v 2.5 ns 50 pf 500 w open 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open 4.5 v to 5.5 v v cc 2.5 ns 50 pf 500 w open table 10. test data continued supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl v o(p-p) =v cc - 1.5 v centered at 0.5v cc . a ol = open loop ampli?cation. a u = voltage ampli?cation. r1 3 3k w ,r2 1m w z l >10k w ; a ol = 20 (typ.) typical unity gain bandwidth product is 5 mhz. c1 = 47 pf (typ.) c2 = 22 pf (typ.) r1 = 1 m w to 10 m w (typ.) r2 optimum value depends on the frequency and required stability against changes in v cc or average minimum i cc (i cc is typically 2 ma at v cc = 3.3 v and f = 10 mhz). fig 11. used as a linear ampli?er fig 12. crystal oscillator con?guration u04 r1 r2 v cc z l mna052 1 m f mna053 u04 out r2 r1 c1 c2 a u a ol 1 r1 r2 ------ - 1a ol + () + ----------------------------------------- C =
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 9 of 15 nxp semiconductors 74lvc1gu04 inverter 14. package outline fig 13. package outline sot353-1 (tssop5) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (1) z (1) q references outline version european projection issue date iec jedec jeita mm 0.1 0 1.0 0.8 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 e 1 1.3 2.25 2.0 0.60 0.15 7 0 0.1 0.1 0.3 0.425 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.46 0.21 sot353-1 mo-203 sc-88a 00-09-01 03-02-19 w m b p d z e e 1 0.15 13 5 4 q a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 1.5 3 mm 0 scale tssop5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 1.1
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 10 of 15 nxp semiconductors 74lvc1gu04 inverter fig 14. package outline sot753 (sc-74a) references outline version european projection issue date iec jedec jeita sot753 sc-74a wb m b p d e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface-mounted package; 5 leads sot753 unit a 1 b p cd e h e l p qy w v mm 0.100 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 02-04-16 06-03-16
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 11 of 15 nxp semiconductors 74lvc1gu04 inverter fig 15. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 12 of 15 nxp semiconductors 74lvc1gu04 inverter fig 16. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 13 of 15 nxp semiconductors 74lvc1gu04 inverter 15. abbreviations 16. revision history table 11. abbreviations acronym description cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 12. revision history document id release date data sheet status change notice supersedes 74lvc1gu04_8 20070612 product data sheet - 74lvc1gu04_7 modi?cations: ? the general description has been changed. 74lvc1gu04_7 20061006 product data sheet - 74lvc1gu04_6 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? added type number 74lvc1gu04gf (xson6/sot891 package). 74lvc1gu04_6 20040921 product speci?cation - 74lvc1gu04_5 74lvc1gu04_5 20040628 product speci?cation - 74lvc1gu04_4 74lvc1gu04_4 20030630 product speci?cation - 74lvc1gu04_3 74lvc1gu04_3 20030212 product speci?cation - 74lvc1gu04_2 74lvc1gu04_2 20010406 product speci?cation - 74lvc1gu04_1 74lvc1gu04_1 20001212 product speci?cation - -
74lvc1gu04_8 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 08 12 june 2007 14 of 15 nxp semiconductors 74lvc1gu04 inverter 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 17.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 17.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 18. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lvc1gu04 inverter ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 12 june 2007 document identifier: 74lvc1gu04_8 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 4 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 application information. . . . . . . . . . . . . . . . . . . 8 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 14 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 17.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 17.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 18 contact information. . . . . . . . . . . . . . . . . . . . . 14 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

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