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  irfr120z IRFU120Z hexfet ? power mosfet v dss = 100v r ds(on) = 190m ? i d = 8.7a  www.irf.com 1 automotive mosfet pd - 94754 specifically designed for automotive applications, this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. additional features of this design are a 175c junction operating tempera- ture, fast switching speed and improved repetitive avalanche rating . these features combine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. s d g description advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax features d-pak irfr120z i-pak IRFU120Z hexfet ? is a registered trademark of international rectifier. absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v a i dm p u l se d d ra i n c urrent  p d @t c = 25c power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) si n gl e p u l se a va l anc h e e ner gy  mj e as (tested ) si n gl e p u l se a va l anc h e e ner gy t este d v a l ue  i ar a va l anc h e c urrent   a e ar r epet i t i ve a va l anc h e e ner gy  mj t j operating junction and t stg storage temperature range c soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case ??? 4.28 r ja j unct i on-to- a m bi ent (pcb mount )  ??? 40 c/w r ja junction-to-ambient ??? 110 -55 to + 175 300 (1.6mm from case ) 10 lbf  in (1.1n  m) 35 0.23 20 max. 8.7 6.1 35 20 18 see fig.12a, 12b, 15, 16
 2 www.irf.com s d g el ec t r i ca l ch arac t er i s ti cs @ t j = 25c ( un l ess o th erw i se spec ifi e d) parameter min. typ. max. units v (br)dss drain-to-source breakdown volta g e 100 ??? ??? v ? v (br)dss / ? t j breakdown volta g e tem p . coefficient ??? 0.084 ??? v/c r ds(on) static drain-to-source on-resistance ??? 150 190 m ? source-drain ratings and characteristics parameter min. typ. max. units i s continuous source current ??? ??? 8.7 (body diode) a i sm pulsed source current ??? ??? 35 (body diode)  v sd diode forward volta g e ??? ??? 1.3 v t rr reverse recover y time ???2436ns q rr reverse recover y char g e ??? 23 35 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 0v, v ds = 80v, ? = 1.0mhz v gs = 0v, v ds = 0v to 80v  v gs = 10v  v dd = 50v i d = 5.2a r g = 53 ? t j = 25c, i s = 5.2a, v gs = 0v  t j = 25c, i f = 5.2a, v dd = 50v di/dt = 100a/ s  conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 5.2a  v ds = v gs , i d = 250a v ds = 100v, v gs = 0v v ds = 100v, v gs = 0v, t j = 125c mosfet symbol showing the integral reverse p-n junction diode. v ds = 25v, i d = 5.2a i d = 5.2a v ds = 80v conditions v gs = 10v  v gs = 0v v ds = 25v ? = 1.0mhz v gs = 20v v gs = -20v
 www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0 1 10 100 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 25c 4.5v    


 
    
    0 1 10 100 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 175c 4.5v    


 
    
   4.0 5.0 6.0 7.0 8.0 v gs , gate-to-source voltage (v) 0.1 1.0 10.0 100.0 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 25v 60s pulse width t j = 25c t j = 175c 02468 i d, drain-to-source current (a) 0 2 4 6 8 10 12 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 10v 380s pulse width
 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 100 200 300 400 500 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0246810 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v vds= 50v vds= 20v i d = 5.2a for test circuit see figure 13 0.0 0.5 1.0 1.5 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec
 www.irf.com 5 1e-006 1e-005 0.0001 0.001 0.01 t 1 , rectangular pulse duration (sec) 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature 25 50 75 100 125 150 175 t j , junction temperature (c) 0 2 4 6 8 10 i d , d r a i n c u r r e n t ( a ) ri (c/w) i (sec) 0.33747 0.000053 1.793 0.000125 2.150 0.000474 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci i / ri ci= i / ri -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 5.2a v gs = 10v
 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -  fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 0.9a 1.2 bottom 5.2a -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 2.0 3.0 4.0 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a
 www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 tav (sec) 0.01 0.1 1 10 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 4 8 12 16 20 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 5.2a
 8 www.irf.com fig 17. 
    

 for n-channel hexfet   power mosfets  ?  !  ? "  ?  #$!  %& p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period    

   + - + + + - - -       '' ? ()""*+  ? '(&,' -  ? !  ""*'./'/ ? ' -  0'(-   v ds 90% 10% v gs t d(on) t r t d(off) t f  ' "12 1 3 '. 0.1 %  '       + -  '' fig 18a. switching time test circuit fig 18b. switching time waveforms
 www.irf.com 9  

   
   
   

 6.73 (.265) 6.35 (.250) - a - 4 1 2 3 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 4.57 (.180) 2.28 (.090) 2x 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) min. 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain 10.42 (.410) 9.40 (.370) notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before solder dip, solder dip max. +0.16 (.006). example: lot code 9u1p t his is an irfr120 with assembly we e k = 16 dat e code year = 0 logo rectifier int ernational as s e mb l y lot code 016 irf u120 9u 1p notes : t his part marking information applies to devices produced before 02/26/2001 int ernational logo rectifier 34 12 irf u120 916a lot code as s e mb l y example: with assembly t his is an irfr120 ye ar 9 = 1999 dat e code line a we e k 1 6 in the assembly line "a" as sembled on ww 16, 1999 l ot code 1234 part number notes : t his part marking information applies to devices produced after 02/26/2001
 10 www.irf.com  
   
   
   
  6.73 (.265) 6.35 (.250) - a - 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 2.28 (.090) 1.14 (.045) 0.76 (.030) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions show n are before solder dip, solder dip max. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2x 3x 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 4 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018) we e k = 16 dat e code ye ar = 0 notes : t his part marking information applies to devices produced before 02/26/2001 example: lot code 9u1p this is an irfr120 wit h as s e mb l y assembly international rect if ier logo lot code irfu120 9u 1p 016 international logo rectifier lot code as s e mb l y example: wit h as s e mb l y this is an irfr120 year 9 = 1999 dat e code line a we e k 19 in the assembly line "a" as s e mb l e d on ww 19, 1999 lot code 5678 part number notes : t his part marking information applies to devices produced after 02/26/2001 56 irf u120 919a 78
 www.irf.com 11 data and specifications subject to change without notice. this product has been designed and qualified fo r the automotive [q101] market. qualification standards can be found on ir?s web site.  

  
   
  tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 10/03   repetitive rating; pulse width limited by max. junction temperature. (see fig. 11).   limited by t jmax , starting t j = 25c, l = 1.29mh r g = 25 ? , i as = 5.2a, v gs =10v. part not recommended for use above this value.  pulse width 1.0ms; duty cycle 2%. 
 c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.  this value determined from sample failure population. 100% tested to this value in production.   when mounted on 1" square pcb (fr-4 or g-10 material) . for recommended footprint and soldering techniques refer to application note #an-994


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