ks57c5532/p5532 (preliminary spec) product overview 1 - 1 1 product overview overview the ks57c5532/p5532 single-chip cmos microcontroller has been designed for high-performance using samsung's newest 4 -bit cpu core, sam47 ( samsung arrangeable microcontrollers). the KS57P5532 is a microcontroller which has 32-kbyte one-time-programmable eprom but its functions are same to ks57c5532. with its dtmf generator, 8-bit serial i/o interface, and ver satile 8-bit timer/counters, the ks 57c5532/p5532 offers an excel lent design solution for a wide variety of telecommunication applica tions. up to 55 pins of the 64-pin sdip or qfp package can be dedicated to i/o. seven vectored interrupts provide fast re sponse to internal and external events. in addition, the ks 57c5532/p5532 's advanced cmos technol ogy provides for low power consumption and a wide op erating voltage range. development support the samsung microcontroller development system, smds, provides you with a complete pc-based develop- ment environment for ks57-series microcontrollers that is powerful, reliable, and portable. in addition to its window-based program development structure, the smds toolset includes versatile debugging, trace, instruction timing, and performance measurement applications. the samsung generalized assembler (sama) has been designed specifically for the smds environment and accepts assembly language sources in a variety of microprocessor formats. sama generates industry-standard hex files that also contain program control data for smds compatibility.
product overview ks57c5532/p5532 (preliminary spec) 1 - 2 features summary memory 1 k 4-bit ram 32 k 8-bit rom 55 i/o pins input only: 4 pins i/o: 43 pins n-channel open-drain i/o (s/w) : 8 pins memory-mapped i/o structure data memory bank 15 dtmf generator 16 dual-tone frequencies for tone dialing 8-bit basic timer programmable internal timer watchdog timer two 8-bit timer/counters programmable interval timer external event counter function timer/counters clock outputs to tclo0 and tclo1 pins external clock signal divider serial i/o interface clock generator watch timer time interval generation: 0.5 s, 3.9 ms at 32.768 khz 4 frequency outputs to the buz pin 8-bit serial i/o interface 8-bit transmit/receive mode 8-bit receive mode lsb-first or msb-first transmission selectable bit sequential carrier supports 8-bit serial data transfer in arbitrary format interrupts 3 external interrupt vectors 4 internal interrupt vectors 2 quasi-interrupts power-down modes idle: only cpu clock stops stop: main s ystem clock stops subsystem clock stop mode oscillation sources crystal, ceramic for main system clock crystal oscillator for subsystem clock main system clock frequency: 3.579545 mhz (typical) subsystem clock frequency: 32.768 khz (typical) cpu clock divider circuit (by 4, 8, or 64) instruction execution times 0.67, 1.33, 10.7 s at 6.0 mhz 1.12, 2.23, 17.88 s at 3.579545 mhz 122 s at 32.768 khz operating temperature ? 40 c to 85 c operating voltage range 1.8 v to 5.5 v (at 3 mhz) 2.7 v to 5.5 v (at 6 mhz) package types 64 sdip, 64 qfp
ks57c5532/p5532 (preliminary spec) product overview 1 - 3 block diagram arithmetic and logic unit interrupt control block stack pointer program counter program status word p0.0/ sck p0.1/so p0.2/si p0.3/btco 1 k x 4-bit data memory watch timer basic timer 32 k byte program memory flags instruction decoder clock reset xin xtin xout xtout internal interrupts p8.0?p8.3 p4.0?p4.3 p5.0?p5.3 p6.0?p6.3/ ks0?ks3 p7.0?p7.3/ ks4?ks7 p9.0?p9.3 dtmf p10.0?p10.3 p11.0?p11.3 p12.0?p12.3 p13.0?p13.2 int0, int1, int2, int4 8-bit timer/ counter 0 i/o port 8 8-bit timer/ counter 1 i/o port 6 i/o port 7 i/o port 9 i/o port 10 i/o port 11 i/o port 12 i/o port 13 i/o port 0 serial i/o port p2.0/tclo0 p2.1/tclo1 p2.2/clo p2.3/buz i/o port 2 p3.0/tcl0 p3.1/tcl1 p3.2 p3.3 i/o port 3 i/o port 4 i/o port 5 dtmf generator p1.0/int0 p1.1/int1 p1.2/int2 p1.3/int4 input port 1 watch-dog timer figure 1 -1 . ks 57c5532/p5532 simplified block diagram
product overview ks57c5532/p5532 (preliminary spec) 1 - 4 pin assignments v ss p9.0 p9.1 p9.2 p9.3 p8.0 p8.1 p8.2 p8.3 p7.0/ks4 p7.1/ks5 p7.2/ks6 p7.3/ks7 p6.0/ks0 p6.1/ks1 p6.2/ks2 p6.3/ks3 xtout xtin xin xout reset p5.0 p5.1 p5.2 p5.3 p4.0 p4.1 p4.2 p4.3 p3.0/tcl0 p3.1/tcl1 p1.3/int4 p1.2/int2 p1.1/int1 p1.0/int0 p13.2 p13.1 p13.0 p2.3/buz p2.2/clo p2.1/tclo1 p2.0/tclo0 p0.3/btco p0.2/si p0.1/so p0.0/ sck p10.3 p10.2 p10.1 p10.0 p11.3 p11.2 p11.1 p11.0 p12.3 p12.2 p12.1 p12.0 p3.3 p3.2 nc dtmf vdd ks57c5532 (64-sdip-750) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 figure 1 -2 . ks 57c5532/p5532 pin assignment diagrams
ks57c5532/p5532 (preliminary spec) product overview 1 - 5 32 31 30 29 28 27 26 25 24 23 22 21 20 p5.3 p4.0 p4.1 p4.2 p4.3 p3.0/tcl0 p3.1/tcl1 v dd dtmf nc p3.2 p3.3 p12.0 52 53 54 55 56 57 58 59 60 61 62 63 64 p8.0 p9.3 p9.2 p9.1 p9.0 vss p1.3/int4 p1.2/int2 p1.1/int1 p1.0/int0 p13.2 p13.1 p13.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 p8.1 p8.2 p8.3 p7.0/ks4 p7.1/ks5 p7.2/ks6 p7.3/ks7 p6.0/ks0 p6.1/ks1 p6.2/ks2 p6.3/ks3 xtout xtin xin xout reset p5.0 p5.1 p5.2 p2.3/buz p2.2/clo p2.1/tclo1 p2.0/tclo0 p0.3/btco p0.2/si p0.1/so p0.0/ sck p10.3 p10.2 p10.1 p10.0 p11.3 p11.2 p11.1 p11.0 p12.3 p12.2 p12.1 ks57c5532 (64-qfp-1420f) 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 figure 1 -2 . ks 57c5532/p5532 pin assignment diagrams (continued)
product overview ks57c5532/p5532 (preliminary spec) 1 - 6 pin descriptions table 1 - 1. ks 57c5532/p5532 pin descriptions pin name pin type description number share pin p0.0 p0.1 p0.2 p0.3 i/o 4-bit i/o port. 1-bit or 4-bit read/write and test is possible. individual pins are software configurable as input or output. 4-bit pull-up resistors are software assignable; pull-up re sistors are automatically disabled for output pins. 15 (8) 14 (7) 13 (6) 12 (5) so si btco p1.0 p1.1 p1.2 p1.3 i 4-bit input port. 1-bit and 4-bit read and test is possible. 4 -bit pull-up resistors are assignable by software to p ort 1 . 1 (61) 2 (60) 3 (59) 4 (58) int0 int1 int2 int4 p2.0 p2.1 p2.2 p2.3 i/o same as port 0. 11 (4) 10 (3) 9 (2) 8 (1) tclo0 tclo1 clo buz p3.0 p3.1 p3.2 p3.3 i/o same as port 0. 34 (27) 33 (26) 29 (22) 28 (21) tcl0 tcl1 sclk (1) sdat (1) p4.0?p4.3 p5.0?p5.3 i/o 4-bit i/o ports. 1-bit and 4-bit read/write and test is possible. 4-bit pull-up resistors are software assignable to input pins and are automatically disable for output pins. n-channel open-drain or push-pull output can be selected by software. port 4 and 5 can be paired to support 8-bit data transfer. 38?35 (31?28) 42?39 (35?32) ? p6.0?p6.3 p7.0?p7.3 i/o 4-bit i/o ports. 1-bit or 4-bit read/write and test is possible. port 6 pins are individually software configurable as input or output. 4-bit pull -up resistors are software assignable; pull-up re sistors are automati cally disabled for output pins. ports 6 and 7 can be paired to enable 8-bit data transfer. 51?48 (44?41) 55?52 (48?45) ks0?ks3 ks4?ks7 p8.0?p8.3 i/o same as port 0. 59?56 (52?49) ? p9.0?p9.3 i/o 4-bit i/o port. 1-bit or 4-bit read/write and test is possible. 4-bit pull-up resistors are software assignable ; pull-up re sistors are automatically disabled for output pins. 63?60 (56?53) ? notes 1. sclk and sdat are used for KS57P5532 only. 2. parentheses indicate pin number for 64 qfp package.
ks57c5532/p5532 (preliminary spec) product overview 1 - 7 table 1 - 1. ks 57c5532/p5532 pin descriptions (continued) pin name pin type description number share pin p10.0?p10.3 p11.0?p11.3 i/o same as port 9. ports 10 and 11 can be paired to support 8-bit data transfer. 19?16 (12?9) 23?20 (16?13) ? p12.0?p12.3 i/o 4-bit i/o port. 1-bit or 4-bit read/write and test is possible. individual pins are software configurable as input or output. 4-bit pull-down resistors are software assignable; pull-down re sistors are automatically disabled for output pins. 27?24 (20?17) ? p13.0?p13.2 i/o 3-bit i/o port; characteristics are same as port 9. 7?5 (64?62) ? dtmf o dtmf output. 31 (24) ? i/o serial i/o interface clock signal 15 (8) p0.0 so i/o serial data output 14 (7) p0.1 si i/o serial data input 13 (6) p0.2 btco i/o basic timer clock output 12 (5) p0.3 int0, int1 i external interrupts. the triggering edge for int0 and int1 is selectable. int0 is synchronized to system clock. 4, 3 (61, 60) p1.0, p1.1 int2 i quasi-interrupt with detection of rising edges 2 (59) p1.2 int4 i external interrupt with detection of rising and falling edges. 1 (58) p1.3 tclo0 i/o timer/counter 0 clock output 11 (4) p2.0 tclo1 i/o timer/counter 1 clock output 10 (3) p2.1 clo i/o clock output 9 (2) p2.2 buz i/o 2 khz, 4 khz, 8 khz, or 16 khz frequency output at the watch timer clock frequency of 32.768 khz for buzzer sound 8 (1) p2.3 tcl0 i/o external clock input for timer/counter 0 34 (27) p3.0 tcl1 i/o external clock input for timer/counter 1 33 (26) p3.1 ks0?ks3 ks4?ks7 i/o quasi-interrupt inputs with falling edge detection 51?48 (44?41) 55?52 (48?45) p6.0?p6.3 p7.0?p7.3 note : parentheses indicate pin number for 64 qfp package.
product overview ks57c5532/p5532 (preliminary spec) 1 - 8 table 1 - 1. ks 57c5532/p5532 pin descriptions (concluded) pin name pin type description number share pin v dd ? power supply 32 (25) ? v ss ? ground 64 (57) ? i reset signal 43 (36) ? x in, x out ? crystal, ceramic, or r/c oscillator signal for main system clock. (for external clock input, use x in and input x in 's reverse phase to x out ) 45, 44 (38, 37) ? xt in, xt out ? crystal oscillator signal for subsystem clock. (for external clock input, use xt in and input xt in 's reverse phase to xt out ) 46, 47 (39, 40) ? nc ? no connection (must be connected to v ss ) 30 (23) ? note : parentheses indicate pin number for 64 qfp package.
ks57c5532/p5532 (preliminary spec) product overview 1 - 9 table 1 - 2. overview of ks 57c5532/p5532 pin data pin names share pins i/o type reset value circuit type p0.0?p0.3 , so, si, btco i/o input d-4 p1.0?p1. 3 int0, int1, int2 , int4 i input a-1 p2.0?p2.3 tclo0, tclo1, clo, buz i/o input d-2 p3.0?p3.1 tcl0, tcl1 i/o input d-4 p3.2?p3.3 ? i/o input d-2 p4.0?p4.3 p5.0?p5.3 ? i/o input e-2 p6.0?p6.3 p7.0?p7.3 ks0?ks3 ks4?ks7 i/o input d-4 p8.0?p8.3 ? i/o input d-2 p9.0?p9.3 ? i/o input d-2 p10.0?p10.3 p11.0?p11.3 ? i/o input d-2 p12.0?p12.3 ? i/o input d-6 p13.0?p13.2 ? i/o input d-2 dtmf ? o high impedence g-6 x in , x out xt in , xt out ? ? ? ? ? i ? b nc ? ? ? ? v dd , v ss ? ? ? ?
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