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advanced confidential publication release date: march 28, 2005 revision a0 ISD1700A series multi-message single-chip voice record & playback devices
ISD1700A series - 2 - table of contents 1 general des cription ............................................................................................................ ..4 2 features....................................................................................................................... ...............5 3 block di agram.................................................................................................................. .........6 4 pinout conf igurati on........................................................................................................... .7 5 pin descri ption ................................................................................................................ .........8 6 functional des criptio n ......................................................................................................11 6.1 detailed de scription........................................................................................................... ....11 6.1.1 audio qua lity ...............................................................................................................11 6.1.2 message dura tion........................................................................................................11 6.1.3 flash st orage ..............................................................................................................11 6.2 memory array ar chitecture ....................................................................................................11 6.3 modes of o perati ons............................................................................................................ ..12 7 push-button o perations ....................................................................................................13 7.1 operation overvi ew ............................................................................................................. ..13 7.1.1 record oper ation ........................................................................................................13 7.1.2 playback oper ation .....................................................................................................14 7.1.3 forward oper ation.......................................................................................................14 7.1.4 erase oper ation...........................................................................................................15 7.1.5 reset oper ation...........................................................................................................16 7.1.6 vol operat ion.............................................................................................................17 7.1.7 ft (feed-through) operatio n .....................................................................................17 7.2 valert featur e (opti onal)...................................................................................................... ..17 7.3 sound effect ( se) editing ...................................................................................................... 17 7.3.1 sound effe cts ..............................................................................................................17 7.3.2 entering se mode ........................................................................................................18 7.3.3 se editing ....................................................................................................................1 8 7.3.4 exiting se mode ..........................................................................................................18 7.3.5 sound effect durati on..................................................................................................18 7.4 analog i nputs .................................................................................................................. .......19 7.4.1 microphone i nput ......................................................................................................... 19 7.4.2 anain i nput...................................................................................................................1 9 8 timing di agrams ................................................................................................................ ......20 8.1 record, play and er ase......................................................................................................... .20 9 absolute maximu m ratings ................................................................................................23
ISD1700A series confidential publication release date: march 28, 2005 - 3 - revision a0 9.1 operating conditi ons ........................................................................................................... ..23 10 electrical chara cteristi cs .............................................................................................24 10.1 dc parame ters .................................................................................................................. ....24 10.2 ac para meters.................................................................................................................. .....25 11 typical applicat ion circui ts.............................................................................................26 11.1 good audio design practice s ................................................................................................27 12 die physica l layo ut............................................................................................................ ...28 12.1 isd1740a/ 50a/60a ............................................................................................................... .28 13 ordering info rmatio n .........................................................................................................29 14 version hi story................................................................................................................ ......30
ISD1700A series - 4 - 1 general description the winbond ? ISD1700A chipcorder ? series is a high quality, fully integrated, single-chip multi- message voice record and playback device ideally su ited to a variety of electronic systems. the message duration is user selectable in ranges from 26 seconds to 120 seconds, depending on the specific device. the sampling frequency of each dev ice can also be adjusted from 4 khz to 12 khz with an external resistor, giving the user greater fl exibility in duration versus recording quality for each application. operating voltage spans a range from 2.4 v to 5.5 v to ensure t hat the isd1740a/50a/60a devices are optimized for a wide range of battery or line-powered applications. the isd1740a/50a/60a devices in corporate a proprietary message management system that allows the chip to self-manage address locations for mu ltiple messages. this unique feature provides sophisticated messaging flexibility in a simple push-button environment. the devices include an on- chip oscillator (with external resistor control) , microphone preamplifier with automatic gain control (agc), an auxiliary analog input, anti-aliasing filter, multi-level storage (mls) array, smoothing filter, volume control, pulse width modulation (pwm ) class d speaker driver, and current output. the isd1740a/50a/60a devices also support an optional ?valert? (voice alert) feature that can be used as a new message indicator. with valert, the ic strobes an external led to indicate that a new message is present. four special sound effect lo cations are reserved for audio confirmation of commands, such as ?start record?, ?stop record,? and ?erase.? recordings are stored in on-chip flash memory cells, providing zero-power message storage. this unique single-chip solution is made possible th rough winbond?s patented mult i-level storage (mls) technology. audio data are stored directly in solid-sta te memory without digital compression, providing superior quality voice and music reproduction. voice signals can be fed into the chip through two independent paths: a differential microphone input and a single-ended analog input. for outputs, the isd 1740a/50a/60a devices simultaneously provide a pulse width modulation (pwm) class d speaker driver and a separate current output. the pwm can directly drive a standard 8 ? speaker or a typical buzzer, while the separate single-ended current output can drive an external amplifier. the isd1740a/50a/60a devices aut omatically enter into power down mode for power conservation when an operation is completed. notice: the specifications are subject to change without notice. please contact winbond sales offices or representatives to verify cu rrent or future specifications.
ISD1700A series confidential publication release date: march 28, 2005 - 5 - revision a0 2 features ? integrated message management systems fo r single-chip, push-button applications o rec : level-trigger for recording o pla y : edge-trigger for individual message or level-trigger for sequential playback o erase : edge-triggered erase for first or last mess age or level-triggered erase for all messages o fwd : edge-trigger to advance to the next message or fast message scan during the playback o vol : 8 levels output volume control o rdy: ready or busy status indication o reset : bring back to the default state o automatic power-down after each operation cycle ? selectable sampling frequency controlled by an external oscillator resistor sampling frequency 12 khz 8 khz 6.4 khz 5.3 khz 4 khz rosc 60 k ? 80 k ? 100 k ? 120 k ? 160 k ? ? selectable message duration device isd1740a isd1750a isd1760a duration 26 ~ 80 sec 33 ~ 100 sec 40 ~ 120 sec y message and operation indicators o four customizable sound effects (se) for audible indications o optional valert (voicealert) to i ndicate the presence of new messages o led: stay on during recording, blink dur ing playback, forward and erase operations y two individual input channels o mic+/mic-: differential microphone inputs wi th agc (automatic gain control) o anain: single-ended auxiliary analog i nput for recording or feed-through y dual output channels o pwm class d speaker amplifier to directly drive an 8 ? speaker or a typical buzzer o aud single-ended current output to drive external power amplifier ? chipcorder standard features o high-quality, natural voice and audio reproduction o 2.4v to 5.5v operating voltage o 100-year message retention (typical) o 10,000 record cycles (typical) ? commercial temperature grade: 0 c to +50 c for die only y package options: available in die only
ISD1700A series - 6 - 3 block diagram internal clock timing nonvolatile multi-level storage array power conditioning automatic gain control anti- aliasing filter smoothing filter sampling clock sp+ sp- v cca agc mic- mic+ r osc aud amp v ccd v ssd device control v ssa v ssp1 v ccp others te3 te2 te1 nc rec play erase volume control anain amp mux agc amp anain amp v ssp2 fwd vol led reset rdy ft
ISD1700A series confidential publication release date: march 28, 2005 - 7 - revision a0 4 pinout configuration samples only pdip isd1740a isd1750a isd1760a v ccd play reset rdy fwd v ssa ft led 28 27 26 25 24 23 22 mic- mic+ v cca 21 sp- erase 1 2 3 4 5 6 7 8 9 10 11 12 13 14 20 19 18 17 16 15 rec te1 te3 te2 nc anain v ssp2 v ccp v ssp1 sp+ aud agc vol r osc v ssd
ISD1700A series - 8 - 5 pin description pin name pdip pin no. functions v ccd 1 digital power supply : it is important to have a separate path for each power signal including v ccd , v cca and v ccp to minimize the noise coupling. decoupling capacitors s hould be as close to the device as possible. led 2 led : this output turns on a led during a record cycle and blinks led during playback, forward and erase operations. reset 3 reset : when low, the device enters into a known state and initializes all pointers to the default state. this pin has an internal pull-up resistor [1] . nc 4 nc: no connect. te1 5 test pin #1: connect to v ccd . te2 6 test pin #2: connect to v ccd . te3 7 test pin #3: connect to v ccd . v ssa 8 analog ground : it is important to have a separate path for each ground signal including v ssa , v ssd , v ssp1 and v ssp2 to minimize the noise coupling. anain 9 anain: auxiliary analog input to the devic e for recording or feed-through. an ac-coupling capacitor (typical 0.1uf) is necessary and the amplitude of the input signal shoul d not exceed 1.0 vpp. mic+ 10 mic+: non-inverting input of the di fferential microphone signal. the input signal should be ac-coupled to this pin via a series capacitor. the capacitor value, together with an internal 10 k ? resistance on this pin, determines the low-frequency cutoff for the pass band filter. mic- 11 mic- : inverting input of the differential microphone signal. the input signal should be ac-coupled to the mic+ pin. it provides input noise- cancellation, or common-mode rejection, when the microphone is connected differentially to the device. v ssp2 12 ground for negative pwm speaker driver : it is important to have a separate path for each ground signal including v ssa , v ssd , v ssp1 and v ssp2 to minimize the noise coupling. sp- 13 sp- : the negative class d pwm provides a differential output with sp+ pin to directly drive an 8 ? speaker or typical buzzer. during power down or recording, this pin is tri-stated. v ccp 14 power supply for pwm speaker driver : it is important to have a separate path for each power signal including v ccd , v cca and v ccp to minimize the noise coupling. decoupling capacitors to v ssp1 and v ssp2 should be as close to the device as possible. the v ccp supply and v ssp ground pins have large transient currents and need low impedance returns to the system supply and ground, respectively. sp+ 15 sp+: the positive class d pwm provides a differential output with the sp- pin to directly drive an 8 ? speaker or typical buzzer. during power down or recording, this pin is tri-stated.
ISD1700A series confidential publication release date: march 28, 2005 - 9 - revision a0 pin name pdip pin no. functions v ssp1 16 ground for positive pwm speaker driver : it is important to have a separate path for each ground signal including v ssa , v ssd , v ssp1 and v ssp2 to minimize the noise coupling. aud 17 auxiliary output : aud is a single-ended current output. it can be used to drive an external amplifier. agc 18 automatic gain control (agc) : the agc adjusts the gain of the preamplifier dynamically to com pensate for the wide range of microphone input levels. the agc allows the full range of signals to be recorded with minimal distortion. the agc is designed to operate with a nominal capacitor of 4.7 f connected to this pin. connecting this pin to ground (v ssa ) provides maximum gain to the preamplifier circuitry. conversely, c onnecting this pin to the power supply (v cca ) provides minimum gain to the preamplifier circuitry. vol 19 volume control: this control has 8 steps of volume adjustment. each low pulse decreases the volume by one level. repeated pulses decrease the volume level from the current setting to the minimum then increase back to the maximum, and continue this loop. the factory default is set at maximum. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch. r osc 20 oscillator resistor : a resistor connected from r osc pin to ground determines the sample frequency of the device, which sets the duration. please refer to the duration section for details. v cca 21 analog power supply . it is important to have a separate path for each power signal including v ccd , v cca and v ccp to minimize the noise coupling. decoupling capacitors to v ssa should be as close to the device as possible. ft 22 feed-through: when ft is engaged low, the anain feed-through path is activated. as a result, the anain signal is transmitted directly from anain to both the speaker and aud outputs, vi a the volume control circuit. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch. pla y 23 playback: pulsing pla y to low once initiates a playback operation. playback stops automatically when it reaches the end of the message. pulsing it to low again during playback stops the operation. holding pla y low constantly functions as a sequential playback operation loop. this looping continues until pla y returns to high. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch.
ISD1700A series - 10 - pin name pdip pin no. functions rec 24 record: the device starts recording whenever rec switches from high to low and stays at low. recording stops when the signal returns to high. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch. erase 25 erase: when active, it starts an erase operation. erase operation will take place only when the playback pointer is pos itioned at either the first or last message. pulsing this pin to low enables erase operation and deletes the current message. holding this pin low for more than 3 sec. initiates a global erase operation, and will delete all the messages. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch. fwd 26 forward: when triggered, it advances to the next message from the current location, when the device is in power down status. during playback cycle, pulsing this pin low stops the current playback operation and advances to the next message, and then re-starts the playback operation of the new message. this pin has an internal pull-up device [1] and an internal debounce (t deb ) [2] for start and end, allowing the use of a push button switch. rdy 27 ready : an open drain output. this pin stays low during record, play, erase and forward operations and stays high in power down state. v ssd 28 digital ground : it is important to have a separate path for each ground signal including v ssa , v ssd , v ssp1 and v ssp2 to minimize the noise coupling.. note: [1] 600 k ? [2] tdeb = refer to ac timing
ISD1700A series confidential publication release date: march 28, 2005 - 11 - revision a0 6 functional description 6.1 d etailed d escription 6.1.1 audio quality winbond?s patented chipcorder ? multi-level storage (mls) te chnology provides a natural, high-quality record and playback solution on a si ngle chip. the input voice signals are stored directly in the flash memory and are reproduced in their natural form without any of the compression artifacts caused by digital speech solutions. 6.1.2 message duration the isd1740a/50a/60a devices offer record and playback duration from 26 seconds to 120 seconds. sampling rate and message duration are determined by an external resistor connected to the r osc pin. table 6.1 duration vs. sampling frequency sample rate isd1740a isd1750a isd1760a 12 khz 26 sec 33 sec 40 sec 8 khz 40 sec 50 sec 60 sec 6.4 khz 50 sec 62 sec 75 sec 5.3 khz 60 sec 75 sec 90 sec 4 khz 80 sec 100 sec 120 sec 6.1.3 flash storage the isd1740a/50a/60a devices utilize embedded flash memory to provide non-volatile storage. a message can be retained for a minimu m of 100 years without power. additionally, each device can be re-recorded over 10,000 times (typical). 6.2 m emory a rray a rchitecture the memory array provides storage for four s pecial sound effects (se) and the audio data. the memory array is addressed by rows. a row is the minimum storage resolution by which the memory can be addressed. the memory assignment is handled automatically by the internal message management system. the four sound effects occupy four rows of t he first sixteen rows in the memory array. the minimum storage resolution varies with the sampling frequency, as shown in table 6.2 . table 6.2 minimum storage resolution vs. sampling frequency sampling frequency 12 khz 8 khz 6.4 khz 5.3 khz 4 khz minimum storage resolution 83.3 msec 125 msec 156 msec 187 msec 250 msec for example, at 8 khz sampling frequency, the minimum storage resolution is 125 msec, so, each sound effect (se) is approximately 0.5 seconds l ong. the remaining memory is dedicated to audio data storage.
ISD1700A series - 12 - 6.3 m odes of o perations the isd1740a/50a/60a devices are designed to operate in push-button operation only. push-button operation entails use of the rec , pla y , ft , fwd , erase , vol and reset pins to trigger operations. the internal stat e machine automatically configures the signal path according to the operation requested. in this mode of operation, the internal state machine takes full control of message management. this allo ws the user to record, playback, erase, and forward messages without the needs to know t he exact addresses of the messages storage inside the memory. for additional information, please refer to section 7.
ISD1700A series confidential publication release date: march 28, 2005 - 13 - revision a0 7 push-button operations the user utilizes the rec , pla y , ft , fwd , erase , vol or reset pin to initiate an operation. the device automatically enters the power-down state at the end of a play, rec, erase, fwd, vol, or reset operation. 7.1 o peration o verview after power-on-reset (por), the device is in t he factory default state and two internal record and playback pointers are initialized. (detailed informat ion about these two pointers is provided later in this section.) then, the active analog path c onfiguration is determined by the state of the ft , and by the operation requested (e.g. re cord, playback, or power down). up to four optional sound effects (se1-4) can be programmed into the device to provide audible feedback to alert the user about t he operating status. separately, t he led output provides visual feedback on the operating state even if no sound effects are programmed. a circular message management technique is implemented. recorded messages are stored sequentially into the memory from the beginning to the end in a circular manner. two internal pointers, the record pointer and playback pointer, determine the point at which an operation starts. after power-on or reset , these pointers are initialized as follows: ? if no messages are present, both point to the beginning. ? if messages are present, the record pointer point s to the next available memory location after the last message and the playback pointer poi nts to the beginning of the last recorded message. the playback pointer is a ffected primarily by the fwd operation. the record pointer is updated to the next available memory location after each rec operation. 7.1.1 record operation recording is controlled by the rec . setting this pin low starts a record operation. the device will start recording from the next av ailable location in memory and will continue recording until either the rec is returned high or the memory becomes full. the source of the recording is from either mic or anain, whereas the active analog configuration path is determined by the desired operat ion and the state of the ft . the rec is debounced internally. after recording, the record pointer will move from the last recorded message to the next available address and the playback pointer will be positioned at the beginning of the newly recorded message. it is important for an erase operation to be performed on the desired location before any recording proceeds. also, the power supply must remain on during the entire process of recording. if power is interrupted during record ing, the led will blink seven times, which indicates that something unusual has occurred. in this event, performing a global erase will reset the chip back to its proper state.
ISD1700A series - 14 - message record indicators : a) when rec goes low: ? if present, se1 is played and led flashes once. ? then, the led stays on to indicate that a recording is in progress. b) when rec goes high or when the memory is full: ? if present, se2 is played and the led flashes twice, and then remains off to alert the user that the recording process has been completed. triggering of rec during a play, erase or forward operation is an illegal operation and will be ignored. 7.1.2 playback operation two playback modes are executed by pla y , which is internally debounced. a) edge-trigger mode : pulsing pla y low once initiates a playba ck operation of the current message. playback automatically stops at the end of the message. pulsing pla y again will re-play the message. during playback, the led flashes and goes off when the operation stops. pulsing pla y to low again during playback stops the operation. under these circumstances, the playba ck pointer remains at the star t of the played message after the operation is completed. b) sequential playback mode : if pla y is held low constantly, all messages will be played and looped from the current message to its prev ious message. this looping continues until pla y is released. after each message, se1 is played. after the last message has been played, se2 is played, and then device play s the first message again. during the entire playback operation, the led flashes. when pl ayback stops, the playback pointer will be placed at the start of the halted message. triggering pla y during a record, erase, or forward operation is an illegal operation and will be ignored. 7.1.3 forward operation the fwd allows the user to move the playback pointer to the next message in a forward direction. when the pointer reaches the last me ssage, it will jump back to the first message. hence, the movement is in a circular fashion among the messages. the fwd is debounced internally. the effect of a low-going pulse on the fwd depends on the current state of the device: a) if the device is in power-down state and the current location of the playback pointer is not the last message: the pointer will advance one message and, if present, se1 is played. the led flashes once.
ISD1700A series confidential publication release date: march 28, 2005 - 15 - revision a0 b) if the device is in power-down state and the curr ent location of the play pointer is the last message: the pointer will advance to the first message and, if present, se2 is played. the led will flash twice. c) if the device is currently playing a message that is not the last one: ? playback is halted. ? the playback pointer is advanced one message. ? if present, se1 is played. ? playback of the next message begins. ? the led flashes during this entire process. d) if the device is currently playing a message that is the last one: ? playback is halted. ? the playback pointer is advanced to the first message. ? if present, se2 is played. ? playback of the first message begins. ? the led flashes during this entire process. triggering of the fwd operation during an erase or record operation is an illegal operation and will be ignored. 7.1.4 erase operation erasing individual message takes place only if the pl ayback pointer is at either the first or the last message. erasing individual messages ot her than the first or last message is not possible. however, global erase can be exec uted at any message location and will erase all messages. these two erase modes ar e characterized as follows: a) individual erase : only the first or last messages can be individually erased. pulsing erase low performs actions dependent upon the current location of the playback pointer: ? if the device is idle and the playback pointer is currently pointing to the first message: o first message is erased. o se2, if present, will be played and the led will flash twice. o playback pointer will be updated to point to the new first message (previously, the second message). ? if the device is idle and the playback pointer is currently pointing to the last message: o last message is erased. o se2, if present, will be played and the led will flash twice. o playback pointer will be updated to point to the new last message (previously, the second to last message).
ISD1700A series - 16 - ? if the device is idle and the playback pointer is not currently pointing to the first or last message: o no message is erased. o se3, if present, will be played and the led will flash twice. o play pointer will be unchanged. ? if the device is currently playing the first or last message, pressing erase will delete the current message, as in t he related cases described above. b) global erase : level-triggering this pin at low for more than 2.5 seconds initiates the global erase operation and deletes all messages , except the ses. if ses are present, the device will play se1 three times after erase is held for 2.5 seconds. if erase is not released during the playback of se1, all mess ages will be erased, and the chip will play se4. see figure 7.1 for the operation details. the erase is debounced internally. triggering erase for individual erase during a record or forward operation is an illegal operation and will be ignored. however, triggering erase for an individual erase operation during playback will delete the current played me ssage, if it is the first or last one. erase key is pressed and held 2.5 seconds case 1 : current messge location : 1st or last case 2 : current messge location : not at 1st or last erase 1st or last message play se2 wait play se1 play se1 play se1 global erase play se4 play se3 wait play se1 play se1 play se1 global erase play se4 play se1 3 times to warn for glabal erase to start. release erase key to abort the operation global erase starts here figure 7.1: global erase operation 7.1.5 reset operation a 0.1 f capacitor is recommended to connect reset to ground if a push button switch is used on this pin. when reset is triggered, the device will place both the record and the playback pointers at the last message. when a microcontroller is used for a power-on-reset,
ISD1700A series confidential publication release date: march 28, 2005 - 17 - revision a0 reset must stay active for at least 1 sec after all supply rails reach their proper specifications. 7.1.6 vol operation pulsing vol low changes the volume output. each pulse on vol will decrease the volume until the minimum setting is reached. subsequent pulses will increase the volume until the maximum level is reached and the cycle will start again. there are 8 steps of volume control. each step changes the volume by 4 db. the vol is debounced internally. a reset operation will re-initialize the volume level to the default state, which is the maximum level. 7.1.7 ft (feed-through) operation the ft controls the feed-through path from the input to the output of the chip. when ft is held low, ft mode is enabled. by factory def ault, ft mode will pass anain to spk and aud outputs if the device is idle. it will record anai n to the memory during a record operation. 7.2 v a lert f eature (o ptional ) if this optional feature is enabled, after a record ing operation, the led out put will blink once every few seconds to indicate the presence of a new message. after a subs equent playback operation, the valert will stop flashing. 7.3 s ound e ffect (se) e diting se editing can be accessed via push buttons. the first sixteen addresses are shared equally by four sound effects (se1, se2, se3, and se4). 7.3.1 sound effects the functions of ses are as follows: o se1: beginning of recording, forward or global erase warning o se2: end of recording, single erase or forward from last message o se3: invalid operation o se4: global erase whether or not the ses are programmed, the led will flash accordingly. the led flashes once for se1, twice for se2, and so on. the frequency of flashing depends upon the sampling frequency selected and the power supply level used.
ISD1700A series - 18 - 7.3.2 entering se mode ? first press and hold fwd low for more than 3 seconds. this action on fwd will play se1 and cause the led to blink once (if at t he last message location, the chip will play se2 and the led will blink twice). ? while holding fwd low, press and hold the rec low until the led blinks once. the device is now in se editing mode. ? the led flashing once indicates that se1 is accessible. 7.3.3 se editing ? when in se editing mode, one can perform re cord, play, or erase operation on each se by pressing the appropriate button. for exam ple, to record se, simply press and hold rec . similarly for play and erase functions, press and hold pla y or erase , respectively. ? a fwd operation moves the record and playba ck pointers to the next se sequentially. the led will blink 1~4 times after such operat ions to indicate which se is active. if fwd is pressed while accessing se4, the led will flash once to indicate that se1 is again active. ? while the led is blinking, the device w ill ignore any input commands. the user must wait until the led stops blinking before any re cord, play or erase command can be sent. 7.3.4 exiting se mode ? first press and hold fwd until the led stops blinking. then, simultaneously press and hold the rec low until the led blinks twice and se2 (if present) is played. the device has now exited from se editing mode. 7.3.5 sound effect duration the duration of sound effects is determined by the sampling frequency selected. all sound effects with the same sampling frequency have the same duration. table 8.1 sound effect duration vs. sampling frequency sampling frequency 12 khz 8 khz 6.4 khz 5.3 khz 4 khz duration of se 0.33 sec 0.5 sec 0.625 sec 0.75 sec 1 sec
ISD1700A series confidential publication release date: march 28, 2005 - 19 - revision a0 7.4 a nalog i nputs 7.4.1 microphone input mic + mic - internal to the device mic in ccoup r a fcutoff=1/(2*pi*ra*ccoup) 0.1uf = 7k r a = 7k ccoup 0.1uf agc figure 7.2: mic input impedance (when this path is active) 7.4.2 anain input ccoup 0.1uf internal to the device anain anain input amplifier r a r a fcutoff=1/(2*pi*ra*ccoup) = 42k = 42k figure 7.3: anain input impedance (when the device is powered-up)
ISD1700A series - 20 - 8 timing diagrams 8.1 r ecord , play and erase t f t r t deb rec rdy led t set mic+/-, anain t se1 t stop t se2 t deb figure 8.1: record operation
ISD1700A series confidential publication release date: march 28, 2005 - 21 - revision a0 t f t r t deb rdy led t psetup sp+, sp- t pstop t deb play playback the entire message t f t deb rdy led t psetup sp+, sp- play start playback and stop playback t r t deb t pstop figure 8.2: playback operation
ISD1700A series - 22 - erase with se t f t deb rdy erase t r t deb t estop figure 8.3: erase operation
ISD1700A series confidential publication release date: march 28, 2005 - 23 - revision a0 9 absolute maximum ratings absolute maximum ratings conditions values junction temperature 150c storage temperature range -65c to +150c voltage applied to any pins (v ss ?0.3 v) to (v cc +0.3 v) power supply voltage to ground potential -0.3 v to +7.0 v note: stresses above those listed may cause pe rmanent damage to the devic e. exposure to the absolute maximum ratings may affect dev ice reliability and performance. functional operation is not impli ed at these conditions. 9.1 o perating c onditions operating conditions conditions values operating temperature range 0c to +50c supply voltage (v cc ) [1] +2.4 v to +5.5 v ground voltage (v ss ) [2] 0 v input voltage (v cc ) [1] 0 v to 5.5 v voltage applied to any pins (v ss ?0.3 v) to (v dd +0.3 v) [1] v cc = v cca = v ccd = v ccp [2] v ss = v ssa = v ssd = v ssp1 v ssp2
ISD1700A series - 24 - 10 electrical characteristics 10.1 dc p arameters parameter symbol min typ [1] max units conditions supply voltage v dd 2.4 5.5 v input low voltage v il v ss -0.3 0.3xv dd v input high voltage v ih 0.7xv dd v dd v output low voltage v ol v ss -0.3 0.3xv dd v i ol = 4.0 ma [2] output high voltage v oh 0.7xv dd v dd v i oh = -1.6 ma [2] record current i dd_record 20 ma playback current i dd_playback 20 ma erase current i dd_erase 20 ma v dd = 5.5 v, no load, sampling freq = 12 khz standby current i sb 0.5 1 a v dd = 5.5 v, t=25 c [3] [4] input leakage current i ilpd1 1 a force v dd input current low i ilpd2 -3 -10 a force v ss , others at vcc preamp input impedance r mic+, r mic- 7 k ? power-up agc anain input impedance r anain 42 k ? power-up mic differential input v in1 15 300 mv peak-to-peak [5] anain input voltage v in2 1 v peak-to-peak gain from mic to sp+/- a msp 6 40 db v in = 15~300 mv, agc = 4.7 f, v cc = 2.4v~5.5v speaker output load r spk 8 ? across both speaker pins 670 mw v dd = 5.5 v 313 mw v dd = 4.4 v 117 mw v dd = 3 v speaker output power pout 49 mw v dd = 2.4 v 1vp-p, 1 khz sine wave at anain. r spk = 8 ? . speaker output voltage v out1 v dd v r spk = 8 ? (speaker), typical buzzer aud i aud -3.0 ma v dd =4.5 v, r ext = 390 ? total harmonic distortion thd 1 % 15 mv p-p 1 khz sine wave, cmessage weighted notes: [1] conditions: v cc = 4.5v, 8 khz sampling frequency and t a = 25 c , unless otherwise stated. [2] led output during record operation. [3] v cca , v ccd and v ccp are connected together. v ssa , v ssp1, v ssp2 and v ssd are connected together. [4] rec , pla y , ft , fwd , erase , vol and reset must be at v ccd . [5] balanced input signal applied between mic+ and mic- as s hown in the applications example. single-ended mic+ or mic- input is recommended to be less than 100 mv p-p.
ISD1700A series confidential publication release date: march 28, 2005 - 25 - revision a0 10.2 ac p arameters characteristic symbol min typ [1] max units conditions sampling frequency [2] f s 4 12 khz vcc=2.4 v~5.5v duration [3] t dur section 6.1.2 sec vcc=2.4 v~5.5v, all fs rising time t r 0 100 nsec falling time t f 0 100 nsec 16 msec f s =12 khz 24 msec f s =8 khz 30 msec f s =6.4 khz 37 msec f s =5.3 khz debounce time (rec, play, erase, fwd, vol) t deb 48 msec f s =4 khz vcc=2.4 v~5.5 v reset pulse t reset 1 sec vcc=2.4 v~5.5 v 0.37 sec f s =12 khz 0.54 sec f s =8 khz 0.67 sec f s =6.4 khz 0.80 sec f s =5.3 khz record setup time t rsetup 1.05 sec f s =4 khz vcc=2.4 v~5.5 v, with ses played 0.35 sec f s =12 khz 0.52 sec f s =8 khz 0.65 sec f s =6.4 khz 0.77 sec f s =5.3 khz record stop time t rstop 1.03 sec f s =4 khz vcc=2.4 v~5.5 v, with ses played play setup time t psetup 100 msec vcc=2.4 v~5.5 v, all fs play stop time t pstop 33 msec vcc=2.4 v~5.5 v, all fs 0.34 sec f s =12 khz 0.51 sec f s =8 khz 0.64 sec f s =6.4 khz 0.77 sec f s =5.3 khz erase stop time t estop 1.02 sec f s =4 khz vcc=2.4 v~5.5 v, with ses played aud ramp up time t ru 4 msec vcc=2.4 v~5.5 v aud ramp down time t rd 4 msec vcc=2.4 v~5.5 v led cycle frequency t cyc 1 6 hz playback at any f s notes: [1] typical values: v cc = 4.5 v, sf = 8 khz and @ t a = 25 c , unless otherwise stated. [2] sampling frequency can vary as much as 2.25 percent over the tem perature and voltage ranges. [3] duration can vary as much as 2.25 percent over the commercia l temperature and voltage ranges.
ISD1700A series - 26 - 11 typical application circuits two example circuits illustrate recording via mic and anain inputs, respectively. these examples show typical implementations of isd1740a/50a/60a devices. . example #1: isd1740a isd1750a isd1760a r osc v cca sp+ aud erase play rec agc v ssd v ccd reset ft ana in mic - mic+ nc te1 te2 te3 fwd vol v cca 0.1 f led 1 k ? v ccd * d1 24 23 25 26 19 3 10 11 20 18 2 1 28 17 22 9 v cc v cca v ccd v ccp v ssa v ccp v ssp1 sp- v ssp2 v ccp 0.1 f 0.1 f * * 21 8 14 16 12 15 13 speaker or buzzer 0.1 f * rdy 27 r6 390 ? 0.1 f c5 v cc q1 8050c speaker optional: based upon the applications valert 7 6 5 4 vcc v cc 4.7 f ? 4.7 k 0.1 f 4.7 k ? 0.1 f 4.7 k ? rosc ** 4.7 f ** sample freq [khz]: 12 8 6.4 4 rosc [k ] 60 80 100 160 ? *** *** recording via mic input notes: * these capacitors may be needed in order to optimize for the best vo ice quality, which is also dependent upon the layout of the pc b. depending on system requi rements, they can be 10 f, 4.7 f or other values. please refer to the chipcorder applications section or consult winbond for layout advice. ** for sampling freq at 8 khz, rosc = 80 k ? *** it is important to have a separat e path for each ground and power back to each terminal to minimize the noise. also, the power supplies should be dec oupled as close to the device as possible .
ISD1700A series confidential publication release date: march 28, 2005 - 27 - revision a0 example #2: isd1740a isd1750a isd1760a r osc v cca v ssa v ccp v ssp1 aud rdy erase play rec agc v ssp2 v ssd v ccd reset ft ana in mic - mic+ nc te1 te2 te3 fwd vol 4.7 f v ccp v cca 0.1 f 0.1 f 0.1 f led 1 k ? v ccd c9 * c5 c10 * c6 c4 c8 * c1 r1 d1 s1 s2 s3 s4 s5 s6 24 23 25 26 19 3 10 11 20 18 2 1 28 21 8 14 16 12 15 13 17 27 22 9 7 6 5 4 0.1 f c7 c11 * v cc r2 ** v cca v ccd v ccp 0.1 f c2 vcc *** 390 ? 0.1 f v cc q1 8050c speaker optional: based upon the applications sp+ sp- speaker or buzzer valert *** vcc gnd s7 recording via anain input notes: * these capacitors may be needed in order to optimize fo r the best voice quality, which is also dependent upon the layout of the pc b. depending on system requirement, they can be 10 f, 4.7 f or other values. please refer to chipcorder applications se ction or consult winbond for layout advice. ** for sampling freq at 8 khz, r2 = 80 k ? *** it is important to have a separate path for each ground and power back to the related terminal to minimize the noise. also, the power supplies should be dec oupled as close to the device as possible. 11.1 g ood a udio d esign p ractices to ensure the highest quality of voice reproducti on, it is important to follow good audio design practices in layout and power supply decoupling. see application information or links below for details. good audio design practices http://www.winbond-usa.com/products/isd_produc ts/chipcorder/applicationinfo/apin11.pdf single-chip board layout diagrams http://www.winbond-usa.com/products/isd_produc ts/chipcorder/applicationinfo/apin12.pdf
ISD1700A series - 28 - 12 die physical layout 12.1 isd1740a/50a/60a [1][2] isd1740a isd1750a isd1760a mic- v ccp v ccp v ssp2 sp- aud sp+ v ssp1 agc mic+ anain v ssa v cca rosc vol te1 te2 te3 rec play ft nc reset led v ccd v ssd rdy fwd erase notes: [1] the backside of the die is internally connected to v ssa . it must not be connected to any other potential or damage may occur. [2] please contact the local winbond sales offices or r epresentatives for details on (x,y) coordinates.
ISD1700A series confidential publication release date: march 28, 2005 - 29 - revision a0 13 ordering information product number descriptor key when ordering isd1740a/isd1750a/isd1760a, please refe r to the following valid ordering numbers, which are planned to be supported in volume for th is product series. please consult the local winbond sales representatives for availability information. ordering number part number no valert with valert isd1740a i1740ax i1740ax01 isd1750a i1750ax i1750ax01 isd1760a i1760ax i1760ax01 for the latest product information, please access winbond?s worldwide web site at http://www.wi nbond-usa.com x = die isd17xxa x product family : product series : isd1000 family isd1700 series duration : packaged units / die : 40a = 40 seconds 50a = 50 seconds 60a = 60 seconds special features field: blank = valert disabled 01 = valert enabled
ISD1700A series - 30 - 14 version history version date description a0 march 2005 initial version
ISD1700A series confidential publication release date: march 28, 2005 - 31 - revision a0 headquarters winbond electronics corporation america winbond electronics (shanghai) ltd. no. 4, creation rd. iii 2727 north first street, san jose, 27f, 299 yan an w. rd. shanghai, science-based industrial park, ca 95134, u.s.a. 200336 china hsinchu, taiwan tel: 1-408-9436666 tel: 86-21-62365999 tel: 886-3-5770066 fax: 1- 408-5441797 fax: 86-21-62356998 fax: 886-3-5665577 http:// www.wi nbond-usa.com/ http://www. winbond.com.tw/ taipei office winbond electronics corporat ion japan winbond electronics (h.k.) ltd. 9f, no. 480, pueiguang rd. 7f daini-ueno bldg. 3-7-18 unit 9-15, 22f, millennium city, neihu district shinyokohama kohokuku, no. 378 kwun tong rd., taipei, 114 taiwan yokohama, 222-0033 kowloon, hong kong tel: 886-2-81777168 tel: 81-45-4781881 tel: 852-27513100 fax: 886-2-87153579 fax: 81-45-4781800 fax: 852-27552064 please note that all data and specifications are subject to change without notice. all the trademarks of products and companies mentioned in this datasheet belong to their respective owners. the contents of this document are provided only as a guide for the applications of winbond products. winbond makes no representation or warranties with respect to the accuracy or completeness of the c ontents of this publication and reserves the right to discontinue or make changes to specif ications and product descriptions at any time without notice. no license, whether express or implied, to any intellectual property or other right of winbond or others is granted by this publication. except as set forth in winbond's standard terms and conditions of sale, winbond assumes no liability whatsoever and disclaims any express or implied warrant y of merchantability, fitness for a particular purpose or infringement of any intellectual property. the contents of this document are pr ovided ?as is?, and winbond assumes no liability whatsoever and disclaims any express or implied warranty of merchant ability, fitness for a particular purpose or infringement of any intellectual property. in no event, shall winbond be liable for any damages w hatsoever (including, wit hout limitation, damages for loss of profits, business interruption, loss of information) arising out of the use of or inability to use the contents of this documents, even if winbond has been advised of the possibility of such damages. winbond products are not designed, intended, authorized or warranted for use as components in systems or equipments intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or fo r other applications intended to support or sustain life. furthermore, winbond products are not int ended for applications wherein failure of winbond products could result or lead to a situation wher ein personal injury, death or severe property or environmental injury could occur. application examples and alternative uses of any integrated circuit contained in this publication are for illustration only and winbond makes no representation or warranty that such applications shall be suitable for the use specified. the 100-year retention and 10k record cycle projections ar e based upon accelerated reliability tests, as published in the winbond reliability report, and are neither warranted nor guaranteed by winbond. this product incorporates superflash ? technology. this datasheet is subject to change without notice. information contained in this winbond chipcorder ? datasheet supersedes all data for the isd ? chipcorder ? products published by isd ? prior to august 1998. this datasheet and any future addendum to this data sheet is (are) the complete and controlling isd ? chipcorder ? product specifications. in the event any inconsistenc ies exist between the information in this and other product documentation, or in the event that other product documentat ion contains information in addition to the information in this, the information contained herein supersedes and gov erns such other information in its entirety. copyright? 2005, winbond electronics corpor ation. all rights reserved. isd ? and chipcorder ? are registered trademarks of winbond electronics corporation. superflash ? is the trademark of silicon storage technology, inc. all other trademarks are properties of their respective owners.

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