TESDO5V0A ultra low capacitance esd protection array small signal diode ? meet iec61000-4-4 (eft) rating. 40a (5/50 ?s) ? meet iec61000-4-5 (lightning) rating. 5a (8/20 s) ? protects four high speed i/o lines ? low working voltage : 5v ? case : msop-10 small outline plastic package min max min max 2.90 3.10 0.114 0.122 2.90 3.10 0.114 0.122 0.17 0.27 0.007 0.011 - 1.11 - 0.044 part no. package packing marking TESDO5V0A msop-10 3k / 7" reel r0544 maximum ratings electrical characteristics 1ma 5v 1a 5a 1(typ.) dimensions unit (mm) unit (inch) a c f 0.50 ref 0.020 ref w maximum ratings and electrical characteristics features mechanical data ? terminal: matte tin plated, lead free, solderable per mil-std-202, method 208 guaranteed ? pb free version, rohs compliant, and halogen free packing code ? meet iec61000-4-2 (esd) 15kv (air), 8kv (contact) b type number symbol value 4.9 ref 0.193 ref rog units a ? marking code : r0544 ? high temperature soldering guaranteed: 260 c/10s ? polarity : indicated by cathode band ? weight : 12mg (appro.) pin configuration rating at 25c ambient temperature unless otherwise specified. p pp ordering information peak pulse power (tp=8/20 s waveform) esd per iec 61000-4-2 (air) esd per iec 61000-4-2 (contact) v esd 15 1 8 peak pulse current (tp = 8/20 s) i pp 5 125 kv junction and storage temperature range t j , t stg . -55 to + 150 . c units reverse stand-off voltage v rwm -5v type number symbol min max reverse leakage current v r =i r - reverse breakdown volta i r =v (br) 6 junction capacitance v r =0v, f=1.0mhz c j 15 i pp = -2 0 clamping voltage i pp = vc msop-10 pf v - -v d e 1u a 1 io# 2 io# 3 gnd 5 io# 4 io# 10 nc 9 nc 8 vcc 6 nc 7 nc b a c c f e d version : a11
TESDO5V0A ultra low capacitance esd protection array small signal diode rating and characteristic curves 0.01 0.1 1 10 0.1 1 10 100 1000 peak pulse power ppp (kw) fig 2 pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 percent of i pp fig 3 admissible power dissipation curve 0 25 50 75 100 125 150 0 20 40 60 80 100 120 140 160 180 power rating (%) pulse duration (us) time (us) ambient tempeatature ( o c) fig 4 typical junction capacitance 0 0.2 0.4 0.6 0.8 1 012345 normalized capacitance 0 4 8 12 16 20 012345 clamping voltage (v) fig 5 clamping voltage vs. peak pulse current peak pulse current (a) waveform parameters: tr = 8 s, td = 20s fig 1 non-repetitive peak pulse power vs. pulse time reverse voltage (v) waveform parameters: tr = 8 s, td = 20s f = 1.0mhz td=ipp/2 e -1 version : a11
TESDO5V0A ultra low capacitance esd protection array small signal diode applications information circuit board layout recommendations for hdmi application ? each device is in a leadless package that is less than 1.1mm wide ? designed such that the traces flow straight through the device, the narrow package and flow-through design reduces discontinuities and minimizes impact on signal integrity ? the combination of small size, low capacitance, and high level of esd protection makes them a flexible solution for applications of high speed interface, ex hdmi, displayporttm, mddi, and esata interfaces. ? TESDO5V0A is ultra low capacitance esd protection array designed to protect high speed data interfaces ? the pcb traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6) ? signal line enters at pin 1 and exits at pin 10 and the pcb trace connects pin 1 and 10 together. ground is connected at pins 3 and 8. ? one large ground pad should be used in lieu of two separate pads ? ultra low capacitance between the pairs while being rated to handle >8kv esd contact discharges and >15kv air discharge ? designed for protection of high-speed interfaces such as hdmi tmds d2+ tmds _ gnd tmds d2- tmds d1+ tmds _ gnd tmds d1- tmds d0+ tmds gnd tmds _ d0- tmds clk tmds gnd tmds _ clk- cec n/c ddc cl k ddc da t gnd +5v hot plug detection tesdov0 a TESDO5V0A tesds5v0a 1 2 3 4 5 10 9 8 7 6 1 2 3 4 5 10 9 8 7 6 version : a11 hdmi connector
TESDO5V0A ultra low capacitance esd protection array small signal diode tape & reel specification suggested pad layout note 1: a 0 , b 0 , and k 0 are determined by component size. the clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. the component cannot rote more than 10 o within the determined cavity. note 2: if b 1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. note 3: the suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. carrier depth k 1.22 max. item symbol dimension (mm) sprocket hole d 1.50 +0.10 reel outside diameter a 180 1 reel inner diameter d1 50 min. feed hole width d2 13.0 0.5 sprocke hole position e 1.75 0.10 sprocke hole pitch p0 4.00 0.10 embossment center p1 2.00 0.10 overall tape thickness t 0.6 max. tape width w 8.30 max. reel width w1 14.4 max. dimensions unit (inch) unit (mm) a 0.161 4.10 b 0.012 0.30 c 0.020 0.50 d 0.063 1.60 e 0.098 2.50 f 0.224 5.70 top cover tape carieer ta p e a n y additional label ( if re q uired ) t sc l abe l direction of feed d a c b e f w1 d1 d2 a version : a11 for machine reference only including draft and radll concentric around b 0 t top cover tape see n ote 1 b0 k center lines of cavity f e w for components 2.0mm x 1.2mm and larger d' d p1 10 pitches cumulative tolerance on tape 2.0mm ( 0.008" ) b 0 embossment a 0 k 0 b 1 p0
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