aod478/AOI478 100v n-channel mosfet general description product summary v ds i d (at v gs =10v) 11a r ds(on) (at v gs =10v) < 140m w r ds(on) (at v gs = 4.5v) < 152m w 100% uis tested 100% r g tested symbol v ds the aod478/AOI478 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for boost converters and synchronous rectifiers for consumer, telecom, industrial power supplies and le d backlighting. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v drain-source voltage 100 g d s to252 dpak top view bottom view g s d g s d g g d d s s top view bottom view to251a ipak v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc mj maximum junction-to-ambient a c/w r q ja 17 55 t c =25c 2.1 23 t c =100c 25 parameter typ max units junction and storage temperature range -55 to 175 c thermal characteristics v a 10 drain-source voltage 100 v 20 gate-source voltage 24 pulsed drain current c continuous drain current avalanche current c 2 continuous drain current 5 2.5 avalanche energy l=0.1mh c a t a =25c i dsm a t a =70c i d 11 8 t c =25c t c =100c power dissipation b p d w power dissipation a p dsm w t a =70c 45 1.3 t a =25c maximum junction-to-case c/w c/w maximum junction-to-ambient a d 2.7 60 3.3 rev 1: nov. 2011 www.aosmd.com page 1 of 6
aod478/AOI478 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.7 2.2 2.8 v i d(on) 24 a 116 140 t j =125c 225 270 121 152 m w g fs 17 s v sd 0.76 1 v i s 12 a c iss 350 445 540 pf c oss 18 29 35 pf c rss 9 16 23 pf r g 1 2 3 w q g (10v) 8 10.3 13 nc q g (4.5v) 4 5.1 6.5 nc q gs 1.6 nc q gd 2.4 nc t d(on) 8 ns t 3 ns turn-on rise time i s =1a,v gs =0v switching parameters maximum body-diode continuous current g input capacitance r ds(on) static drain-source on-resistance diode forward voltage v =10v, v =50v, r = 8.6 w , reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz v gs =10v, v ds =50v, i d =4.5a gate source charge gate drain charge total gate charge v gs =10v, v ds =5v on state drain current gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v ds =5v, i d =4.5a output capacitance turn-on delaytime dynamic parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss drain-source breakdown voltage i d =250 m a, v gs =0v m a zero gate voltage drain current gate-body leakage current forward transconductance v ds =v gs i d =250 m a v ds =0v, v gs = 20v m w v gs =10v, i d =4.5a v gs =4.5v, i d =3a t r 3 ns t d(off) 17 ns t f 4.5 ns t rr 14.5 21 27.5 ns q rr 68 97 126 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. turn-on rise time body diode reverse recovery charge i f =4.5a, di/dt=500a/ m s turn-off delaytime body diode reverse recovery time i f =4.5a, di/dt=500a/ m s v gs =10v, v ds =50v, r l = 8.6 w , r gen =3 w turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 175 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =175 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 1: nov. 2011 www.aosmd.com page 2 of 6
aod478/AOI478 typical electrical and thermal characteristics 17 52 10 0 18 0 3 6 9 12 15 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 100 120 140 160 180 0 2 4 6 8 10 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =3a v gs =10v i d =4.5a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3.5v 4v 6v 4.5v 10v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 100 120 140 160 180 200 220 240 260 280 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =4.5a 25 c 125 c rev 1: nov. 2011 www.aosmd.com page 3 of 6
aod478/AOI478 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 2 4 6 8 10 12 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 100 200 300 400 500 600 700 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 240 280 320 360 400 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction - to - c oss c rss v ds =50v i d =4.5a t j(max) =175 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased safe 10 m s 10ms 1ms dc r ds(on) limited t j(max) =175 c t c =25 c 100 m s 40 figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 9: maximum forward biased safe operating area (note f) r q jc =3.3 c/w rev 1: nov. 2011 www.aosmd.com page 4 of 6
aod478/AOI478 typical electrical and thermal characteristics 17 52 10 0 18 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 3 6 9 12 15 0 25 50 75 100 125 150 175 current rating i d (a) t case (c) figure 14: current de - rating (note f) 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c 1 10 100 1 10 100 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note h) r q ja =60 c/w rev 1: nov. 2011 www.aosmd.com page 5 of 6
aod478/AOI478 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev 1: nov. 2011 www.aosmd.com page 6 of 6
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