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data sheet conexant 100776a proprietary information and specifications are subject to change october 8, 1999 RF133 rf/if transceiver for gsm applications the RF133 rf/if transceiver is a highly integrated, monolithic device optimized for use in gsm and other tdma single-band or multi-band applications. the receive path of the device consists of three intermediate frequency (if) amplifiers with selectable gain, an i/q demodulator, baseband filters, dc offset compensation circuitry, and selectable gain baseband amplifiers. the transmit path of the device consists of an i/q modulator and a frequency translation loop designed to perform frequency up-conversion with high output spectral purity. the translation loop consists of a phase/frequency detector, a charge-pump, a mixer, and buffers for the required isolation between the rf input, local oscillator (lo), and if inputs. the device package and pin configuration are shown in figure 1. a block diagram of the RF133 is shown in figure 2. the signal pin assignments and functional pin descriptions are found in table 1. 1 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 c100a gnd tlcpo vcc vcc gnd txifin+ txifin? gnd txi+ txi? txq+ txq? txmo+ txmo? rxi+ rxi? rxq+ rxq? t/h cth1 cth2 gnd lo2o+ lo2o? txena txrfin+ txrfin? vcc lo1in+ lo1in? gnd rfifn+ rfifn? rxena le clk data rxiff+ rxiff? sxena bpc gnd vcc res2 res1 vcc lpfadj vcc figure 1. RF133 pin configuration ? 48-pin tqfp features ? quadrature demodulator for downconversion ? 80 db if gain range and 30 db baseband gain range ? integrated receive baseband filters with tunable bandwidth ? integrated transmit path with high phase accuracy ? reduced filtering requirements for the transmit path ? broad rf and if range for multi-band operation ? integrated selectable local oscillator dividers/phase shifters and selectable high/low-side injection for frequency plan flexibility ? on-chip second local oscillator ? separate enable lines for transmit, receive, and synthesizer modes for power management ? 48-pin thin quad flat pack (tqfp) package (7mm x 7mm) applications ? gsm900/dcs1800/pcs1900 digital cellular telephony ? multi-mode, multi-band terminals
RF133 rf/if transceiver 2 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change c068 bias 3-wire control +20 db 0 db ? 10 db +20 db +18 db pga rx sx rx sx sx tx sx tx res1 res2 rxif+ rxif ? bpc lo1in+ lo1in ? txrfin+ txrfin ? tlcpo rxi+ rxi ? rxq+ rxq ? cth1 cth2 t/h rxena txena sxena clk data txmo ? txmo+ txifin ? txifin+ le lo2o+ lo2o ? txi+ txi ? txq+ txq ? pgb ? 10 db dc oc 90 ? +20 db +18 db pgc rxiff+ rxiff lpfadj pgd 0/10/20/30 db pfd chp 90 ? ? ? ? ? ? ? ? ? ? ? figure 2. RF133 block diagram
rf/if transceiver RF133 100776a conexant 3 proprietary information and specifications are subject to change october 8, 1999 table 1. RF133 signal descriptions pin # name description pin # name description 1 gnd ground (tx phase detector/charge pump) 25 vcc supply (2 nd lo output buffers) 2 tlcpo translation loop charge pump output 26 lpfadj adjustment pin for baseband low pass filter corner frequency 3 vcc supply (phase detector and charge pump) 27 vcc supply (2 nd lo) 4 vcc supply (tx modulator, rx baseband sections) 28 res1 resonator pin 5 gnd ground (tx modulator, rx baseband sections) 29 res2 resonator pin 6 txifin+ tx if input 30 vcc supply (2 nd lo) 7 txifin? tx if input 31 gnd ground (2 nd lo) 8 gnd ground 32 bpc bypass capacitor 9 txi+ tx modulator input 33 sxena synthesizer enable 10 txi? tx modulator input 34 rxiff? rx if filter pin 11 txq+ tx modulator input 35 rxiff+ rx if filter pin 12 txq? tx modulator input 36 data data input 13 txmo+ tx modulator output 37 clk clock input 14 txmo? tx modulator output 38 le latch enable input 15 rxi+ rx baseband output 39 rxena receiver enable 16 rxi? rx baseband output 40 rxifin? rx if input 17 rxq+ rx baseband output 41 rxifin+ rx if input 18 rxq? rx baseband output 42 gnd ground (tx mixer, rx if sections) 19 t/h track and hold signal 43 lo1in? 1 st local oscillator input 20 cth1 capacitor for track and hold 44 lo1in+ 1 st local oscillator input 21 cth2 capacitor for track and hold 45 vcc supply (tx mixer, rx if sections) 22 gnd ground (2 nd lo output buffers) 46 txrfin? transmit rf input 23 lo2o+ 2 nd local oscillator output 47 txrfin+ transmit rf input 24 lo2o? 2 nd local oscillator output 48 txena transmit enable technical description the rf 133 rf/if transceiver unit is comprised of a receive path, a transmit path, and a synthesizer section as shown in figure 2. the receive path consists of a selectable gain if chain, a quadrature demodulator, and baseband amplifier circuitry with i and q outputs. the transmit path is essentially an i/q modulator with a translation loop for frequency up- conversion. an on-chip oscillator and frequency dividers make up the synthesizer section. each section of the rf 133 is separately enabled via the enable signals: txena, rxena, and sxena. to control different modes of operation, a serial 21-bit word (bits s1 to s21) is written to the on-chip registers. this 21-bit word is programmed using the three-wire input signals, clk, data, and le. to ensure that the data remains latched, either one of the signals txena, rxena, or sxena must stay enabled. the operating mode that draws the least current (12 ma) is the synthesizer mode (i.e., the mode that results when only sxena is enabled) (refer to table 5). in the sleep mode, the device typically draws less than 1 a of current. the block diagram in figure 3 shows a complete rf/if dual- band transceiver chipset using the RF133. receive path _______________________________________ selectable gain if chain and quadrature mixer . the receive path of the RF133 is composed of an if section and a baseband section. the if section consists of three programmable gain amplifiers: pga, pgb, and pgc.
RF133 rf/if transceiver 4 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change pfd chp 3 wire control bias dc oc pgb pga pgc pgd pgd dual pll combiner cth1 cth2 loop filter tx dcs vco tx gsm vco tx ena t/h rx ena sx ena rxi rxq txi txq clk data le c453 lpf lpf tx if filter 90 ? 90 ? 2 4 2 4 1 2 1 2 2 4 rf210 lna/image reject mixer if saw filter tx/rx vco uhf vco gsm rx filter dcs rx filter RF133 tx/rx vco tank lc tank diplexer coupler t/r antenna rm008 rf142 vapc t/r figure 3. dual-band transceiver chipset using the RF133 pga has two gain settings, either 0 db or 20 db, whereas both pgb and pgc have a gain range of -10 db to 20 db programmable in 2 db steps. the output of pgc is fed to a quadrature mixer. the quadrature mixer has a fixed conversion gain of 10 db and its lo inputs are taken from the outputs of a quadrature divider (divide by 2 or 4). baseband integrated filters, baseband amplifiers, and dc offset compensation . immediately following the quadrature mixer (demodulator) is the baseband section (dc offset compensation circuitry, two integrated baseband filters and two programmable gain amplifiers). each programmable gain amplifier in the baseband section, both labelled pgd, has four different gain settings: 0 db, 10 db, 20 db, or 30 db. the corner frequency of the integrated baseband filters is adjustable by using an appropriate value resistor at pin 26, lpfadj. at the nominal cutoff frequency of 105 khz, the resistor value is 75.1 k ? . due to possible high gain of the baseband amplifiers (pgd), any dc offsets at the outputs of the quadrature mixer are amplified and, if uncorrected, the i and q outputs can suffer from significant unwanted dc offset voltages. to cancel out these effects, the RF133 must be calibrated. during compensation, the correction voltages are stored in external hold capacitors cth1 and cth2, then the loop is opened immediately thereafter. the corrected i and q outputs are then fed directly to external circuitry for further baseband processing. the timing diagram for this calibration sequence in reference to the receive slot is shown in figure 4 (the front-end mixer is assumed to be rockwell?s rf210 dual-band, image reject downconverter). at first, the RF133 receiver is turned on (rxena is high). after time t1, the track and hold signal, t/h, places the dc compensation circuitry in the track mode for time t2. then, there is a settling time, t3, before the external front- end is turned on. finally, the front-end must be turned on for time t4 before the receive slot. time t2 can vary from 10 sec to 350 sec. this duration is dependent on 1) the value of the hold capacitors (cth1 and cth2), and 2) whether the calibration is done from frame to frame or from a cold start. this is tabulated in table 2.
rf/if transceiver RF133 100776a conexant 5 proprietary information and specifications are subject to change october 8, 1999 t1 rx slot rxena t/h front-end enable (external to RF133) tdma slots t2 t3 t4 c064 figure 4. RF133 sample and hold timing diagram table 2. minimum required dc offset calibration time t2 and droop rate hold capacitor (cth1, cth2) 22 nf 120 nf cold start 60 sec 350 s frame-to-frame 10 sec 60 s typical droop-rate (@ i/q outputs) 1 mv/msec 0.17 mv/ms because of on-chip loading currents, the hold capacitors (cth1 and cth2) slowly discharge causing the i and q dc offset voltages to droop if the RF133 remains uncalibrated for an extended period of time (the droop rate versus the hold capacitor is also shown in table 2). to rectify this voltage droop, it is recommended that recalibration occur before every receive slot (i.e., every 4.6 ms for gsm). internal voltage controlled oscillator (vco) and frequency dividers . the differential vco output is buffered and then fed to three frequency dividers (rx, tx, pll) with a selectable divide ratio of either 2 or 4. the rx and tx dividers are both quadrature dividers, which generate in-phase and quadrature los. the buffered pll divider output can be used to drive an external pll ic. the resonant element of the vco is connected to pins 28 (res1) and 29 (res2). figure 5 shows the vco configuration. transmit path_______________________________________ the transmit path consists of the following functional blocks: ? an i/q modulator with if output amplifier. ? a translation loop circuit consisting of a phase/frequency detector, a charge pump, a tx rf input buffer, an lo input buffer, a mixer, two dividers, and a low pass filter. the inputs to the i/q modulator are differential i and q baseband signals which are low-pass filtered and then applied to a pair of double balanced mixers (see figure 2). the outputs of the mixers are combined to produce a modulated signal which is then filtered externally and input through pins 6 and 7 (txifin+ and txifin-) to the reference divider in the translation loop. the translation loop circuit together with the external transmit vco, external lo, and loop filter, form a pll with a mixer in the feedback loop. this pll upconverts the modulated if signal to the transmit frequency which then drives the final power amplifier. since inherent bandpass filtering occurs in the pll, the need for a post pa duplexer is removed. this is the major advantage a translation loop approach has over the conventional upconversion scheme. the elimination of this duplexer reduces the loss in the transmit path which in turn reduces the output level of the final power amplifier and, therefore, reduces the current consumption. immediate benefits of this approach are increased handset talk time and standby time, and less component count.
RF133 rf/if transceiver 6 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change vcc external resonator RF133 res1 (pin 28) res2 (pin 29) vtune c321 figure 5. RF133 internal vco table 3. absolute maximum ratings parameter minimum maximum units ambient operating temperature ?40 +85 c storage temperature ?50 +125 c power dissipation 600 mw supply voltage (vcc) 0 +5 v input voltage range gnd vcc v the charge pump current can be programmed to be either 1 ma or 0.5 ma and the translation loop can also be programmed to allow for high side or low side injection of the first lo input with respect to the transmit rf. even greater flexibility in the transceiver frequency planning is possible because of the programmable dividers in the feedback and the reference paths. the absolute maximum ratings of the RF133 are provided in table 3, and the electrical specifications are provided in table 4. tables 5, 6, and 7 detail the setting of the programmable operation modes. figure 6 illustrates the timing of the three-wire bus control signal and figure 7 provides a graph of the input compression versus the receiver gain. figure 8 shows a typical application circuit diagram. figure 9 provides the package dimensions for the 48-pin device.
rf/if transceiver RF133 100776a conexant 7 proprietary information and specifications are subject to change october 8, 1999 table 4. RF133 electrical specifications (1 of 4) (ta = 25 c, vcc = 3.0 v, except where noted) parameter symbol test condition min typ max units receive if path input impedance z in differential 1k// 0.15 ? pf input operating frequency f in 70 450 mhz voltage gain a v a v f in = 400 mhz high gain mode low gain mode 57 ?23 60 ?20 63 ?17 db db gain step (note 1) da v 2db gain step accuracy (note 2) ?0.5 +0.5 db single-sideband noise figure nf nf high gain mode low gain mode 7 23 db db input 1 db compression point (note 3) p 1db p 1db high gain mode (60 db) low gain mode (?20 db) ?75 ?12 dbv dbv if filter pin impedance z if differential 600// 1 ? pf i/q demodulator voltage gain (quadrature mixer) a v 10 db i/q amplitude imbalance 1db i/q phase imbalance ?3 +3 degrees noise figure nf 15 db output 1 db compression point ?2 dbv baseband filter corner frequency (programmable) f c 50 150 khz corner frequency variation df c ?15 +15 % rejection f c = 105 khz: @200 khz @400 khz @600 khz 26 8 30 40 db db db group delay f c = 105 khz: dc to 100 khz 3 5 s group delay variation f c = 105 khz: dc to 100 khz 300 500 ns baseband amplifier voltage gain a v 0 10 20 30 db db db db
RF133 rf/if transceiver 8 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change table 4. RF133 electrical specifications (2 of 4) (t a = 25 c, vcc = 3.0 v, except where noted) parameter symbol test condition min typ max units baseband amplifier (continued) output amplitude a v = 30 db av = 20 db av = 10 db a v = 0 db 2.5 1.8 1.0 0.4 vp-p vp-p vp-p vp-p output common mode voltage 1.35 v output offset voltage with dc offset compensation without dc offset compensation and a v = 0 db 5 100 mv mv output voltage droop/rise rate with dc offset compensation, c th = 22 nf 1mv/ ms output impedance z out differential 200 ? i/q modulator input impedance z in differential 20 k ? input common mode voltage range v cm 0.85 1.35 vcc ? 1.35 v input offset voltage v os 15mv input frequency 3 db bandwidth 10 mhz input common mode rejection ratio f in = 100 khz f in = 1 mhz 75 55 db db output operating frequency f out 70 450 mhz output impedance z out differential 800 ? output voltage v out ?20 ?15 dbv output noise power n o 10 mhz offset ?130 ?126 dbc/hz lo feedthrough ?45 ?40 dbc sideband suppression 40 50 dbc spurious (note 4) @ 200 khz offset @ 300 khz offset ?70 ?60 ?40 ?45 dbc dbc translation loop transmit frequency (input from vco) f tx 800 2000 mhz lo input frequency f lo 800 2000 mhz if frequency f if f if with divide-by-2 with divide-by-1 70 70 425 300 mhz mhz transmit input power p in with external 50 ? termination ?13 -10 ?7 dbm transmit input impedance (at pin 47) z in with pin 46 ac grounded 300// 0.3 ? pf lo input power with external 50 ? termination p in ?13 -10 ?7 dbm lo input impedance (at pin 44) z in with pin 43 ac grounded 300// 0.3 ? pf
rf/if transceiver RF133 100776a conexant 9 proprietary information and specifications are subject to change october 8, 1999 table 4. RF133 electrical specifications (3 of 4) (t a = 25 c, vcc = 3.0 v, except where noted) parameter symbol test condition min typ max units translation loop (continued) charge-pump output current i out source/sink (cpoi = high) source/sink (cpoi = low) high impedance input 1.0 0.5 0.02 ma ma ma transmit output zero crossing spurs: 2x spurs 3x spurs 4x spurs 5x spurs ?62 ?65 ?70 ?70 < ?70 dbc dbc dbc dbc transmit output noise level (note 5) at 20 mhz offset from carrier ?165 ?162 dbc/hz device turn-on and lock time (with respect to enable input) 30 100 s vco operating frequency set by resonator f vco 300 900 mhz tuning voltage range varactor ground referenced varactor supply referenced 0.3 vcc? 0.3 v v resonator pin impedance differential 10k// 0.4 ? pf tuning sensitivity (note 6) k vco fvco = 800 mhz 50 mhz/v lo phase noise at 10 mhz offset (note 6) fvco = 800 mhz q = 20 ?122 dbc/hz second lo output level unloaded, per side 260 mvp second lo output impedance differential 200 ? 3-wire control data to clock setup time (note 7) t cs 50 ns data to clock hold time (note 7) t ch 10 ns clock pulse width high (note 7) t cwh 50 ns clock pulse width low (note 7) t cwl 50 ns clock to load enable setup time (note 7) t es 50 ns load enable pulse width (note 7) t ew 50 ns
RF133 rf/if transceiver 10 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change table 4. RF133 electrical specifications (4 of 4) (t a = 25 c, vcc = 3.0 v, except where noted) parameter symbol test condition min typ max units transceiver dc offset calibration timing (see figure 4): t1 t2 (see table 2) t3 t4 (assuming rf210 front-end mixer) 40 5 20 s s s s enable and control vih v ih vcc 0.8 v enable and control vil v il vcc 0.2 v enable and control iih i ih 20 60 a enable and control iil i il ?10 ?1 0 a total supply current: rx mode tx mode synthesizer mode sleep mode (v cc = 5.0 v) i cc (sxena=rxena=on) (sxena=txena=on) (sxena=on) 52 54 17 0.1 ma ma ma ma power supply range (transceiver vcc) vcc 2.7 3.0 5.0 v operating temperature range t a ?40 +25 +85 c note 1 : gain steps are such that monotonicity is maintained throughout the entire if gain range. note 2 : specified down to 2.8 v supply voltage. slight degradation at temperature extremes for 2.7 v supply voltage. note 3 : refer to figure 7 for the 1 db compression point of the entire receiver chain, including the baseband gain section. note 4 : for 1 vp-p 100 khz differential signals acorss lin and qin. note 5 : using transmit vco with similar characteristics as murata mqe 550-902. note 6 : using varactors with similar characteristics as alpha part smv1234-004. note 7 : refer to figure 6.
rf/if transceiver RF133 100776a conexant 11 proprietary information and specifications are subject to change october 8, 1999 table 5. RF133 control bits and output states block c0 bit state 1 0 lo 1 s1 s2 s3 rx lo 2/ 4 2nd lo 2/ 4 tx lo 2/ 4 divide by 4 divide by 4 divide by 4 divide by 2 divide by 2 divide by 2 tl 1 s4 s5 s6 s7 tx if 1/ 2 tx mix out 1/ 2 tx lo injection cp output current divide by 2 divide by 2 high side 1 ma divide by 1 divide by 1 low side 0.5 ma receive 1 s8 s9 s10 s11 s12 s13 s14 s15 s16 s17 s18 rx pga1 rx pgb1 rx pgb2 rx pgb3 rx pgb4 rx pgc1 rx pgc2 rx pgc3 rx pgc4 rx pgd1 rx pgd2 (see table 6) (see table 6) (see table 6) (see table 6) (see table 6) (see table 6) (see table 6) (see table 6) (see table 6) (see table 7) (see table 7) trx 1 s19 trx band high band low band 1 s20 reserved 1 s21 lo buffer on/off on off
RF133 rf/if transceiver 12 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change table 6. receive if gain gain (db) pga pgb pgc 112341234 60 111111111 58 111101111 56 111011111 54 111001111 52 110111111 50 110101111 48 110011111 46 110001111 44 101111111 42 101101111 40 101011111 38 101001111 36 100111111 34 100101111 32 100011111 30 100001111 28 010011111 26 010001111 24 001111111 22 001101111 20 001011111 18 001001111 16 000111111 14 000101111 12 000011111 10 000001111 8 000001110 6 000001101 4 000001100 2 000001011 0 000001010 ?2 000001001 ?4 000001000 ?6 000000111 ?8 000000110 ?10000000101 ?12000000100 ?14000000011 ?16000000010 ?18000000001 ?20000000000
rf/if transceiver RF133 100776a conexant 13 proprietary information and specifications are subject to change october 8, 1999 table 7. receive baseband gain gain (db) pgd 12 30 1 1 20 1 0 10 0 1 000 c075 data clock le s21 s20 s1 c0 t cs t cwh t cwl t ch t ew t es figure 6. RF133 timing diagram -90 -80 -70 -60 -50 -40 -30 -20 -10 -20 0 20 40 60 80 overall rx gain @ if = 400 mhz (db) input compression (dbv) 0db 10db 20db 30db c903 pgd gain setting figure 7. receiver input compression graph
RF133 rf/if transceiver 14 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change 16 17 vcc rf210 mixoutm mixoutp vrf c405a 1 7 6 5 2 348 out2 out1 1st lo txvco (translation loop vco) v control vcc in2 in1 hot 400 mhz saw filter RF133 gnd 19 37 10 29 28 30 20 21 27 25 3 33 18 12 39 38 22 42 8 1 5 31 35 34 7 6 14 13 40 41 32 44 4 45 16 15 47 17 lo2o+ rxq+ rxq rxi+ rxi lo2o txi+ txi txq+ txq rxena txena sxena le clk data gnd gnd gnd gnd gnd gnd lpfadj le clk data vcc vcc vcc res1 res2 vcc cth2 cth1 t/h rxifin rxifin+ bpc vcc vcc txmo+ txmo txifin+ txifin rxiff rxiff+ lo1in+ lo1in txin+ txin tlcpo 23 24 11 9 43 48 46 36 26 2 vhf tune (from i/f pll low pass filter) vhf rxi rxi+ rxq rxq+ lo2o lo2o+ txi+ txi txq+ txq rxena txena rxena t/h power amplifier vcc vc ground rf out u4 mqe550-90 2 3 4 2 5 6 1 figure 8. RF133 typical application circuit
rf/if transceiver RF133 100776a conexant 15 proprietary information and specifications are subject to change october 8, 1999 detail a a1 l1 c l a a2 millimeters 0.05 8.85 0.5 0.11 1.6 max 0.15 9.15 5.5 ref 0.75 1.0 ref 0.500 ref 0.17 0.10 max 0.0020 0.3484 0.0197 0.0043 a a1 a2 d d1 d2 l l1 e b c coplanarity min. max. min. max. inches* dim. ref: 48-pin tqfp (gp00-d283) 0.0630 max 0.006 0.3602 0.2165 ref 0.0295 0.0394 ref 0.0197 ref 0.0067 0.0039 max metric values (millimeters) should be used for pcb layout. english values (inches) are converted from metric values and may contain round-off errors. * d1 detail a e b c004 d2 d1 d d2 d1 d 1.35 1.45 0.0528 0.0571 0.2736 0.2776 6.95 7.05 0.220 ref 0.0087 ref figure 9. RF133 package dimensions ? 48-pin tqfp
RF133 rf/if transceiver 16 conexant 100776a october 8, 1999 proprietary information and specifications are subject to change ordering information model name manufacturing part number product revision rf/if transceiver RF133 ? 2000, conexant systems, inc. all rights reserved. information in this document is provided in connection with conexant systems, inc. ("conexant") products. these materials are p rovided by conexant as a service to its customers and may be used for informational purposes only. conexant assumes no responsibility for errors or omissions in these materials. conexant may make changes to specifications and product descriptions at any time, without notice. conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. exce pt as provided in conexant?s terms and conditions of sale for such products, conexant assumes no liability whatsoever. these materials are provided "as is" without warranty of any kind, either express or implied, relating to sale and/or use of conexant products including liability or warranties relating to fitness for a particular purpose, consequential or incidental damages, merchantability, or infringement of any patent, copyright or other intellectual property right. conexant further does not warrant the accuracy or completeness of the information, text, graphics or other items contained within these materials. conexant shall not be liable for any special, indirect, incidental, or consequential damages, including without limitation, lost revenues or lost profits, which may result from the use of these materials. conexant products are not intended for use in medical, lifesaving or life sustaining applications. conexant customers using or selling conexant products for use in such applications do so at their own risk and agree to fully indemnify conexant for any damages resulting from such improper use or sale. the following are trademarks of conexant systems, inc.: conexant?, the conexant c symbol, and ?what?s next in communications te chnologies??. product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. third-party b rands and names are the property of their respective owners. additional information, posted at www.conexant.com, is incorporated by reference. reader response : conexant strives to produce quality documentation and welcomes your feedback. please send comments and suggestions to tech.pubs@conexant.com. for technical questions, contact your local conexant sales office or field applications engineer.
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