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KS88C01016/c01008/c01004/c01116/c01108/c01104 product overv iew 1- 1 1 product overview overview samsung's ks88 series of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. important cpu features include: ? efficient regis ter-oriented architecture ? selectable cpu clock sources ? idle and stop power-down mode release by interrupt ? built-in basic timer with watchdog function a sophisticated interrupt structure recognizes up to eight interrupt levels. each level can have one or more interrupt sources and vectors. fast interrupt processing (within a minimum six cpu clocks) can be assigned to specific interrupt levels. KS88C01016/c01008/c01004/c01116/c01108/c01104 microcontroller the KS88C01016/c01008/c01004/c01116/c01108/c01104 single-chip cmos microcontroller is fabricated using a highly advanced cmos process and is based on samsung's newest cpu architecture. the KS88C01016/c01008/c01004/c01116/c01108/c01104 is the microcontroller which has mask- programmable rom. the ks88p01016/p01008/p01004/p01116/p01108/p01104 is the microcontroller which has one-time- programmable eprom. using a proven modular design approach, samsung engineers developed the KS88C01016/c01008/c01004/c01116/c01108/c01104 by integrating the following peripheral modules with the powerful sam87 rc core: ? three programmable i/o ports, including two 8 -bit ports and one 3-bit port, for a total of 19 pins. ? internal lvd circuit and eight bit-programmable pins for external interrupts. ? one 8-bit basic timer for oscillation stabilization and watchdog functions (system reset). ? one 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. ? one 8-bit counter with auto-reload function and one-shot or repeat control. the KS88C01016/c01008/c01004/c01116/c01108/c01104 is a versatile general-purpose microcontroller which is especially suitable for use as remote transmitter controller. it is currently available in a 24-pin sop and sdip package
product overview k s88c01016/c01008/c01004/c01116/c01108/c01104 1- 2 features cpu sam87rc cpu core memory program memory (rom) - KS88C01016/c01116: 15,872-byte (0000h-3e00h) - ks88c01008/c01108: 8-kbyte (0000h-1fffh) - ks88c01004/c01104: 4-kbyte (0000h-0fffh) data memory: 256-byte ram instruction set 78 instructions idle and stop instructions added for power- down modes instruction execution time 500 ns at 8-mhz f osc (minimum) interrupts 13 interrupt sources with 10 vector. 5 level, 10 vector interrupt structure i/o ports two 8-bit i/o ports (p0-p1) and one 3-bit port (p2) for a total of 19 bit-programmable pins eight input pins for external interrupts carrier frequency generator one 8-bit counter with auto-reload function and one-shot or repeat control (counter a) back-up mode when v dd is lower than v lvd , the chip enters back-up mode to block oscillation and reduce the current consumption. timers and timer/counters one programmable 8-bit basic timer (bt) for oscillation stabilization control or watchdog timer function one 8-bit timer/counter (timer 0) with two operating modes; interval mode and pwm mode. one 16-bit timer/counter with one operating modes; interval mode low voltage detect circuit low voltage detect for reset or back-up mode. low level detect voltage ? KS88C01016/c01008/c01004 : 2.20v ( typ) 200 mv ? ks88c01116/c01108/c01104 : 1.90v ( typ) 200 mv auto reset function reset occurs when stop mode is released by p0. when a falling edge is detected at port 0 during stop mode, system reset occurs. operating temperature range ? ?40 c to + 85 c operating voltage range 1.7 v to 3.6 v at 4 mhz f osc 2.0 v to 3.6 v at 8 mhz f osc package type 24-pin sop/sdip KS88C01016/c01008/c01004/c01116/c01108/c01104 product overv iew 1- 3 block diagram 8-bit basic timer p0.0-p0.7/int0-int4 p1.0-p1.7 port i/o and interrupt control sam87ri cpu internal bus x in x out port 0(intr) port 1 main osc p2.0/t0pwm 15-kbyte rom 256-byte register file 8-bit timer/ counter 16-bit timer/ counter port 2 carrier generator (counter a) p2.1/rem p2.2 lvd test figure 1-1. block diagram product overview k s88c01016/c01008/c01004/c01116/c01108/c01104 1- 4 pin assignments v ss x in x out test p0.0/int0/intr p0.1/int1/intr reset /p0.2/int2/intr p0.3/int3/intr p0.4/int4/intr p0.5/int4/intr p0.6/int4/intr p0.7/int4/intr ks88 c0 1016/c01008 /c01004/c01116 /c01108/c01104 24-s op/sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 v dd p2.2 p2.1/rem/ sclk p2.0/t0pwn/t0ck/ sdat p1.7 p1.6 p1.5 p1.4 p1.3 p1.2 p1.1 p1.0 24 23 22 21 20 19 18 17 16 15 14 13 figure 1-2. pin assignment diagram (24-pin sop/sdip package) KS88C01016/c01008/c01004/c01116/c01108/c01104 product overv iew 1- 5 pin descriptions table 1-1. pin descriptions pin names pin type pin description circuit type 24- pin number shared functions p0.0-p0.7 i/o i/o port with bit-programmable pins. configurable to input or push-pull output mode. pull-up resistors are assignable by software. pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. interrupt with reset(intr) is assigned to port 0. 1 5-12 int0 ? int4/intr p1.0-p1.7 i/o i/o port with bit-programmable pins. configurable to input mode or output mode. pin circuits are either push-pull or n- channel open-drain type. pull-up resistors are assignable by software. 2 13-20 p2.0 p2.1 p2.2 i/o 3-bit i/o port with bit-programmable pins. configurable to input mode, push-pull output mode, or n-channel open-drain output mode. input mode with pull-up resistors are assignable by software. the two pins of port2 have high current drive capability. 3 4 5 21-23 rem/t0ck x in , x out ? system clock input and output pins ? 2,3 ? test i test signal input pin (for factory use only; must be connected to v ss ). ? 4 ? v dd ? power supply input pin ? 24 ? v ss ? ground pin ? 1 ? product overview k s88c01016/c01008/c01004/c01116/c01108/c01104 1- 6 pin circuits v dd pull-up enable v dd input/output pull-up resistor output disable data v ss noise filter external interrupt stop intr (interrupt with reset) figure 1-3. pin circuit type 1 (port 0) note interrupt with reset (intr) is assigned to port 0 of KS88C01016/c01008/c01004/c01116/c01108 /c01104. it is designed to release stop status with reset. when the falling/rising edge is detected at any pin of port 0 during stop status, non vectored interrupt intr signal occurs, after then system reset occurs automatically. it is designed for a application which are using ?stop mode? like remote controller. if stop mode is not used, intr do not operates and it can be discarded. KS88C01016/c01008/c01004/c01116/c01108/c01104 product overv iew 1- 7 pin circuits (continued ) v dd pull-up enable v dd input/output pull-up resistor output disable data v ss noise filter normal input open-drain figure 1-4. pin circuit type 2 (port 1) product overview k s88c01016/c01008/c01004/c01116/c01108/c01104 1- 8 pin circuits ( continued) v dd pull-up enable v dd p2.0/t0pwn pull-up resistor (typical 21k w ) open-drain port 2.0 data v ss m u x p2.0 input output disable data t0_pwn p2con.0 figure 1-5. pin circuit type 3 (p2.0) KS88C01016/c01008/c01004/c01116/c01108/c01104 product overv iew 1- 9 pin circuits (continued) v dd pull-up enable v dd p2.1/rem/t0ck pull-up resistor (typical 21k w ) open-drain port 2.1 data v ss p2.1 input m u x p2con.1 data output disable noise filter t0ck caof(cacon.0) carrier on/off (p2.5) figure 1-6. pin circuit type 4 (p2.1) product overview k s88c01016/c01008/c01004/c01116/c01108/c01104 1- 10 pin circuits (continued) v dd pull-up enable v dd in/out pull-up resistor (typical 21k w ) open-drain v ss normal input output disable data figure 1-7. pin circuit type 5 (p2.2) KS88C01016/c01018/c01004/c01116/c01108/c01104 electrical da ta 13- 1 13 electrical data overview in this section, KS88C01016/c01008/c01004/c01116/c01108/c01104 electrical characteristics are presented in tables and graphs. the information is arranged in the following order: ? absolute maximum ratings ? d.c. electrical char acteristics ? data retention supply voltage in stop mode ? stop mode release timing when initiated by a reset ? i/o capacitance ? a.c. electrical characteristics ? input timing for external interrupts (port 0) ? oscillation characteristics ? oscillation stabilization time electrical data ks 88c01016/c01018/c01004/c01116/c01108/c01104 13- 2 table 13-1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v in ? ? 0.3 to v dd + 0.3 v output voltage v o all output pins ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for ports 0, 1, and 2 + 100 total pin current for port 3 + 40 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c table 13-2. d.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 2.0 v to 3.6 v) parameter symbol conditions min typ max unit operating voltage v dd f osc = 8mhz (instruction clock = 1.33 mhz) 2.0 ? 3.6 v f osc = 4mhz (instruction clock = 0.67 mhz) 1.7 ? 3.6 input high voltage v ih1 all input pins except v ih2 and v ih3 0.8 v dd ? v dd v v ih2 x in v dd ? 0.3 v dd input low voltage v il1 all input pins except v il2 and v il3 0 ? 0.2 v dd v v il2 x in 0.3 output high voltage v oh1 v dd = 2.4 v, i oh = ? 6 ma port 2.1 only, t a = 25 c v dd ? 0.7 v v oh2 v dd = 2.4 v, i oh = ? 2.2ma port 2.0, 2.2, t a = 25 c v dd - 0.7 ? ? v oh3 v dd = 2.4 v, i oh = ? 1 ma all output pins except port2, t a = 25 c v dd - 1.0 ? ? KS88C01016/c01018/c01004/c01116/c01108/c01104 electrical da ta 13- 3 table 13-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 3.6 v) parameter symbol conditions min typ max unit output low voltage v ol1 v dd = 2.4 v, i ol = 12 ma, port 2.1 only, t a = 25 c 0.4 0.5 v ol2 v dd = 2.4 v, i ol = 5 ma port 2.0,2.2, t a = 25 c - 0.4 0.5 v ol3 i ol = 1 ma ports 0 and 1, t a = 25 c 0.4 1.0 input high leakage current i lih1 v in = v dd all input pins except x in and x out ? ? 1 a i lih2 v in = v dd , x in and x out 20 input low leakage current i lil1 v in = 0 v all input pins except x in , x out ? ? ? 1 a i lil2 v in = 0 v x in and x out ? 20 output high leakage current i loh v out = v dd all output pins ? ? 1 a output low leakage current i lol v out = 0 v all output pins ? ? ? 1 a pull-up resistors r l1 v dd = 2.4v, v in = 0 v; t a = 25 c , ports 0-2 44 55 95 k w supply current (note) i dd1 v dd = 3.6 v 10% 8-mhz crystal - 5 9 ma 4-mhz crystal 2.6 5 i dd2 idle mode; v dd = 3.6 v 10% 8-mhz crystal ? 1.0 2.5 4-mhz crystal 0.7 2.0 i dd3 stop mode; v dd = 3.6 v - 1 6 ua note : supply current does not include current drawn through internal pull-up resistors or external output current loads. electrical data ks 88c01016/c01018/c01004/c01116/c01108/c01104 13- 4 table 13-3. characteristics of low voltage detect circuit (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit hysteresys voltage of lvd (slew rate of lvd) d v ? - 30 300 mv low level detect voltage (KS88C01016/c01008/c01004) v lvd ? 2.0 2.20 2.40 v low level detect voltage (ks88c01116/c01108/c01104) v lvd ? 1.70 1.90 2.1 v table 13-4. data retention supply voltage in stop mode (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit data retention supply voltage v dddr ? 1.0 ? 3.6 v data retention supply current i dddr v dddr = 1.0 v stop mode ? ? 1 a table 13-5. input/output capacitance (t a = ? 40 c to + 85 c, v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 13-6. a.c. electrical characteristics (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit interrupt input, high, low width t inth , t intl p0.0?p0.7, v dd = 3.6 v 200 300 ? ns KS88C01016/c01018/c01004/c01116/c01108/c01104 electrical da ta 13- 5 t inth t intl 0.8 v dd 0.2 v dd note: the unit t cpu means one cpu clock period. figure 13-1. input timing for external interrupts (port 0) table 13-7. oscillation characteristics (t a = ? 40 c + 85 c) oscillator clock circuit conditions min typ max unit crystal x out x in c2 c1 cpu clock oscillation frequency 1 ? 8 mhz ceramic xt out xt in c2 c1 cpu clock oscillation frequency 1 ? 8 mhz external clock x out x in external clock open pin x in input frequency 1 ? 8 mhz electrical data ks 88c01016/c01018/c01004/c01116/c01108/c01104 13- 6 table 13-8. oscillation stabilization time (t a = ? 40 c + 85 c, v dd = 3.6 v) oscillator test condition min typ max unit main crystal f osc > 400 khz ? ? 20 ms main ceramic oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range. ? ? 10 ms external clock (main system) x in input high and low width (t xh , t xl ) 25 ? 500 ns oscillator stabilization wait time t wait when released by a reset (1) ? 2 16 / f osc ? ms t wait when released by an interrupt (2) ? ? ? ms notes : 1. f osc is the oscillator frequency. 2. the duration of the oscillation stabilization time (t wait ) when it is released by an interrupt is determined by the setting in the basic timer control register, btcon. 1.33 mhz 250 khz 8.32 khz 1 2 3 4 5 6 7 supply voltage (v) instruction clock = 1/6n x oscillator frequency (n = 1, 2, 8, 16) a 1.7 v: 4 mhz b 2.0 v: 8 mhz 1.00 mhz a b 500 khz 670 khz instruction clock 8 mhz 6 mhz 4 khz instruction clock 400 khz figure 13-2. operating voltage range of KS88C01016/c01008/c01004/c01116/c01108/c01104 KS88C01016/c01018/c01004/c01116/c01108/c01104 mechanical da ta 14- 1 14 mechanical data overview the KS88C01016/c01008/c01004/c01116/c01108/c01104 microcontroller is currently available in a 24-pin sop and sdip package. note : dimensions are in millimeters. 24-sop-375 10.30 0 .30 #13 #24 #1 #12 15.74 max 15.34 0 .20 (0.69) 0-8 0.15 + 0.10 - 0.05 9.53 7.50 0.20 0.85 0.20 0.05 min 2.30 0.10 2.50 max 0.38 0.10 max + 0.10 - 0.05 1.27 figure 14-1. 24-pin sop package mechanical data mechanical data KS88C01016 /c01018/c01004/c01116/c01108/c01104 14- 2 note : dimensions are in millimeters. 23.35 max 22.95 0 .20 (1.70) 24-sdip-300 6.40 0 .20 #24 #1 0.46 0.10 0.89 0.10 #13 #12 0-15 0.25 + 0.10 - 0.05 7.62 3.25 0.20 5.08 max 1.778 0.51 min 3.30 0.30 figure 14-2. 24-pin sdip package mechanical data |
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